HT Series 200°C C0G

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature 200°C, C0G Dielectric, 10 – 200 VDC
(Industrial Grade)
Overview
KEMET’s High Temperature surface mount C0G Multilayer
Ceramic Capacitors (MLCCs) are constructed of a robust and
proprietary C0G/NP0 base metal electrode (BME) dielectric
system that offers industry-leading performance at extreme
temperatures up to 200°C. These devices are specifically
designed to withstand the demands of harsh industrial
environments such as down-hole oil exploration and automotive/
avionics engine compartment circuitry.
temperatures up to 200°C. They also exhibit low ESR at
high frequencies and offer greater volumetric efficiency over
competitive high temperature precious metal electrode (PME) and
BME ceramic capacitor devices.
These devices are Lead (Pb)-Free, RoHS and REACH compliant
without the need of any exemptions.
KEMET’s High Temperature C0G capacitors are temperature
compensating and are well suited for resonant circuit
applications or those where Q and stability of capacitance
characteristics are required. They exhibit no change in
capacitance with respect to time and voltage and boast a
negligible change in capacitance with reference to ambient
temperature. Capacitance change is limited to ± 30ppm/
ºC from −55°C to +200°C. In addition, these capacitors exhibit
high insulation resistance with low dissipation factor at elevated
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Ordering Information
C
Ceramic
1210
Case Size Specification/
(L" x W")
Series
0402
0603
0805
1206
1210
1812
2220
1
2
H
H = High
Temperature
(200°C)
124
J
5
G
A
C
TU
Capacitance
Code (pF)
Capacitance
Tolerance1
Voltage
Dielectric
Failure Rate/
Design
Termination Finish2
Packaging/Grade
(C-Spec)
Two significant digits
+ number of zeros.
Use 9 for 1.0 – 9.9 pF
Use 8 for 0.5 – .99 pF
e.g., 2.2 pF = 229
e.g., 0.5 pF = 508
B = ±0.10 pF
C = ±0.25 pF
D = ±0.5 pF
F = ±1%
G = ±2%
J = ±5%
K = ±10%
M = ±20%
8 = 10 V
4 = 16 V
3 = 25 V
5 = 50 V
1 = 100 V
2 = 200 V
G = C0G
A = N/A
C = 100% Matte Sn
L = SnPb (5% Pb
minimum)
E = Gold (Au) 1.97 –
11.8 µin
F = Gold (Au) 30 – 50
µin
G = Gold (Au) 100 µin
minimum
See “Packaging
C-Spec Ordering
Options Table”
below
Additional capacitance tolerance offerings may be available. Contact KEMET for details.
Additional termination finish options may be available. Contact KEMET for details.
One world. One KEMET
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Packaging C-Spec Ordering Options Table
Termination Finish Options
Packaging Type/Options
Packaging
Ordering Code (C-Spec)
Standard Packaging – Unmarked3
Bulk Bag
Waffle Tray2
7" Tape & Reel
C = 100% Matte Sn
L = SnPb (5% Pb min.)
F = Gold (Au) 30 – 50 µin
G = Gold (Au) 100 µin minimum
13" Reel
7” Tape & Reel/2 mm pitch4
7" Tape & Reel – 50 pieces
7" Tape & Reel – 100 pieces
7" Tape & Reel – 250 pieces
7" Tape & Reel – 500 pieces
7" Tape & Reel – 1,000 pieces
Blank1
7292
TU
7411 (EIA 0603 and smaller case sizes)
7210 (EIA 0805 and larger case sizes)
7081
T050
T100
T250
T500
T1K0
Moisture Sensitive Packaging5 – Unmarked3
E = Gold (Au) 1.97 – 11.8 µin
F = Gold (Au) 30 – 50 µin
G = Gold (Au) 100 µin minimum
Waffle Tray2
7" Tape & Reel
7" Tape & Reel – 50 pieces
7" Tape & Reel – 100 pieces
7" Tape & Reel – 250 pieces
7" Tape & Reel – 500 pieces
7" Tape & Reel – 1,000 pieces
7282
7130
Contact KEMET6
Default packaging is “Bulk Bag”. An ordering code C-Spec is not required for “Bulk Bag” packaging.
“Bulk Bag” packaging option is not available for Gold (Au) termination finish options and case sizes larger than 2225 (5664 Metric).
2
“Waffle Tray” packaging option is not available for case sizes larger than 2225 (5664 Metric).
3
The terms “Marked” and “Unmarked” pertain to laser marking option of components. All packaging options labeled as “Unmarked” will contain capacitors that
have not been laser marked. The option to laser mark is not available on these devices.
3
Reeling quantities are dependent upon chip size and thickness dimension. When ordering using the “T1K0” packaging option, 1812 thru 2225 case size devices
with chip thickness of ≥ 1.9 mm (nominal) may be shipped on multiple 7” reels or a single 13” reel. Additional reeling or packaging options may be available.
Contact KEMET for details.
4
The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case size
devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.
5
Moisture sensitive packaging is required for Gold (Au) termination option “E” (1.97 – 11.8 µin)
6
Additional reeling or packaging options may be available. Contact KEMET for details.
1
1
Benefits
•
•
•
•
•
•
•
•
•
•
−55°C to +200°C operating temperature range
Lead (Pb)-Free, RoHS and REACH compliant
EIA 0402, 0603, 0805, 1206, 1210, 1812, and 2220 case sizes
DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, and 200 V
Capacitance offerings ranging from 0.5 pF up to 470 nF
Available capacitance tolerances of ±0.10 pF, ±0.25 pF,
±0.5 pF, ±1%, ±2%, ±5%, ±10% or ±20%
No piezoelectric noise
Extremely low ESR and ESL
High thermal stability
High ripple current capability
• Preferred capacitance solution at line frequencies and into the
MHz range
• No capacitance change with respect to applied rated DC voltage
• Negligible capacitance change with respect to temperature from
−55°C to +200°C
• No capacitance decay with time
• Non-polar device, minimizing installation concerns
• 100% pure matte tin-plated termination finish allowing for
excellent solderability
• Gold (Au), Tin/Lead (Sn/Pb) and 100% pure matte Tin (Sn)
termination finishes available
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Dimensions – Millimeters (Inches)
L
W
B
T
S
EIA
Size
Code
Metric
Size
Code
L
Length
W
Width
B
Bandwidth
S
Separation
Minimum
Mounting
Technique
0402
1005
1.00 (.040) ±0.05 (.002)
0.50 (.020) ±0.05 (.002)
0.30 (.012) ±0.10 (.004)
0.30 (.012)
Solder Reflow Only
0603
1608
1.60 (.063) ±0.15 (.006)
0.80 (.032) ±0.15 (.006)
0.35 (.014) ±0.15 (.006)
0.70 (.028)
0805
2012
2.00 (.079) ±0.20 (.008)
1.25 (.049) ±0.20 (.008)
0.50 (0.02) ±0.25 (.010)
0.75 (.030)
1206
3216
3.20 (.126) ±0.20 (.008)
1210
3225
3.20 (.126) ±0.20 (.008)
See Table 2 for
0.50 (0.02) ±0.25 (.010)
Thickness
2.50 (.098) ±0.20 (.008)
0.50 (0.02) ±0.25 (.010)
1812
4532
4.50 (.177) ±0.30 (.012)
3.20 (.126) ±0.30 (.012)
0.60 (.024) ±0.35 (.014)
2220
5650
5.70 (.224) ±0.40 (.016)
5.00 (.197) ±0.40 (.016)
0.60 (.024) ±0.35 (.014)
T
Thickness
Solder Wave or
Solder Reflow
1.60 (.063) ±0.20 (.008)
N/A
Solder Reflow Only
Applications
Typical applications include critical timing, tuning, circuits requiring low loss, circuits with pulse, high current, decoupling, bypass,
filtering, transient voltage suppression, blocking and energy storage for use in extreme environments such as down-hole exploration,
aerospace engine compartments and geophysical probes.
Qualification/Certification
High temperature (200ºC) Industrial grade products meet or exceed the requirements outlined in Table 4, Performance & Reliability.
Qualification packages are available for review and download on our website at www.kemet.com/hightemp
Environmental Compliance
Lead (Pb)-Free, RoHS, and REACH compliant without exemptions (excluding SnPb termination finish option).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Electrical Parameters/Characteristics
Item
Parameters/Characteristics
Operating Temperature Range
Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC)
Aging Rate (Maximum % Capacitance Loss/Decade Hour)
Dielectric Withstanding Voltage (DWV)
1
2
3
Dissipation Factor (DF) Maximum Limit @ 25ºC
Insulation Resistance (IR) Minimum Limit @ 25°C
−55°C to +200°C
±30 ppm/ºC (up to 200ºC)
0%
250% of rated voltage
(5 ±1 seconds and charge/discharge not exceeding 50 mA)
0.1%
1,000 megohm microfarads or 100 GΩ
(Rated voltage applied for 120 ±5 seconds @ 25°C)
DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the capacitor.
Capacitance and dissipation factor (DF) measured under the following conditions:
1 MHz ±100 kHz and 1.0 ±0.2 Vrms if capacitance ≤ 1,000 pF
1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance > 1,000 pF
3
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 & Agilent E4980 have a feature known as Automatic
Level Control (ALC). The ALC feature should be switched to “ON.”
1
2
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric
Rated DC
Voltage
Capacitance
Value
Dissipation Factor
(Maximum %)
C0G
All
All
0.5
Capacitance
Shift
Insulation
Resistance
0.3% or ±0.25 pF 10% of Initial Limit
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Electrical Characteristics
Delta Cap vs. Temperature (Typical)
C1210H104J1GAC - Life Test IR Distribution (Lognormal)
20
99
15
10
80
70
60
50
40
30
20
Percent %
5
Delta Cap (%)
0 hrs
2000 hrs
95
90
0
-5
10
-10
5
0 Vr
-15
100% Vr
1
-20
1.0
10.0
200
180
160
140
120
100
80
60
40
20
0
-20
-40
-60
0.1
100.0
25°C IR (GOhms)
Temperature (ºC)
Capacitance vs. Temperature with 25 V DC Bias
(Rated Voltage)
DF vs. Temperature without DC Bias.
1.00
200
200ºC C0G 100nF no DC
0.50
DF (%)
150
Capacitance (nF)
200ºC C0G MLCC 100nF
200ºC C0G 100nF 25V DC
100
0.00
IR vs. Temperature with 25 V DC Bias (Rated Voltage)
BME vs. PME/IR vs. Temperature with 25 V DC Bias
(Rated Voltage)
1.E+08
1.E+08
1.E+07
1.E+07
1.E+06
1.E+06
IR (MOhms)
1.E+05
IR (MOhms)
200
180
160
140
120
100
80
-20
-40
-60
200
180
160
140
120
100
80
60
40
20
0
-20
-40
-60
Temperature (°C)
Temperature (°C)
1.E+04
1.E+03
1.E+02
1.E+01
60
-1.00
40
0
20
-0.50
0
50
1.E+05
1.E+04
1.E+03
PME C0G MLCC 1206/10nF
1.E+02
200ºC C0G MLCC 100nF
BME C0G MLCC 1206/10nF
1.E+01
200
180
160
140
120
80
100
60
40
0
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
20
Temperature (°C)
-20
-40
200
180
160
140
120
80
100
60
40
0
20
-20
-40
-60
-60
1.E+00
Temperature (°C)
C1001_C0G_200C_SMD • 3/24/2016
5
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes)
10
16
25
50
100
200
10
16
5
1
2
EB
EB
EB
EB
EB
EB
EB
EB
EB
EB
EB
EB
EB
EB
EB
EC
ED
ED
ED
ED
EE
EC
EC
EC
EE
EE
EF
EC
EC
ED
ED
EB
EB
EB
EB
EB
EB
EB
EB
EB
EC
EE
EE
EH
EH
EB
EB
EB
EB
EB
EB
EB
EB
EB
EB
EB
EB
EE
EB
EB
EC
EC
ED
ED
ED
EE
EC
EC
4
3
5
1
2
8
4
C0805H
2
50
8
100
2
25
1
16
5
10
3
C0603H
200
4
100
8
25
1
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
50
5
C0402H
3
CF CF DN DN DN DN DN DN
CF CF DN DN DN DN DN DN EB EB EB EB
CF CF DN DN DN DN DN DN EB EB EB EB
CF CF DN DN DN DN DN DN EB EB EB EB
CF
DN DN DN DN DN DN EB EB EB EB
CF
DN DN DN DN DN DP EB EB EB EB
CF
DN DN DN DN DN DN EB EB EB EB
CF
DN DN DN DN DN DN EB EB EB EB
CF
DN DN DN DN DN DN EB EB EB EB
CF
DN DN DN DN DN DN EB EB EB EB
CF
DN DN DN DN DN DN EB EB EB EB
CF
DN DN DN DN DN DN EB EB EB EB
CF
DN DN DN DN DP DP EB EB EB EB
CF
DN DN DN DN DP DP EB EB EB EB
CF
DN DN DN DN DN
EB EB EB EB
CF
DN DN DN DN DN
EB EB EB EB
CF
DP DP DP DP DP
EB EB EB EB
CF
DP DP DP DP DP
EB EB EB EB
CF
DP DP DP DP DP
EB EB EB EB
CF
DP DP DP DP DP
EB EB EB EB
CF
DN DN DN DN DN
EB EB EB EB
CF
DN DN DN DN DN
EB EB EB EB
CF
DN DN DN DN DN
EB EB EB EB
CF
DN DN DN DN DN
EB EB EB EB
CF
DP DP DP DP DN
EC EC EC EC
CF
DP DP DP DP DN
EC EC EC EC
CF
DP DP DP DP DN
EC EC EC EC
CF
DE DE DE DE DN
EC EC EC EC
CF
DE DE DE DE DN
EC EC EC EC
CF
DE DE DE DE DN
EC EC EC EC
DE DE DE DE DN
ED ED ED ED
DN DN DN DN DN
ED ED ED ED
DN DN DN DN DN
EB EB EB EB
DN DN DN DN DN
EB EB EB EB
DN DN DN DN DN
EB EB EB EB
DN DN DN DN DN
EC EC EC EC
DN DN DN DN DN
EC EC EC EC
DN DN DN DN DP
ED ED ED ED
DN DN DN DN DE
EB EB EB EB
DN DN DN DP DG
EB EB EB EB
DN DN DN DP
EB EB EB EB
DP DP DP DF
EB EB EB EB
DF DF DF
EB EB EB EB
DG DG DG
EB EB EB EB
DG DG DG
EC EC EC EE
DG DG DG
EC EC EC EE
ED ED ED EF
EF EF EF EH
EH EH EH EH
EH EH EH
16
3
Case Size / Series
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
4
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
10
4
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
8
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
100
8
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
200
Voltage Code
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
2
50
Rated Voltage (VDC)
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
16
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
1
25
D
D
10
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
25
C
C
100
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
50
Cap
Code
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
16
Capacitance
B
B
10
508 & 758
109 - 919*
100 - 910*
101 - 181*
201 - 431*
471
511
561
621
681
751
821
911
102
112
122
132
152
162
182
202
222
242
272
302
332
362
392
432
472
512
562
622
682
752
822
912
103
123
153
183
223
273
333
393
473
563
683
823
104
5
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
Capacitance Tolerance
0.5 & 0.75 pF
1.0 - 9.0 pF*
10 - 91 pF*
100 - 180 pF*
200 - 430 pF*
470 pF
510 pF
560 pF
620 pF
680 pF
750 pF
820 pF
910 pF
1,000 pF
1,100 pF
1,200 pF
1,300 pF
1,500 pF
1,600 pF
1,800 pF
2,000 pF
2,200 pF
2,400 pF
2,700 pF
3,000 pF
3,300 pF
3,600 pF
3,900 pF
4,300 pF
4,700 pF
5,100 pF
5,600 pF
6,200 pF
6,800 pF
7,500 pF
8,200 pF
9,100 pF
10,000 pF
12,000 pF
15,000 pF
18,000 pF
22,000 pF
27,000 pF
33,000 pF
39,000 pF
47,000 pF
56,000 pF
68,000 pF
82,000 pF
0.10 µF
3
200
4
200
8
50
2
100
1
25
5
16
3
10
4
200
8
100
1
25
5
C1206H
50
3
100
4
C0805H
25
8
C0603H
50
Voltage Code
Rated Voltage (VDC)
16
Cap
Code
C0402H
10
Capacitance
Case Size / Series
3
5
1
C1206H
*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)
KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage capability within
the same form factor (configuration and dimensions).
These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts..
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Table 1B – Capacitance Range/Selection Waterfall (1210 – 2220 Case Sizes)
10
16
25
50
2
200
200
1
JJ
JJ
200
5
100
3
100
4
50
8
25
2
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GD
GH
GK
3
5
1
2
8
4
C1210H
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GD
GH
GK
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GD
GH
GK
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GD
GH
GN
3
5
1
C1812H
JJ
JJ
16
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GB
GD
GH
GK
10
4
3
5
1
2
FB
FB
FB
FB
FB
FB
FC
FE
FE
FE
FE
FG
FC
FC
FF
FF
FF
FF
FF
FG
FG
FG
200
8
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FC
FC
FC
FC
FC
FF
FF
FF
FF
FG
FG
FG
FG
FG
FC
FC
FE
FF
FB
FB
FB
FB
FB
FB
FE
FE
FF
FG
FH
FM
100
Voltage Code
Case Size / Series
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FF
FB
FB
FB
FB
FC
FC
FE
FF
FG
FG
FB
FB
FB
FB
FB
FB
FB
FC
FF
FG
FH
FM
50
Rated Voltage (VDC)
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FF
FB
FB
FB
FB
FC
FC
FE
FF
FG
FG
FB
FB
FB
FB
FB
FB
FB
FB
FC
FE
FG
FH
25
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FF
FB
FB
FB
FB
FC
FC
FE
FF
FG
FG
FB
FB
FB
FB
FB
FB
FB
FB
FC
FE
FG
FH
16
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FF
FB
FB
FB
FB
FC
FC
FE
FF
FG
FG
FB
FB
FB
FB
FB
FB
FB
FB
FC
FE
FG
FH
10
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
200
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
100
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
1
100
50
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
5
50
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
3
50
25
D
D
4
25
C
C
16
Cap Code
B
B
10
Capacitance
508 & 758
109 - 919*
100 - 910*
101 - 911*
102
112
122
132
152
162
182
202
222
242
272
302
332
362
392
432
472
512
562
622
682
752
822
912
103
123
153
183
223
273
333
393
473
563
683
823
104
124
154
184
224
474
8
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
Capacitance Tolerance
0.5 & 0.75 pF
1.0 - 9.1 pF*
10 - 91 pF*
100 - 910 pF*
1,000 pF
1,100 pF
1,200 pF
1,300 pF
1,500 pF
1,600 pF
1,800 pF
2,000 pF
2,200 pF
2,400 pF
2,700 pF
3,000 pF
3,300 pF
3,600 pF
3,900 pF
4,300 pF
4,700 pF
5,100 pF
5,600 pF
6,200 pF
6,800 pF
7,500 pF
8,200 pF
9,100 pF
10,000 pF
12,000 pF
15,000 pF
18,000 pF
22,000 pF
27,000 pF
33,000 pF
39,000 pF
47,000 pF
56,000 pF
68,000 pF
82,000 pF
0.10 µF
0.12 µF
0.15 µF
0.18 µF
0.22 µF
0.47 µF
C2220H
2
25
Rated Voltage (VDC)
C1812H
1
16
5
10
3
200
4
100
8
16
Cap
Code
C1210H
Voltage Code
10
Capacitance
Case Size / Series
2
8
4
C2220H
*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)
KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage capability within
the same form factor (configuration and dimensions).
These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts..
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Table 2A – Chip Thickness/Tape & Reel Packaging Quantities
Thickness
Code
Case
Size1
Thickness ±
Range (mm)
BB
CF
DN
DP
DE
DF
DG
EB
EC
ED
EE
EF
EH
FB
FC
FE
FF
FG
FH
FM
GB
GD
GH
GK
GN
JJ
0402
0603
0805
0805
0805
0805
0805
1206
1206
1206
1206
1206
1206
1210
1210
1210
1210
1210
1210
1210
1812
1812
1812
1812
1812
2220
0.50 ± 0.05
0.80 ± 0.07
0.78 ± 0.10
0.90 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.25 ± 0.15
0.78 ± 0.10
0.90 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.20 ± 0.15
1.60 ± 0.20
0.78 ± 0.10
0.90 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.25 ± 0.15
1.55 ± 0.15
1.70 ± 0.20
1.00 ± 0.10
1.25 ± 0.15
1.40 ± 0.15
1.60 ± 0.20
1.70 ± 0.20
2.20 ± 0.15
Thickness
Code
Case
Size1
Thickness ±
Range (mm)
Paper Quantity1
Plastic Quantity
7" Reel
13" Reel
7" Reel
13" Reel
7" Reel
13" Reel
7" Reel
13" Reel
10,000
4,000
4,000
4,000
0
0
0
4,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
50,000
15,000
15,000
15,000
0
0
0
10,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Paper Quantity1
0
0
0
0
2,500
2,500
2,500
4,000
4,000
2,500
2,500
2,500
2,000
4,000
4,000
2,500
2,500
2,500
2,000
2,000
1,000
1,000
1,000
1,000
1,000
500
0
0
0
0
10,000
10,000
10,000
10,000
10,000
10,000
10,000
10,000
8,000
10,000
10,000
10,000
10,000
10,000
8,000
8,000
4,000
4,000
4,000
4,000
4,000
2,000
Plastic Quantity
Package quantity based on finished chip thickness specifications.
1
If ordering using the 2mm Tape and Reel pitch option, the packaging quantity outlined in the table above will be doubled. This option is limited to EIA 0603 (1608 metric)
case size devices. For more information regarding 2mm pitch option see “Tape & Reel Packaging Information”.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Table 2B – Bulk Packaging Quantities
Packaging Type
Loose Packaging
Secure Packaging
Bulk Bag (default)
2” x 2” Waffle Pack/Tray3
N/A 2
7282 / 7292
Packaging C-Spec1
Case Size
EIA (in)
0402
0603
0805
1206
1206
1210
1808
1812
1825
2220
2225
Chip Thickness
(mm)
Metric (mm)
1005
1608
2012
3216
3216
3225
4520
4532
4564
5650
5664
Packaging Quantities (pieces/unit packaging)
Minimum
Maximum
Minimum
Maximum
1
368
368
100
126
50
80
50
42
20
20
20
All
50,000
≤ 1.25 (nominal)
> 1.25 (nominal)
1
All
20,000
The "Packaging C-Spec" is a 4-digit code which identifies the packaging type. When ordering, the proper code must be included in the 15th through 18th
character positions of the ordering code. See "Ordering Information" section of this document for further details. Product ordered without a packaging C-Spec will
default to our standard " bulk bag" packaging.
2
A packaging C-Spec (see note 1 above) is not required For "bulk bag" packaging (excluding Anti-Static Bulk Bag). The 15th through 18th character positions of
the ordering code should be left blank. All product ordered without a packaging C-Spec will default to out standard "bulk bag" packaging.
3
Also commonly referred to as “Chip Carrier” or “Molded Tray”. All tray packaging options offer static protection.
1
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351
EIA
Size
Code
Metric
Size
Code
0402
Density Level A:
Maximum (Most)
Land Protrusion (mm)
Density Level B:
Median (Nominal)
Land Protrusion (mm)
Density Level C:
Minimum (Least)
Land Protrusion (mm)
C
Y
X
V1
V2
C
Y
X
V1
V2
C
Y
X
V1
V2
1005
0.50
0.72
0.72
2.20
1.20
0.45
0.62
0.62
1.90
1.00
0.40
0.52
0.52
1.60
0.80
0603
1608
0.90
1.15
1.10
4.00
2.10
0.80
0.95
1.00
3.10
1.50
0.60
0.75
0.90
2.40
1.20
0805
2012
1.00
1.35
1.55
4.40
2.60
0.90
1.15
1.45
3.50
2.00
0.75
0.95
1.35
2.80
1.70
1206
3216
1.60
1.35
1.90
5.60
2.90
1.50
1.15
1.80
4.70
2.30
1.40
0.95
1.70
4.00
2.00
1210
3225
1.60
1.35
2.80
5.65
3.80
1.50
1.15
2.70
4.70
3.20
1.40
0.95
2.60
4.00
2.90
12101
3225
1.50
1.60
2.90
5.60
3.90
1.40
1.40
2.80
4.70
3.30
1.30
1.20
2.70
4.00
3.00
1812
4532
2.15
1.60
3.60
6.90
4.60
2.05
1.40
3.50
6.00
4.00
1.95
1.20
3.40
5.30
3.70
2220
5650
2.75
1.70
5.50
8.20
6.50
2.65
1.50
5.40
7.30
5.90
2.55
1.30
5.30
6.60
5.60
Only for capacitance values ≥ 22 µF
Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reflow solder
processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.
Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reflow solder processes.
Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualification
testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).
1
Image below based on Density Level B for an EIA 1210 case size.
V1
Y
Y
X
X
C
C
V2
Grid Placement Courtyard
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Soldering Process
Recommended Soldering Technique:
• Solder wave or solder reflow for EIA case sizes 0603, 0805 and 1206
• All other EIA case sizes are limited to solder reflow only
Recommended Reflow Soldering Profile:
KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual), convection,
IR or vapor phase reflow techniques. Preheating of these components is recommended to avoid extreme thermal stress. KEMET’s
recommended profile conditions for convection and IR reflow reflect the profile conditions of the IPC/J-STD-020 standard for moisture
sensitivity testing. These devices can safely withstand a maximum of three reflow passes at these conditions.
Preheat/Soak
Temperature Minimum (TSmin)
Temperature Maximum (TSmax)
Time (tS) from TSmin to TSmax
Ramp-Up Rate (TL to TP)
Termination Finish
SnPb
100% Matte Sn
100°C
150°C
60 – 120 seconds
150°C
200°C
60 – 120 seconds
183°C
217°C
Time Above Liquidous (tL)
60 – 150 seconds
60 – 150 seconds
Peak Temperature (TP)
235°C
260°C
Time Within 5°C of Maximum
Peak Temperature (tP)
20 seconds maximum
30 seconds maximum
Time 25°C to Peak
Temperature
TL
tP
Maximum Ramp Up Rate = 3°C/sec
Maximum Ramp Down Rate = 6°C/sec
tL
Tsmax
Tsmin
tS
3°C/second maximum 3°C/second maximum
Liquidous Temperature (TL)
Ramp-Down Rate (TP to TL)
TP
Temperature
Profile Feature
25
25° C to Peak
Time
6°C/second maximum 6°C/second maximum
6 minutes maximum
8 minutes maximum
Note 1: All temperatures refer to the center of the package, measured on the
capacitor body surface that is facing up during assembly reflow.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Product Qualification Test Plan
Reliability/Environmental Tests per MIL–STD–202//JESD22
High Temperature Life
Load Humidity
Low Voltage Humidity
Temperature Cycling
Thermal Shock
Moisture Resistance
200°C rated voltage 1,000 hours
85°C /85%RH rated voltage 1,000 hours
85°C /85%RH, 1.5 V, 1,000 hours
−55°C to +200°C, 50 Cycles
−55°C to +150°C, 20 seconds transfer, 15 minute dwell, 300 cycles
Cycled Temp/RH 0 V, 10 cycles @ 24 hours each
Physical, Mechanical & Process Tests per MIL–STD 202/JIS–C–6429
Resistance to Solvents
Mechanical Shock and Vibration
Resistance to Soldering Heat
Terminal Strength
Board Flex
Include Aqueous wash chemical, OKEM Clean or equivalent
Method 213: Figure 1, Condition F Method 204: 5 gs for 20 minutes 12 cycles
Condition B, no per-heat of samples, Single Wave Solder
Force of 1.8 kg for 60 seconds
Appendix 2, Note: 3.0 mm (minimum)
Storage and Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other
environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term
storage. In addition, packaging materials will be degraded by high temperature– reels may soften or warp and tape peel force may
increase. KEMET recommends that maximum storage temperature not exceed 40°C and maximum storage humidity not exceed 70%
relative humidity. In addition, temperature fluctuations should be minimized to avoid condensation on the parts and atmospheres should
be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within the
time frame outlined in the table below:
1
Termination Finish
Termination Finish Ordering Code1
Storage Life
100% Matte Tin (Sn)
C
1.5 years upon receipt
SnPb (5% Pb min.)
L
1.5 years upon receipt
Gold (Au) 1.97 – 11.8 µin2
E
6 months upon receipt 2
Gold (Au) 30 – 50 µin
F
1.5 years upon receipt
Gold (Au) 100 µin min.
G
1.5 years upon receipt
The fourteenth (14th) character position of the KEMET part number is assigned to identify and/or define the termination
finish. For more information, see “Ordering Information” section of this document.
2
Gold plating option “E” devices should remain in its factory sealed moisture sensitive packaging during storage. If the factory sealed packaging is disturbed please
store any remaining packaged components in a dry box container to prevent oxidation of the termination finish.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
12
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Construction
Detailed Cross Section
Termination Finish:
C = 100% Matte Sn
L = SnPb - 5% Pb min
E = Gold (Au) 1.97 - 11.8 µin
F = Gold (Au) 30 - 50 µin
G = Gold (Au) 100 µin min
Barrier Layer
(Ni)
Dielectric Material
(CaZrO3)
Dielectric Material
(CaZrO3)
End Termination/
External Electrode
(Cu)
Inner Electrodes
(Ni)
End Termination/
External Electrode
(Cu)
Barrier Layer
(Ni)
Termination Finish
(See options at left)
Inner Electrodes
(Ni)
Capacitor Marking (Optional):
Laser marking option is not available on:
•
•
•
•
C0G, Ultra Stable X8R and Y5V dielectric devices
EIA 0402 case size devices
EIA 0603 case size devices with Flexible Termination option.
KPS Commercial and Automotive grade stacked devices.
These capacitors are supplied unmarked only.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA
Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on
reeling quantities for commercial chips.
Bar Code Label
Anti-Static Reel
®
Embossed Plastic* or
Punched Paper Carrier.
ET
KEM
Chip and KPS Orientation in Pocket
(except 1825 Commercial, and 1825 and 2225 Military)
Sprocket Holes
Embossment or Punched Cavity
8 mm, 12 mm
or 16 mm Carrier Tape
178 mm (7.00")
or
330 mm (13.00")
Anti-Static Cover Tape
(.10 mm (.004") Maximum Thickness)
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
Table 5 – Carrier Tape Configuration, Embossed Plastic & Punched Paper (mm)
EIA Case Size
Tape
Size
(W)*
Embossed Plastic
7" Reel
13" Reel
Punched Paper
7" Reel
Pitch (P1)*
13" Reel
Pitch (P1)*
01005 – 0402
8
2
2
0603
8
2/4
2/4
0805
8
4
4
4
4
1206 – 1210
8
4
4
4
4
1805 – 1808
12
4
4
≥ 1812
12
8
8
KPS 1210
12
8
8
KPS 1812 & 2220
16
12
12
Array 0508 & 0612
8
4
4
*Refer to Figures 1 & 2 for W and P1 carrier tape reference locations.
*Refer to Tables 6 & 7 for tolerance specifications.
New 2 mm Pitch Reel Options*
Packaging
Ordering Code
(C-Spec)
C-3190
C-3191
C-7081
C-7082
Packaging Type/Options
Automotive grade 7" reel unmarked
Automotive grade 13" reel unmarked
Commercial grade 7" reel unmarked
Commercial grade 13" reel unmarked
* 2 mm pitch reel only available for 0603 EIA case size.
2 mm pitch reel for 0805 EIA case size under development.
Benefits of Changing from 4 mm to 2 mm Pitching Spacing
• Lower placement costs
• Double the parts on each reel results in fewer reel
changes and increased efficiency
• Fewer reels result in lower packaging, shipping and
storage costs, reducing waste
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
P2
T
T2
ØDo
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
Po
E1
Ao
F
Ko
B1
E2
Bo
S1
W
P1
T1
Center Lines of Cavity
ØD 1
Cover Tape
B 1 is for tape feeder reference only,
including draft concentric about B o.
Embossment
For cavity size,
see Note 1 Table 4
User Direction of Unreeling
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
8 mm
12 mm
1.5 +0.10/-0.0
(0.059 +0.004/-0.0)
16 mm
D1 Minimum
Note 1
1.0
(0.039)
1.5
(0.059)
E1
P0
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
R Reference S1 Minimum
Note 2
Note 3
25.0
(0.984)
2.0 ±0.05
0.600
(0.079 ±0.002)
(0.024)
30
(1.181)
P2
T
Maximum
T1
Maximum
0.600
(0.024)
0.100
(0.004)
Variable Dimensions — Millimeters (Inches)
Tape Size
Pitch
8 mm
Single (4 mm)
12 mm
Single (4 mm) &
Double (8 mm)
16 mm
Triple (12 mm)
B1 Maximum
Note 4
4.35
(0.171)
8.2
(0.323)
12.1
(0.476)
E2
Minimum
6.25
(0.246)
10.25
(0.404)
14.25
(0.561)
F
P1
3.5 ±0.05
(0.138 ±0.002)
5.5 ±0.05
(0.217 ±0.002)
7.5 ±0.05
(0.138 ±0.002)
4.0 ±0.10
(0.157 ±0.004)
8.0 ±0.10
(0.315 ±0.004)
12.0 ±0.10
(0.157 ±0.004)
T2
Maximum
2.5
(0.098)
4.6
(0.181)
4.6
(0.181)
W
Maximum
8.3
(0.327)
12.3
(0.484)
16.3
(0.642)
A0,B0 & K0
Note 5
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and
hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 6).
3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).
(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
P2
T
Po
ØDo
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
A0
F
P1
T1
T1
Top Cover Tape
W
E2
B0
Bottom Cover Tape
E1
G
Cavity Size,
See
Note 1, Table 7
Center Lines of Cavity
Bottom Cover Tape
User Direction of Unreeling
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
E1
P0
P2
8 mm
1.5 +0.10 -0.0
(0.059 +0.004 -0.0)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
G Minimum
0.10
(0.004)
Maximum
R Reference
Note 2
0.75
(0.030)
25
(0.984)
T Maximum
W Maximum
1.1
(0.098)
8.3
(0.327)
8.3
(0.327)
A0 B 0
T1 Maximum
Variable Dimensions — Millimeters (Inches)
Tape Size
Pitch
8 mm
Half (2 mm)
8 mm
Single (4 mm)
E2 Minimum
F
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
P1
2.0 ±0.05
(0.079 ±0.002)
4.0 ±0.10
(0.157 ±0.004)
Note 1
1. The cavity defined by A0, B0 and T shall surround the component with sufficient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
c) rotation of the component is limited to 20° maximum (see Figure 3).
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).
e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 6).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
16
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 Kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width
Peel Strength
8 mm
0.1 to 1.0 Newton (10 to 100 gf)
12 and 16 mm
0.1 to 1.3 Newton (10 to 130 gf)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180°
from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 3 – Maximum Component Rotation
°
T
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Typical Pocket Centerline
Tape
Width (mm)
8,12
16 – 200
Bo
Maximum
Rotation (
20
10
°
T)
Typical Component Centerline
Ao
Figure 4 – Maximum Lateral Movement
8 mm & 12 mm Tape
0.5 mm maximum
0.5 mm maximum
16 mm Tape
°
s
Tape
Maximum
Width (mm) Rotation (
8,12
20
16 – 56
10
72 – 200
5
°
S)
Figure 5 – Bending Radius
Embossed
Carrier
Punched
Carrier
1.0 mm maximum
1.0 mm maximum
R
Bending
Radius
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
R
C1001_C0G_200C_SMD • 3/24/2016
17
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Figure 6 – Reel Dimensions
Full Radius,
See Note
W3 (Includes
Access Hole at
Slot Location
(Ø 40 mm minimum)
flange distortion
at outer edge)
W2 (Measured at hub)
D
A
(See Note)
N
C
(Arbor hole
diameter)
B
(see Note)
W1 (Measured at hub)
If present,
tape slot in core
for tape start:
2.5 mm minimum width x
10.0 mm minimum depth
Note: Drive spokes optional; if used, dimensions B and D shall apply.
Table 8 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
A
B Minimum
C
D Minimum
8 mm
178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059)
13.0 +0.5/-0.2
(0.521 +0.02/-0.008)
20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size
N Minimum
W1
W2 Maximum
W3
50
(1.969)
8.4 +1.5/-0.0
(0.331 +0.059/-0.0)
12.4 +2.0/-0.0
(0.488 +0.078/-0.0)
16.4 +2.0/-0.0
(0.646 +0.078/-0.0)
14.4
(0.567)
18.4
(0.724)
22.4
(0.882)
Shall accommodate tape width
without interference
8 mm
12 mm
16 mm
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
18
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Figure 7 – Tape Leader & Trailer Dimensions
Embossed Carrier
Carrier Tape
Punched Carrier
8 mm & 12 mm only
END
Round Sprocket Holes
START
Top Cover Tape
Elongated Sprocket Holes
(32 mm tape and wider)
Trailer
160 mm Minimum
Components
100 mm
Minimum Leader
400 mm Minimum
Top Cover Tape
Figure 8 – Maximum Camber
Elongated sprocket holes
(32 mm & wider tapes)
Carrier Tape
Round Sprocket Holes
1 mm Maximum, either direction
Straight Edge
250 mm
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
19
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Waffle Tray Packaging Information – 2" x 2" w/ Static Protection
Figure 9 – Waffle Tray Dimensions – Inches (Millimeters)
M
0.10 (2.54) X 45°
M3
M1
Y
M2
X
X
A
Z
0.156 +0.002/-0.003
(3.962 +0.051/-0.076)
0.098
(2.489)
0.086
(2.184)
2.000 ±0.004 SQ
(50.800 ±0.102 SQ)
90°
0.004
(0.102)
1.800 ±0.004 SQ
(45.720 ±0.102 SQ)
1.812 ±0.004 SQ
(46.025 ±0.102 SQ)
STANDARD RIB MATRIX
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
20
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Table 9A – Waffle Tray Dimensions – Inches
Case Size
EIA (in)
0402
0504
0603
0805
1005
12061,2
12061,3
1210
1808
1812
1825
2220
2225
Metric (mm)
1005
1210
1608
2012
2512
3216
3216
3225
4520
4532
4564
5650
5664
M
±0.003
0.175
0.235
0.175
0.232
0.230
0.194
0.250
0.217
0.271
0.271
0.318
0.318
0.318
M1
±0.003
0.153
0.226
0.153
0.186
0.240
0.228
0.250
0.244
0.285
0.285
0.362
0.362
0.362
2" x 2" Waffle Tray Dimensions – Inches
M2
±0.002
0.077
0.172
0.077
0.181
0.190
0.193
0.375
0.215
0.286
0.286
0.424
0.424
0.424
M3
±0.002
0.110
0.170
0.110
0.171
0.140
0.124
0.167
0.174
0.243
0.243
0.34
0.34
0.34
X
±0.002
0.073
0.080
0.073
0.062
0.060
0.067
0.100
0.110
0.150
0.150
0.24
0.24
0.24
Y
±0.002
0.042
0.090
0.042
0.092
0.110
0.130
0.200
0.145
0.200
0.200
0.32
0.32
0.32
Z
±0.003
0.041
0.055
0.041
0.036
0.075
0.065
0.070
0.080
0.075
0.075
0.032
0.032
0.032
A°
± 1/2°
7
5
7
10
5
5
5
5
5
5
5
5
5
MATRIX
(X x Y)
16 X 23
10 X 10
16 X 23
10 X 10
12 X 9
14 X 9
10 X 5
10 X 8
7X6
7X6
5X4
5X4
5X4
Packaging Quantity
(pcs/unit packaging)
368
100
368
100
108
126
50
80
42
42
20
20
20
Packaging of 1206 (3216 metric) case size capacitors is dependent upon the nominal chip thickness of the device. See "Capacitance Range/Selection Waterfall"
and "Chip Thickness/Tape & Reel Packaging Quantities" to identify the nominal chip thickness of the capacitor.
2
Assigned to 1206 (3216 metric) case size capacitors with nominal thickness of ≤ 1.25mm (0.049 inches).
3
Assigned to 1206 (3216 metric) case size capacitors with nominal thickness of > 1.25mm (0.049 inches).
1
Table 9B – Waffle Tray Dimensions – Millimeters
Case Size
EIA (in)
0402
0504
0603
0805
1005
12061,2
12061,3
1210
1808
1812
1825
2220
2225
Metric (mm)
1005
1210
1608
2012
2512
3216
3216
3225
4520
4532
4564
5650
5664
M
±0.08
4.45
5.97
4.45
5.89
5.84
4.93
6.35
5.51
6.88
6.88
8.08
8.08
8.08
M1
±0.08
3.89
5.74
3.89
4.72
6.10
5.79
6.35
6.20
7.24
7.24
9.19
9.19
9.19
2" x 2" Waffle Tray Dimensions – Millimeters
M2
±0.05
1.96
4.37
1.96
4.60
4.83
4.90
9.53
5.46
7.26
7.26
10.77
10.77
10.77
M3
±0.05
2.79
4.32
2.79
4.34
3.56
3.15
4.24
4.42
6.17
6.17
8.64
8.64
8.64
X
±0.05
1.85
2.03
1.85
1.57
1.52
1.70
2.54
2.79
3.81
3.81
6.10
6.10
6.10
Y
±0.05
1.07
2.29
1.07
2.34
2.79
3.30
5.08
3.68
5.08
5.08
8.13
8.13
8.13
Z
±0.08
1.04
1.40
1.04
0.91
1.91
1.65
1.78
2.03
1.91
1.91
0.81
0.81
0.81
A°
± 1/2°
7
5
7
10
5
5
5
5
5
5
5
5
5
MATRIX
(X x Y)
16 X 23
10 X 10
16 X 23
10 X 10
12 X 9
14 X 9
10 X 5
10 X 8
7X6
7X6
5X4
5X4
5X4
Packaging Quantity
(pcs/unit packaging)
368
100
368
100
108
126
50
80
42
42
20
20
20
Packaging of 1206 (3216 metric) case size capacitors is dependent upon the nominal chip thickness of the device. See "Capacitance Range/Selection Waterfall"
and "Chip Thickness/Tape & Reel Packaging Quantities" to identify the nominal chip thickness of the capacitor.
2
Assigned to 1206 (3216 metric) case size capacitors with nominal thickness of ≤ 1.25mm (0.049 inches).
3
Assigned to 1206 (3216 metric) case size capacitors with nominal thickness of > 1.25mm (0.049 inches).
1
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1001_C0G_200C_SMD • 3/24/2016
21
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
KEMET Corporation
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Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not
assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of
KEMET Electronics Corporation.
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C1001_C0G_200C_SMD • 3/24/2016
22
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)
Disclaimer
All product specifications, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for checking and
verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed.
All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.
Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such applications, but are
not intended to constitute – and KEMET specifically disclaims – any warranty concerning suitability for a specific customer application or use. The Information is intended for use only
by customers who have the requisite experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise
provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no obligation or liability for the advice given or results obtained.
Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still
occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective
circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage.
Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other measures may not
be required.
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C1001_C0G_200C_SMD • 3/24/2016
23