Technical Explanation 3L Evaluation Inverter Revision: 02 Issue Date: 2014-07-04 Prepared by: Ingo Staudt Approved by: Ulrich Nicolai Keywords: 3L NPC Inverter, Multilevel, Evaluation Kit 3L SKiiP 28 MLI 07E3V1 Evaluation Inverter 1. General ............................................................................................................................................................ 1 1.1 Ordering the EVA Inverter ........................................................................................................................ 2 1.2 Optional Hardware for the EVA Inverter ................................................................................................... 2 2. Safety Instructions ........................................................................................................................................... 4 3. Technical Data ................................................................................................................................................ 6 3.1 EVA Inverter Block Diagram ..................................................................................................................... 6 3.2 Electrical and Mechanical Characteristics ................................................................................................ 7 3.3 Integrated Functions ................................................................................................................................. 7 3.4 Driver Board Description ........................................................................................................................... 9 4. Customer Interface ........................................................................................................................................ 11 4.1 Power Connection .................................................................................................................................. 11 4.2 Supply Connection .................................................................................................................................. 12 4.3 Control Interface ..................................................................................................................................... 13 5. Getting started ............................................................................................................................................... 19 5.1 Connecting the EVA Inverter .................................................................................................................. 19 5.2 Minimum Connection .............................................................................................................................. 19 6. Design Limits ................................................................................................................................................. 20 6.1 Cooling Limits ......................................................................................................................................... 20 6.2 Output Current Limits .............................................................................................................................. 20 6.3 DC-link Limits .......................................................................................................................................... 21 This Technical Explanation (TE) describes the SEMIKRON three level (3L) evaluation inverter; a three phase inverter based on 3L NPC (Neutral Point Clamped) MiniSKiiP modules. The TE explains the functionality of the inverter and provides information on technical details as well as a step-by-step instruction of how to set the inverter in operation. However, the information given may not be exhaustive and the responsibility for a proper and save setup remains with the user. 1. General SEMIKRON set up a three level (3L) evaluation inverter (in the following “EVA Inverter”) for evaluation purposes. It is able to carry a maximum current of 100A RMS at a DC-link voltage of up to 750VDC. Drivers and sensors (voltage, current, temperature) are on board. The user only needs to supply the EVA Inverter with power (DC-link voltage and auxiliary power) and PWM control signals. The inverter is designed to offer a high degree of self-protection: overvoltage, overcurrent, overtemperature and desaturation events are monitored and lead to a safe shut down. © by SEMIKRON 2014-Rev02 1 / 25 Technical Explanation 3L Evaluation Inverter However, the special feature is the implemented check for harmful switching patterns: a phase leg shoot through (all IGBTs of one phase leg switched on simultaneously) will be recognized and blocked by the driver. That way the inverter becomes very robust. The EVA Inverter is dedicated to both universities and professional development engineers. It offers an easy way to learn about the basic functionality of a 3L inverter, to try different control algorithms, and to run performance tests without bearing the risk of destroying the device. Fig. 1: SEMIKRON Evaluation Inverter 1.1 Ordering the EVA Inverter The MiniSKiiP MLI EVA Inverter has a unique item number and can be ordered directly at SEMIKRON Sales (please contact your sales partner). The order number is: 91 28 70 01 1.2 Optional Hardware for the EVA Inverter To bring the EVA Inverter in operation even faster, additional and helpful hardware can be ordered at EBV, Altera, and devboards. EBV and Altera both supply development boards with a Cyclone IV FPGA onboard: either the DBC4CE55 MercuryCode III Platform (EBV) or the INK Kit (Altera). Both boards can be used for controlling the EVA Kit. A 3L reference control software is available for the EBV board; please contact EBV for a copy of the source code. © by SEMIKRON 2014-Rev02 2 / 25 Technical Explanation 3L Evaluation Inverter Fig. 2: EBV DBC4CE55 Mercury Code III Platform Fig. 3: Altera INK Kit For the usage of one of the two above mentioned development boards the devboards adaptation board is required. It is the link between controller and inverter and is responsible for level shifting (3.3V ⇒ 15V logic level) to increase immunity to interference. Fig. 4: devboards EVA Inverter adaptation board © by SEMIKRON 2014-Rev02 3 / 25 Technical Explanation 3L Evaluation Inverter 2. Safety Instructions The EVA Inverter bares risks when put in operation. Please carefully read and obey the following safety instructions to avoid harm or damage to persons or gear. Tab. 1: Safety instructions In operation the EVA Inverter inherits high voltages that are dangerous to life! Only qualified personnel should work on the inverter. DC capacitor discharge time > 3min After disabling the DC supply the built-in resistors are able to reduce the DC-link voltage below 30V in a time greater than 3 minutes! Some parts of the EVA Inverter may reach high temperatures that might lead to burns when touched. The EVA Inverter does not provide a brake chopper! Regenerative braking (e.g. reversing a motor) is only possible with additional external hardware. The M5 mounting hole marked with the PE symbol provides a PE connecting point. The PE connection is mandatory! The minimum cross section of the PE connection is 16mm² (AWG5). © by SEMIKRON 2014-Rev02 4 / 25 Technical Explanation 3L Evaluation Inverter Fig. 5: Safety regulations for work with electrical equipment Safety Regulations for work with electrical equipment 1) Disconnect mains! 2) Prevent reconnection! 3) Test for absence of harmful voltages! 4) Ground and short circuit! 5) Cover or close of nearby live parts! To energize, apply in reverse order! Please follow the safety regulations for working safe with the EVA Inverter. © by SEMIKRON 2014-Rev02 5 / 25 Technical Explanation 3L Evaluation Inverter 3. Technical Data 3.1 EVA Inverter Block Diagram The electrical block diagram in Fig. 6 shows two parts: the red marked part (existing once) is responsible for the measurement of the DC-link voltages (upper and lower half), inherits the DC-link capacitors and the customer interface. Fig. 6: EVA Inverter block diagram DC+ 3x T1 IA2 G1 Driver T1 isolation amplifier T2 G2 Driver T2 E2 LEM T3 current sensor PS3 secondary side power supply D3 G3 Driver T3 E3 T4 PS4 secondary side power supply N C2 AC D6 PS2 secondary side power supply D2 C1 E1 D5 PS1 secondary side power supply 1x D1 IA3 D4 isolation amplifier G4 Driver T4 E4 DC- IA1 isolation amplifier NTC CPLD PS5 secondary side power supply Interface The green marked part exemplarily shows one of the three phase legs of the EVA Inverter (i.e. the green marked part exists three times). It inherits the power module and all required circuitry like driver circuits, galvanically isolated power supplies per IGBT, the current sensor, temperature measurement, and a programmable device (CPLD) that accounts for the correct switching pattern, correct switch-on and switch-off sequences, and the correct electrical limits (voltage, current, etc.). © by SEMIKRON 2014-Rev02 6 / 25 Technical Explanation 3L Evaluation Inverter 3.2 Electrical and Mechanical Characteristics With regard to the requirement specification the EVA Inverter allows for operation within the following boundaries: - Max. DC-link voltage Max. AC voltage (line to line) Max. AC current Max. Switching frequency Ambient temperature Max. Heatsink temperature Installation altitude IP rating Pollution Degree Climatic conditions VDC = 750V in total, max. 400V per individual DC-link half VAC = 480V IAC = 100ARMS (see chapter 6.2 for further restrictions) fsw = 20kHz Ta = 0°C…40°C (see chapter 6.2 for further restrictions) Ts = 80°C ≤ 2000m above sea level IP 00 PD 2 1K1, 2K2, 3K3 (3Z1) Neglecting the above mentioned boundaries may lead to malfunction or damage of the EVA Inverter. Concerning insulation coordination the EVA Inverter has been developed with respect to EN50178 and EN61800-5-1. An electrically protective separation is implemented between the customer interface (SELV – Safety Extra Low Voltage; framed in yellow color in Fig. 7) and the high voltage connections (framed in red color in Fig. 7). Basic insulation separates the heatsink from the high voltage connections. Fig. 7: Protective separation between high voltage (red marked area) and SELV (yellow marked area) 3.3 Integrated Functions The EVA Inverter has many integrated functions to ensure safe operation and to provide a maximum feedback to the user. AC phase current measurement / overcurrent protection (OCP) The EVA Inverter measures the AC currents of all three phase legs with galvanically isolated current transducers. The measured values are available at the corresponding control interface pins (see chapter 4.3) and are also used for the onboard overcurrent protection. The overcurrent protection (OCP) level is set to 25% © by SEMIKRON 2014-Rev02 7 / 25 Technical Explanation 3L Evaluation Inverter overload in regards to the nominal chip current (150Anom ∙ 1.25 = 187.5A ± 8A) where the EVA Inverter is switched off in order to protect the modules. Only affected modules are switched off. An overcurrent shutdown can be reset by clearing the fault latches (see chapter 4.3). Module temperature measurement / overtemperature protection The EVA Inverter measures the sensor temperatures of the three modules via galvanically isolated optocouplers. The measured values are available at the corresponding control interface pins (see chapter 4.3). At a sensor temperature of 115°C ± 4°C the affected module is switched off to avoid damage due to temperature overload. An overtemperature shutdown can be reset by clearing the fault latches (see chapter 4.3). DC-link voltage measurement / overvoltage protection The EVA Inverter measures the voltages of the two DC-link halves via galvanically isolated -optocouplers. The measured values are available at the corresponding control interface pins (see chapter 4.3). As soon as one or both DC-link halves exceed a voltage of 465VDC ± 14VDC the EVA Inverter is switched off to avoid damage to the chips due to dynamic voltage overshoots during switching. However, the EVA Inverter is not able to reduce the DC-link voltage in lack of a brake chopper. SEMIKRON recommend to make sure that the DC-link voltage does not exceed 750VDC at any time! An overvoltage shutdown can be reset by clearing the fault latches (see chapter 4.3). Additional protection circuitry – Desaturation Detection To protect the EVA Inverter from damage due to hard short curcuits, the IGBTs T1 and T4 of each phase are provided with a desaturation detection. Whenever one of the mentioned IGBTs is switched on and the forward voltage drop rises above 3V (normal operation voltage drop is around 1V), the respective IGBT is switched off by the driver immediately. Subsequently, the driver shuts down the malfunctioning phase and the DESAT LED flashes. A desaturation event can be reset by clearing the fault latches (see chapter 4.3). Additional protection circuitry – Active Clamping To make the EVA Inverter even more robust, it comes with an active clamping circuitry at every IGBT of each phase. A low reverse current through the clamping diodes arises at a VCE voltage across any IGBT of 430V…475V (depending on the ambient temperature and device tolerance). With rising VCE voltage the reverse current also increases until the affected IGBT starts conducting at V CE ≤ 600V, which leaves a sufficient margin to the IGBT’s blocking voltage of 650V. CPLD The driver board of the EVA Inverter comes with three CPLDs, one for each phase leg. The CPLDs supervise the switch-on and switch-off sequences of the IGBTs, the dead times, and the PWM sequences. All analogue signals are monitored and emergency procedures are implemented. That allows to identify if safe operating area is left. Switching sequence: The software makes sure that inner switches (T2, T3) are switched on before outer switches (T1, T4) and outer switches are switched off before inner switches. © by SEMIKRON 2014-Rev02 8 / 25 Technical Explanation 3L Evaluation Inverter Dead times: All dead times are set to 3µs. If the user dead time is set to 5µs, the EVA Inverter will run with this dead time. If the user dead time is set to <3µs, the CPLDs will extend the dead times to the minimum value of 3µs. Dead times below 3µs are not possible. PWM sequences: The PWM signals from the control interface have to take their way through the CPLDs where they are compared to a table of switching states (see Fig. 8). If the delivered PWM pattern can be found in the area marked green in Fig. 8 (allowd switching states), the pattern will be put through to the driver output stages. If the PWM pattern inherits a potentially destructive (Fig. 8, marked orange) or destructive (Fig. 8, marked red) state, the CPLD will shut down the phase leg with the correct switch-off sequence. As soon as the pattern is back to green, the phase leg resumes operation. Fig. 8: 3L NPC switching states T1 0 0 0 1 0 0 1 0 1 1 0 1 1 1 0 1 T2 0 1 0 1 1 0 0 0 0 0 1 1 1 0 1 1 T3 0 0 1 0 1 1 0 0 0 1 0 1 0 1 1 1 T4 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 state allowed potentially destructive destructive Analogue signal processing: Every analogue measured signal is compared with the maximum allowed values (current, temperature, voltage) and the result is processed by the CPLDs. If any of these values leaves the defined safe operation area, the affected phase leg of the EVA Inverter will be shut down and a warning LED will be activated. To reactivate the device, the user needs to clear the fault latches after eliminating the root cause of the fault. 3.4 Driver Board Description The driver board can be separated in several functional groups as shown in Fig. 9 (right image): three more or less identical groups for the driver stages of phases U, V and W (marked yellow), five -optocouplers (two for the DC-link voltage and three for the temperature measurement) marked red, and the galvanic isolation (blue) represent the main functional groups. The board further inherits several voltage regulators and operational amplifiers for signal matching. In the center of the driver board (Fig. 9, left image) three LEDs (marked blue) inform the user about the status of the EVA Inverter. As soon as the auxiliary power supply is applied, the POWER LED flashes. The UVLO LED shows if the power supply has fallen below a critical value. Then the inverter is deactivated and the summing faults of all three phases go to 0V. The DC-link LED warns about too high DC-link voltage. Per phase leg three LEDs (Fig. 9, left image, marked red) show the status: OCP flashes when the current exceeds the limit, DESAT flashes in case of a desaturation event, and TEMP flashes when the module gets too hot. Furthermore the driver board offers points of measurement for the gate and emitter potentials of all IGBTs of the three phase legs. The location of those points are highlighted in Fig. 9 (left image, marked yellow). © by SEMIKRON 2014-Rev02 9 / 25 © by SEMIKRON 2014-Rev02 DRIVER PHASE U OCP DESAT TEMP G2 E2 E1 G1 G3 E3 UVLO POWER DC-LINK E1 OCP DESAT TEMP DRIVER PHASE V G4 E4 -optocouplers for voltage and temperature measurement Galvanic isolation of AUX supply of SELV and high voltage side G4 G3 E3 E4 E2 G2 G1 E1 OCP G1 DESAT G2 TEMP E2 DRIVER PHASE W G4 G3 E3 E4 Technical Explanation 3L Evaluation Inverter Fig. 9: Description driver board: points of measurement, status LEDs, functional groups 10 / 25 Technical Explanation 3L Evaluation Inverter 4. Customer Interface 4.1 Power Connection The location of the power terminals is shown below. The signal names (U, V, W, DC+, N, DC-, PE) are also printed on the board / the heatsink. Fig. 10: Position of power terminals AC connection PE connection DC connection Tab. 2: Mounting instructions for power terminals Mounting with: Mounting torque Cross-section area* DC-link (DC+, N, DC-) M6 cable shoe & M6 washer, snap ring, and nut 3.9Nm 35mm² or AWG2** AC connection (U, V, W) M6 cable shoe & M6 washer, snap ring, and nut 3.9Nm 35mm² or AWG2** PE connection M5 cable shoe & M5 bolt, snap ring, and washer 2.2Nm 16mm² or AWG5 *(at IAC = 100ARMS and THDDC-supply = 0%); **(required cross-section area may differ depending on type of wire and allowed cable temperature) In order to reduce mechanical stress on the power terminals, the user is asked to provide appropriate laying of the cables. © by SEMIKRON 2014-Rev02 11 / 25 Technical Explanation 3L Evaluation Inverter 4.2 Supply Connection The location of the supply plug is shown below. The correct polarity is also printed on the PCB. EVA Inverter operation with switched-off fans (VFAN < 5V) is possible, however, SEMIKRON recommend a minimum fan supply of 5VDC to guarantee a minimum air flow. Please refer to chapter 6.1 for further information about cooling limits. Fig. 11: Position of supply connectors + Fan supply - Driver supply -+ Tab. 3: Supply connection Connector Fan supply Driver supply © by SEMIKRON Voltage Current 4mm banana jack 5VDC…24VDC max. 1A Phoenix MSTB 2.5/2-ST-5.08 24VDC ±10% max. 1A 2014-Rev02 12 / 25 Technical Explanation 3L Evaluation Inverter 4.3 Control Interface The control interface is a 40-pin ribbon cable plug located on the driver board (see below). The maximum allowed length of the ribbon cable is 1m, based on an input threshold voltage of V ref_in = 15V. At lower voltage levels correct functionality cannot be guaranteed. Higher levels do not increase the maximum cable length. The user needs to make sure that the EVA Inverter is supplied with proper signal. Fig. 12: Position of the 40-pin control interface 40-pin control interface Tab. 4: Pin assignment of the 40-pin control interface Pin # Signal name Voltage level Function 0V 1 GND Ground 2 T1_Phase_U PWM pattern IGBT T1 of phase U 3 T2_Phase_U PWM pattern IGBT T2 of phase U 4 T3_Phase_U PWM pattern IGBT T3 of phase U 5 T4_Phase_U PWM pattern IGBT T4 of phase U 6 GND Ground 7 T1_Phase_V PWM pattern IGBT T1 of phase V 8 T2_Phase_V PWM pattern IGBT T2 of phase V 9 T3_Phase_V PWM pattern IGBT T3 of phase V 10 T4_Phase_V PWM pattern IGBT T4 of phase V 11 GND Ground 12 T1_Phase_W PWM pattern IGBT T1 of phase W 13 T2_Phase_W PWM pattern IGBT T2 of phase W 14 T3_Phase_W PWM pattern IGBT T3 of phase W 15 T4_Phase_W PWM pattern IGBT T4 of phase W © by SEMIKRON Off = 0V / On = Vref_In; Rin = 12k / 1nF 0V Off = 0V / On = Vref_In; Rin = 12k / 1nF 0V 2014-Rev02 Off = 0V / On = Vref_In; Rin = 12k / 1nF 13 / 25 Technical Explanation 3L Evaluation Inverter Ground 0V Reserved pins, DO NOT CONNECT! Reserved pins, DO NOT CONNECT! _Fault_U Summing fault phase U 21 _Fault_V Summing fault phase V 22 _Fault_W Summing fault phase W Fault = 0V / ready-for-operation = Vref_In (Pull-Up to Vref_In on user side; Rpull-up = 1k) 16 GND 17 RESERVE 18 RESERVE 19 RESERVE 20 Clear = 0V 23 _Clear_Faults Input for resetting /clearing fault latches (Pull-Up to Vref_In on user side; Rpull-up = 1k; Rin = 12k / 1nF) POR = 0V / ready = Vref_In 24 _POR Output of local power-on-reset (Pull-Up to Vref_In on user side; Rpull-up = 1k) 25 Vref_In Setting of input threshold Vref_In = +3.3…+24V; Rin = 12k /1nF 26 GND Ground 0V 27 GND Ground 0V 28 VDC,TOP Voltage DC+ to N 29 VDC,BOT Voltage N to DC- 0V…10V ≙ 0V…500V; Iout ≤ 5mA 30 GND Ground 0V 31 IAC,U Phase current U 0V…±10V ≙ 0A…±187.5A; Iout ≤ ±5mA 32 GND Ground 0V 33 IAC,V Phase current V 0V…±10V ≙ 0A…±187.5A; Iout ≤ ±5mA 34 GND Ground 0V 35 IAC,W Phase current W 0V…±10V ≙ 0A…±187.5A; Iout ≤ ±5mA 36 GND Ground 0V 37 Tsense,U Temperature power module U 38 TSense,V Temperature power module V 39 TSense,W Temperature power module W 40 GND Ground 0V…10V ≙ 0°C…130°C; Iout ≤ 5mA 0V Shorting output signals to each other or to supply pins may damage the driver board! © by SEMIKRON 2014-Rev02 14 / 25 Technical Explanation 3L Evaluation Inverter TY_Phase_X (Y = 1..4, X = U, V, W) Tab. 5: TY_Phase_X Signal type Signal function Pin Voltage levels digital input PWM pattern for IGBT Y of phase X 3-5, 7-10, 12-15 0V vs. GND (logic low) → off Vref_In vs. GND (logic high) → on _Fault_X (X = U, V, W) Tab. 6: _Fault_X Signal type digital output Signal function Summing error of phase X Pin Voltage levels 20-22 0V vs. GND (logic low) → fault state, phase X switches off regardless of input PWM Vref_In vs. GND (logic high) → EVA Inverter ready for operation The maximum output current of _Fault_X may not exceed 50mA. As soon as the fault is no longer present, the fault state can be reset with the _Clear_Faults signal. The user needs to provide a 1k pull-up resistor to Vref_In. _Clear_Faults Tab. 7: _Clear_Faults Signal type digital input Signal function Reset input Pin Voltage levels 23 0V vs. GND (logic low) → fault latches are cleared, no further errors can occur Vref_In vs. GND (logic high) → fault latches can be set The user needs to provide a 1k pull-up resistor to Vref_In. Dragging the _Clear_Faults input to GND clears the fault latches and resets the EVA Inverter to operational mode. As long as _Clear_Faults is set to 0V, the inverter is operational, but without protection! ATTENTION: The EVA Inverter can be operated with permanent connection of _Clear_Faults to GND. If this mode is chosen the inverter will not have any protection (temperature, current, etc.) at all! SEMIKRON recommend not to use this mode. _POR Tab. 8: _POR Signal type digital output © by SEMIKRON Signal function Power-on-reset Pin Voltage levels 24 0V vs. GND (logic low) → power-on reset, EVA Inverter not yet ready for operation Vref_In vs. GND (logic high) → EVA Inverter ready for operation 2014-Rev02 15 / 25 Technical Explanation 3L Evaluation Inverter The maximum output current of _POR may not exceed 50mA. The user needs to provide a 1k pull-up resistor to Vref_In. Vref_In Tab. 9: Vref_In Signal type Signal function Pin Voltage levels reference input Setting of the logic high voltage level 25 +3.3V ≤ Vref_In ≤ +24V Vref_In is to be chosen by the user; it is the voltage value for the logic high level. It may be chosen between 3.3V and 24V vs. GND. The voltage level of Vref_In is the level that is set for all digital high levels of input and output signals. The tolerance thresholds of logic high and low level are set according to Vref_In as follows: - 0V < VI/O < ⅓ Vref_In → logic low level - ⅔ Vref_In < VI/O < Vref_In → logic high level (VI/O stands for the voltage of the digital input or output signals.) SEMIKRON recommend high values for high immunity. VDC,XXX (XXX = TOP, BOT) Tab. 10: VDC,XXX Signal type Signal function analogue output Voltage measurement of DC-link half TOP / BOT Pin Voltage levels 28, 29 0V vs. GND → 0V DC+ vs. N / 0V N vs. DC10V vs. GND → 500V DC+ vs. N / 500V N vs. DCLinear gradient between 0V (0V) and 10V (500V) The maximum output current of VDC,XXX may not exceed 5mA. The tolerance of the voltage measurement is ±2% with regard to the maximum measurable voltage of 500VDC at an ambient temperature of 25°C. The additional temperature dependent tolerance is ±0.85% at an ambient temperature of 0°C. The overvoltage protection intervenes at 465VDC ±14VDC. This refers to 9.3V at the corresponding control interface pins. IAC,X (X = U, V, W) Tab. 11: IAC,X Signal type Signal function Pin Voltage levels analogue output Current measurement of phase X 31, 33, 35 ±0V vs. GND → ±0A at phase U / V / W ±10V vs. GND → ±187.5A at phase U / V / W Linear gradient between 0V and ±10V (±187.5A) The maximum output current of IAC,X may not exceed ±5mA. A positive measurement of the current refers to a positive technical current; a positive technical current represents the current flow away from the EVA Inverter towards the load. © by SEMIKRON 2014-Rev02 16 / 25 Technical Explanation 3L Evaluation Inverter The tolerance of the current measurement is ±3% with regard to the peak current of ±187.5A at an ambient temperature of 25°C. The additional temperature dependent tolerance is ±1.25% at an ambient temperature of 0°C and linearly degrades to ±0.75% at an ambient temperature of 40°C. The overcurrent protection (OCP) trip level is ±187.5A. That refers to ±10V at the corresponding control interface pins. TSense,X (X = U, V, W) Tab. 12: TSense,X Signal type analogue output Signal function Pin Temperature measurement of module X Voltage levels 37-39 0V vs. GND → 0°C at sensor of module X 10V vs. GND → 130°C at sensor of module X Non-linear gradient between 0V (0°C) and 10V (130°C) The maximum output current of TSense,X may not exceed 5mA. A ±0,3V measurement tolerance needs to be taken into account. That refers to ±4°C. The non-linear temperature/voltage gradient is shown in Fig. 13. Fig. 14 examplarily shows some temperatures and the according voltages at the corresponding control interface pins. Fig. 13: Temperature/voltage gradient of TSense,X – measurement vs. the sensor temperature TSense,X V_Tsense_X20=f(Ts) MLI Re-Design 10,00 10V 9.2V9,00 overtemperature shutdown threshold 8,00 7,00 Sollwerte Tsense [V] 6,00 5,00 4,00 3,00 2,00 1,00 0V 0,00 -1,000°C 0 115°C 10 20 30 40 50 60 70 80 90 100 130°C sensor temperature 110 120 130 Tsensor (Shibaura) [°C] © by SEMIKRON 2014-Rev02 17 / 25 Technical Explanation 3L Evaluation Inverter Fig. 14: Sensor temperatures and according voltages Sensor temperature 0°C 25°C 50°C 75°C 100°C 115°C 130°C Measured voltage 0V 1.35V 3.65V 6.12V 8.25V 9.2V 10V GND Tab. 13: IAC,X Signal type GND / ground Signal function Pin Voltage levels GND / ground 1, 6, 11, 16, 26, 27, 30, 32, 34, 36, 40 ±0V, GND, ground No difference has been made between the ground potentials of analogue and digital signals. © by SEMIKRON 2014-Rev02 18 / 25 Technical Explanation 3L Evaluation Inverter 5. Getting started To set the EVA Inverter in operation only a view handles are necessary: 5.1 Connecting the EVA Inverter For safe and proper operation the following connections need to be made: - PE connection - Fan supply - Driver supply - DC-link connection (DC+, N, DC-) - AC connection (U, V, W) - Logic interface connection Fig. 15: Connecting the EVA Inverter Please refer to chapters 4.1 and 4.2 for cross section areas, mounting torques, and the correct voltage levels. 5.2 Minimum Connection - For operation at low loads the fan supply is not absolutely necessary. However, SEMIKRON recommend a minimum fan supply of 5VDC during operation (please refer to chapter 6.1). If N is not externally controlled, the user will have to make sure that the DC-link halves stay voltagebalanced by using adequate PWM patterns. The minimum required connections in the logic interface (40pin connector) are pins 1-16 (PWM signals of all IGBTs and digital ground), pin 23 (_Clear_Faults, pull-up to pin 25, Vref_In mandatory), pin 25 (Vref_In), and pin 26 (digital ground). The other pins may be left out. However, SEMIKRON recommend the connection of all digital logic s ignals in order to be able to monitor errors. © by SEMIKRON 2014-Rev02 19 / 25 Technical Explanation 3L Evaluation Inverter 6. Design Limits The design limits of the EVA Inverter allow for a maximum heatsink temperature of 80°C and an AC output current of 100ARMS at certain operating conditions. The restrictions, maximum values, and derating curves are shown and explained below. 6.1 Cooling Limits The SEMIKRON standard heatsink P21 provides an Rth = 0.06K/W at an airflow of 5m/s. To reach that flow the three fans need to provide an air volume of 85m³/h each. That can be realized by operating the fans at 24VDC. At a switching frequency of 3kHz, AC current of 100ARMS, and DC-link voltage of 750VDC the power loss per module is approx. 300W. Given the thermal resistance of Rth = 0.06K/W and a total power loss of 900W the temperature rise of the heatsink is 55K. At 25°C ambient temperature the heatsink reaches 80°C, which is the defined design limit. Staying within the design limit requires a derating of the rated AC current that is related to the ambient temperature (Ta). Fig. 16: Derating of rated AC current vs. ambient temperature IAC,rated Vfan = 24V 100% 65% 25°C 40°C Ta Please refer to chapter 6.2 for the AC current. Example: The AC current at 20kHz and 25°C is 50ARMS. At an ambient temperature of 40°C the maximum rated AC current is 75% of 50ARMS ⇒ 37,5ARMS. It is also possible to reduce the supply voltage of the fans (voltage range 5V…24V). Please make sure that the heatsink temperature does not exceed 80°C at any time. 6.2 Output Current Limits The maximum AC output current is 100ARMS. This value will be able to be reached at 0°C…25°C ambient temperature, if the fans are operated with 24VDC at a switching frequency of 3kHz, and if the DC-link is supplied by pure DC current (no AC component; THDDC-link supply = 0%). © by SEMIKRON 2014-Rev02 20 / 25 Technical Explanation 3L Evaluation Inverter At higher switching frequencies the power modules produce higher losses so that the output AC current needs to be reduced. At 20kHz (maximum switching frequency) the limit is 50ARMS. The derating curve for values between 3kHz and 20kHz is shown below. Fig. 17: Derating of AC current vs. switching frequency IAC Ta = 0°C...25°C Vfan = 24V THDDC-link supply = 0% 100A 50A 3kHz 20kHz fsw Please refer to chapter 6.1 for higher ambient temperatures. If the DC-link is fed with something else than DC current with THD = 0%, please refer to chapter 6.3 for derating curves. 6.3 DC-link Limits The installed DC-link capacitors can handle AC current up to 9.3A per capacitor at 300Hz and up to 10.3A per capacitor at a switching frequency of 3kHz (61.8A total). A higher frequency does not increase the AC current capapility. If the EVA Inverter is operated at 100ARMS output current (at cos = 1), the corresponding AC load at the DClink will be 60ARMS. To permit that operating point it is necessary to feed the DC-link without an additional AC current component to avoid damaging the capacitors, e.g. a DC power supply. If the DC-link is fed by a B6 bridge rectifier, the DC capacitors will be exposed to an additional 300Hz AC current component. At 100ARMS output current the 300Hz ripple current is 93A. There are two possibilities to handle the additional AC load: either by paralleling 10 additional DC capacitors of the same type (per half DClink ⇒ 20 capacitors in total required) or by inserting a supply line inductance (L supply). Using an inductor with 100µH in the supply line reduces the AC ripple current to 70A, 1.6mH to 10A, which would require only one additional capacitor per DC-link half (see Fig. 18). Moreover a combination of both methods may be considered. At pure active power (cos = 1), the 300Hz ripple is 93A, the less active and the more reactive power the EVA Inverter provides, the lower the 300Hz ripple becomes. At pure reactive power (cos = 1), the 300Hz AC ripple © by SEMIKRON 2014-Rev02 21 / 25 Technical Explanation 3L Evaluation Inverter current is approximately 3A. This value is dependent on the magnetic and resistive losses in the load and on the losses in the EVA Inverter (see Fig. 19). Fig. 18: Dependency of DC-link supply ripple vs. DC-link supply line inductance Iripple,DC-link VDC = 750V IAC = 100A cos = 1 93A 70A 10A 0H 100µH 1,6mH Lsupply Fig. 19: Dependency of DC-link supply ripple vs. power factor Iripple,DC-link 93A VDC = 750V IAC = 100A Lsupply = 0H * DC-link supply ripple dependent on magnetic copper losses in load also and ≈ 3A* cos = 0 cos = 1 © by SEMIKRON 2014-Rev02 cos 22 / 25 Technical Explanation 3L Evaluation Inverter Fig. 1: SEMIKRON Evaluation Inverter ..................................................................................................................2 Fig. 2: EBV DBC4CE55 Mercury Code III Platform ................................................................................................3 Fig. 3: Altera INK Kit ...............................................................................................................................................3 Fig. 4: devboards EVA Inverter adaptation board ..................................................................................................3 Fig. 5: Safety regulations for work with electrical equipment .................................................................................5 Fig. 6: EVA Inverter block diagram .........................................................................................................................6 Fig. 7: Protective separation between high voltage (red marked area) and SELV (yellow marked area) ..............7 Fig. 8: 3L NPC switching states ..............................................................................................................................9 Fig. 9: Description driver board: points of measurement, status LEDs, functional groups ................................. 10 Fig. 10: Position of power terminals .................................................................................................................... 11 Fig. 11: Position of supply connectors ................................................................................................................. 12 Fig. 12: Position of the 40-pin control interface ................................................................................................... 13 Fig. 13: Temperature/voltage gradient of TSense,X – measurement vs. the sensor temperature .......................... 17 Fig. 14: Sensor temperatures and according voltages ........................................................................................ 18 Fig. 15: Connecting the EVA Inverter .................................................................................................................. 19 Fig. 16: Derating of rated AC current vs. ambient temperature........................................................................... 20 Fig. 17: Derating of AC current vs. switching frequency ..................................................................................... 21 Fig. 18: Dependency of DC-link supply ripple vs. DC-link supply line inductance .............................................. 22 Fig. 19: Dependency of DC-link supply ripple vs. power factor ........................................................................... 22 Tab. 1: Safety instructions ......................................................................................................................................4 Tab. 2: Mounting instructions for power terminals ............................................................................................... 11 Tab. 3: Supply connection ................................................................................................................................... 12 Tab. 4: Pin assignment of the 40-pin control interface ........................................................................................ 13 Tab. 5: TY_Phase_X ........................................................................................................................................... 15 Tab. 6: _Fault_X ................................................................................................................................................ 15 Tab. 7: _Clear_Faults .......................................................................................................................................... 15 Tab. 8: _POR ....................................................................................................................................................... 15 Tab. 9: Vref_In ..................................................................................................................................................... 16 Tab. 10: VDC,XXX.................................................................................................................................................... 16 Tab. 11: IAC,X ........................................................................................................................................................ 16 Tab. 12: TSense,X .................................................................................................................................................... 17 Tab. 13: IAC,X ........................................................................................................................................................ 18 © by SEMIKRON 2014-Rev02 23 / 25 Technical Explanation 3L Evaluation Inverter Symbols and Terms Letter Symbol Term 2L Two level 3L Three level AC Alternating Current AWG American Wire Gauge CD Clamping Diode cos Power factor CPLD Complex Programmable Logic Device DC Direct Current DC+ Positive potential (terminal) of a direct voltage source DC- Negative potential (terminal) of a direct voltage source DESAT Desaturation FPGA Field Programmable Gate Array fSW Switching frequency FWD Free Wheeling Diode GND Ground I/O Input / output IGBT Insulated Gate Bipolar Transistor IRMS AC terminal current LED Light Emitting Diode MLI Multi Level Inverter N Neutral potential (terminal) of a DC voltage source; midpoint between DC+ and DC- NPC Neutral Point Clamped NTC Temperature sensor with negative temperature coefficient OCP Overcurrent protection PE Power Earth PWM Pulse Width Modulation RMS Root Mean Square Rth Thermal resistance SELV Safety Extra Low Voltage Ta Ambient temperature THD Total Harmonic Distortion Ts Heatsink temperature UVLO Under-voltage lock-out V Voltage VCE Forward threshold voltage (IGBT) VDC Total supply voltage (DC+ to DC-) VRMS AC terminal voltage A detailled explanation of the terms and symbols can be found in the "Application Manual Power Semiconductors" [2] © by SEMIKRON 2014-Rev02 24 / 25 Technical Explanation 3L Evaluation Inverter References [1] www.SEMIKRON.com [2] A. Wintrich, U. Nicolai, W. Tursky, T. Reimann, “Application Manual Power Semiconductors”, ISLE Verlag 2011, ISBN 978-3-938843-666 [3] I. Staudt, “AN11001 – 3L NPC & TNPC Topology”, Application Note, http://www.semikron.com, 2011 HISTORY SEMIKRON reserves the right to make changes without further notice herein DISCLAIMER SEMIKRON reserves the right to make changes without further notice herein to improve reliability, function or design. Information furnished in this document is believed to be accurate and reliable. However, no representation or warranty is given and no liability is assumed with respect to the accuracy or use of such information, including without limitation, warranties of non-infringement of intellectual property rights of any third party. SEMIKRON does not assume any liability arising out of the application or use of any product or circuit described herein. Furthermore, this technical information may not be considered as an assurance of component characteristics. No warranty or guarantee expressed or implied is made regarding delivery, performance or suitability. This document supersedes and replaces all information previously supplied and may be superseded by updates without further notice. SEMIKRON products are not authorized for use in life support appliances and systems without the express written approval by SEMIKRON. SEMIKRON INTERNATIONAL GmbH P.O. Box 820251 • 90253 Nuremberg • Germany Tel: +49 911-65 59-234 • Fax: +49 911-65 59-262 [email protected] • www.semikron.com © by SEMIKRON 2014-Rev02 25 / 25