SMJ27C512

UVEPROM
SMJ27C512
512K UVEPROM
PIN ASSIGNMENT
(Top View)
UV Erasable Programmable
Read-Only Memory
28-Pin DIP (J) 600-Mils
AVAILABLE AS MILITARY
SPECIFICATIONS
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
• SMD 5962-87648
• MIL-STD-883
FEATURES
•
•
•
•
•
•
•
•
•
•
•
Organized 65,536 x 8
High-reliability MIL-PRF-38535 processing
Single +5V ±10% power supply
Pin-compatible with existing 512K read-only memories (ROMs)
and electrically programmable ROMs (EPROMs)
All inputs/outputs fully TTL compatible
Power-saving CMOS technology
Very high-speed SNAP! Pulse Programming
3-state output buffers
400mV minimum DC noise immunity with standard TTL loads
Latchup immunity of 250mA on all input and output lines
Low power dissipation (CMOS input levels)
3Active - 193mW (MAX)
3Standby - 1.7mW (MAX)
OPTIONS
• Timing
Pin Name
A0 - A15
DA0-DQ7
E\
GND
G\ /VPP
VCC
MARKING
150ns access
200ns access
250ns access
J
• Operating Temperature Ranges
Military (-55oC to +125oC)
M
Vcc
A14
A13
A8
A9
A11
G\/VPP
A10
E\
DQ7
DQ6
DQ5
DQ4
DQ3
Function
Address Inputs
Inputs (programming)/Outputs
Chip Enable/Power Down
Ground
Output Enable/13V Programming
5V Power Supply
The SMJ27C512 is a set of 65536 by 8-bit (524,288-bit),
ultraviolet (UV) light erasable, electrically programmable
read-only memories. These devices are fabricated using powersaving CMOS technology for high speed and simple interface
with MOS and bipolar circuits. All inputs (including program
data inputs can be driven by Series 54 TTL circuits without
the use of external pullup resistors. Each output can drive one
Series 54 TTL circuit without external resistors. The data outputs are 3-state for connecting multiple devices to a common
bus. The SMJ27C512 is pin-compatible with existing 28-pin
512K ROMs and EPROMs.
Because this EPROM operates from a single 5V supply
(in the read mode), it is ideal for use in microprocessor-based
systems. One other supply (13V) is needed for programming.
All programming signals are TTL level. This device is programmable by the SNAP! Pulse programming algorithm. The
SNAP! Pulse programming algorithm uses a VPP of 13V and
a VCC of 6.5V for a nominal programming time of seven seconds. For programming outside the system, existing EPROM
programmers can be used. Locations may be programmed
singly, in blocks, or at random.
No. 110
For more products and information
please visit our web site at
www.micross.com
SMJ27512
Rev. 1.2 01/10
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GENERAL DESCRIPTION
-15
-20
-25
• Package(s)
Ceramic DIP (600mils)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Micross Components reserves the right to change products or specifications without notice.
1
UVEPROM
SMJ27C512
FUNCTIONAL BLOCK DIAGRAM*
EPROM 65,536 x 8
10
9
8
7
6
5
4
3
25
24
21
23
2
26
27
1
20
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
E\
22
G\ /VPP
0
0
65,535
A
A
A
A
A
A
A
A
A
11
12
13
15
16
17
18
19
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
15
[PWR DWN]
&
EN
* This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
OPERATION
The seven modes of operation for the SMJ27C512 are listed in Table 1. The read mode requires a single 5V supply. All
inputs are TTL level except for VPP during programming (13V for SNAP! Pulse), and 12V on A9 for signature mode.
TABLE 1. OPERATION MODES
MODE*
OUTPUT
PROGRAM
SIGNATURE MODE
STANDBY PROGRAMMING VERIFY
DISABLE
INHIBIT
VIL
VIL
VIH
VIL
VIL
VIH
FUNCTION
(PINS)
READ
E\ (20)
VIL
G\ /VPP (22)
VIL
VIH
X
VPP
VIL
VPP
VIL
VCC (28)
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A9 (24)
X
X
X
X
X
X
VID
VID
A0 (10)
X
X
X
X
X
X
VIL
VIH
High-Z
High-Z
Data In
Data Out
High-Z
DQ0-DQ7
Data Out
(11-13, 15-19)
CODE
MFG
DEVICE
97h
85h
* X can be VIL or VIH
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifications without notice.
2
UVEPROM
SMJ27C512
READ/OUTPUT DISABLE
When the outputs of two or more SMJ27C512 are connected
in parallel on the same bus, the output of any particular device
in the circuit can be read with no interference from competing
outputs of the other devices. To read the output of the selected
SMJ27C512, a low-level signal is applied to the E\ and G\ /
VPP. All other devices in the circuit should have their outputs
disabled by applying a high-level signal to one of these pins.
Output data is accessed at pins DQ0 through DQ7.
SNAP! PULSE PROGRAMMING
The SMJ27C512 is programmed using the SNAP! Pulse
programming algorithm as illustrated by the flowchart in
Figure 1. This algorithm programs in a nominal time of seven
seconds. Actual programming time varies as a function of the
programmer used.
Data is presented in parallel (eight bits) on pins DQ0 to DQ7.
Once addresses and data are stable, E\ is pulsed. The SNAP!
Pulse programming algorithm uses an initial pulse of 100μs
followed by a byte verification to determine when the addressed
byte has been successfully programmed. Up to ten 100μs pulses
per byte are provided before a failure is recognized.
LATCHUP IMMUNITY
Latchup immunity on the SMJ27C512 is a minimum of 250mA
on all inputs and outputs. This feature provides latchup immunity beyond any potential transients at the printed circuit
board level when the EPROM is interfaced to industry-standard
TTL or MOS logic devices. Input/output layout approach
controls latchup without compromising performance or packing density.
The programming mode is achieved when G\ /VPP = 13V,
VCC= 6.5V, and E\ = VIL. More than one device can be programmed when the devices are connected in parallel. Locations
can be programmed in any order. When the SNAP! Pulse programming routine is complete, all bits are verified with VCC =
5V, G\ /VPP = VIL, and E\ = VIL.
POWER DOWN
Active ICC supply current can be reduced from 35mA to
500μA(TTL-level inputs) or 300μA (CMOS-level inputs) by
applying a high TTL/CMOS signal to the E\ pin. In this mode
all outputs are in the high-impedance state.
PROGRAM INHIBIT
Programming can be inhibited by maintaining high level
input on E\.
ERASURE
Before programming, the SMJ27512 is erased by exposing the
chip through the transparent lid to a high-intensity ultraviolet
(UV) light (wavelength 2537 Å). EPROM erasure before
programming is necessary to assure that all bits are in the
logic-high state. Logic lows are programmed into the desired
locations. A programmed logic low can be erased only by ultraviolet light. The recommended minimum exposure dose (UV
intensity x exposure time) is 15 W.s/cm2. A typical 12mW/cm2,
filterless UV lamp erases the device in 21 minutes. The lamp
should be located about 2.5cm above the chip during erasure.
After erasure, all bits are in the high state. It should be noted
that normal ambient light contains the correct wavelength for
erasure; therefore, when using the SMJ27C512, the window
should be covered with an opaque label.
SMJ27512
Rev. 1.2 01/10
PROGRAM VERIFY
Programmed bits can be verified with G\ /VPP and E\ = VIL.
SIGNATURE MODE
The signature mode provides access to a binary code
identifying the manufacturer and device type. This mode is
activated when A9 (terminal 24) is forced to 12V ±0.5V. Two
identifier bytes are accessed by A0 (terminal 10); i.e., A0 =
VIL accesses the manufacturer code, which is output on DQ0DQ7; A0 = VIH accesses the device code, which is also output
on DQ0-DQ7. All other addresses must be held at VIL. Each
byte possesses odd parity on bit DQ7. The manufacturer code
for these devices is 97h and the device code is 85h.
Micross Components reserves the right to change products or specifications without notice.
3
UVEPROM
SMJ27C512
FIGURE 1. SNAP! PULSE PROGRAMMING FLOW CHART
START
Address = First Location
VCC = 6.5V ± 0.25V, G\ /VPP = 13V ± 0.25V
Program
Mode
Program One Pulse = tW = 100μs
Last
Address?
Increment Address
No
Yes
Address = First Location
X=0
Program One Pulse = tW = 100μs
No
Verify
Word
Increment
Address
Fail
X = X+1
Interactive
Mode
Pass
No
X = 10?
Last
Address?
Yes
Yes
Device Failed
VCC = 5V ± 0.5V, G\ /VPP = VIL
Compare
All Bytes
to Original
Data
Fail
Final
Verification
Pass
Device Passed
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifications without notice.
4
UVEPROM
SMJ27C512
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage Range, VCC**...........................-0.6V to +7.0V
Supply Voltage Range, Vpp**.........................-0.6V to +14.0V
Input Voltage Range, All inputs except A9**....-0.6V to 6.5V
A9....-0.6V to +13.5V
Output Voltage Range**...............................-0.6V to VCC +1V
Operating Cage Temperature Range, TC.........-55°C to 125°C
Storage Temperature Range, Tstg.....................-65°C to 150°C
*Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operation
section of this specification is not implied.
Exposure to
absolute maximum rating conditions for extended periods may
affect reliability.
** All voltage values are with respect to GND.
RECOMMENDED OPERATING CONDITIONS
1
VCC
Supply Voltage
MIN
4.5
6.25
12.75
MAX
5.5
6.75
13.25
UNIT
V
V
V
11.5
12.5
V
2
VCC+1
V
VCC-0.2
-0.5
-0.5
-55
VCC+1
0.8
0.2
125
V
V
V
°C
Read Mode
SNAP! Pulse programming algorithm
SNAP! Pulse programming algorithm
G\ /VPP Supply Voltage2
Voltage level on A9 for signature mode
VID
TTL
VIH
High-level DC input voltage
VIL
Low-level DC input voltage
TC
Operating case temperature
CMOS
TTL
CMOS
NOM
5
6.5
13
NOTES:
1. VCC must be applied before or at the same time as G\ /VPP and removed after or at the same time as G\ /VPP. The deivce must not be inserted into or
removed from the board when G\ /VPP or VCC is applied.
2. G\ /VPP can be connected to VCC directly (except in the program mode). VCC supply current in this case is ICC + IPP.
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED RANGES OF
OPERATING CONDITIONS
TEST CONDITIONS
MIN
TYP
1
MAX
VOH
PARAMETER
High-level output voltage
IOH = -400μA
VOL
Low-level output voltage
IOL = 2.1mA
0.4
II
Input current (leakage)
VI = 0V to 5.5V
10
IO
Output current (leakage)
IPP
ICC1
10
VO = 0V to VCC
G\ /VPP supply current (during program pulse)
VCC supply current (standby)
2.4
2
G\ /VPP = 13V
TTL-Input Level
35
70
500
VCC = 5.5V, E\=VIH
CMOS-Input Level VCC = 5.5V, E\=VCC
325
E\=VIL, VCC=5.5V
ICC2
VCC supply current (active)
tcycle = minimum cycle time,
outputs open
35
50
NOTES:
1. Typical values are at TC=25°C and nominal voltages.
2. This parameter has been characterized at 25°C and is not production tested.
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifications without notice.
5
UVEPROM
SMJ27C512
CAPACITANCE OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND
OPERATING CASE TEMPERATURE, f = 1MHz*
TEST CONDITIONS
TYP**
UNIT
CI
Input capacitance
VI = 0V
6
pF
CO
Output capacitance
VO = 0V
10
pF
G\ /VPP = 0V
20
pF
PARAMETER
CG/VPP G\ /VPP input capacitance
* Capacitance measurements are made on sample basis only.
** All typical values are at TC = 25°C and nominal voltages.
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING CASE TEMPERATURE
TEST
PARAMETER
-15
CONDITIONS
1,2
-20
-25
MIN MAX MIN MAX MIN MAX
UNIT
ta(A)
Access time from address
150
200
250
ns
ta(E)
Access time from E\
150
200
250
ns
ten(G)
Output enable time from G\ /VPP
70
75
100
ns
60
ns
tdis
tv(A)
See Figure 2
Output disable time from G\ /VPP or E\,
0
3
whichever occurs first
Output data valid time after change of
50
0
3
address, E\, or G\, whichever occurs first
0
60
0
0
0
ns
NOTES:
1. Timing measurements are made at 2V for logic high and 0.8V for logic low. (see Figure 2)
2. Common test conditions apply for tdis except during programming.
3. Value calculated from 0.5V delta to measured output level. This parameter is only sampled and not 100% tested.
RECOMMENDED TIMING REQUIREMENTS FOR PROGRAMMING: VCC = 6.5V and G\ /VPP =
13V (SNAP! Pulse), TC = 25°C (see Figure 2)
MIN
tdis(E)
NOM
MAX
UNIT
130
ns
μs
th(A)
Output Disable Time from E\
Hold Time, address
0
0
th(D)
Hold Time, Data
2
μs
Hold Time, G\ /VPP
2
μs
th(VPP)
tw(IPGM) Pulse Duration, Initial Program
95
100
105
μs
Recovery Time, G\ /VPP
2
μs
tsu(A)
Setup Time, Address
2
μs
tsu(D)
Setup Time, Data
2
μs
tsu(VPP) Setup Time, G\ /VPP
2
μs
tsu(VCC) Setup Time, VCC
2
μs
trec(PG)
tv(ELD)
Data Valid from E\ Low
tr(PG)
G\ /VPP Rise Time
SMJ27512
Rev. 1.2 01/10
1
50
μs
ns
Micross Components reserves the right to change products or specifications without notice.
6
UVEPROM
SMJ27C512
PARAMETER MEASUREMENT INFORMATION
2.08V
RL = 800Ω
Output Under Test
CL = 100 pF1
NOTES:
1. CL includes probe and fixture capacitance.
FIGURE 2. LOAD CIRCUIT AND VOLTAGE WAVEFORM
AC testing inputs are driven at 2.4V for logic high and 0.4V for logic low. Timing measurements are
made at 2V for logic high and 0.8V for logic low for both inputs and outputs.
FIGURE 3. READ-CYCLE TIMING
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifications without notice.
7
UVEPROM
SMJ27C512
FIGURE 4. PROGRAM-CYCLE TIMING (SNAP! PULSE PROGRAMMING)
NOTES:
1. G\ /VPP = 13V and VCC = 6.5V for SNAP! Pulse programming.
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifications without notice.
8
UVEPROM
SMJ27C512
MECHANICAL DEFINITION*
Micross Case #110 (Package Designator J)
SMD 5962-87648, Case Outline X
D
S2
A
Q
L
E
S1
b2
e
b
Pin 1
eA
c
NOTE: These dimensions are per the SMD. Micross’ package dimensional limits
may differ, but they will be within the SMD limits.
*All measurements are in inches.
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifications without notice.
9
UVEPROM
SMJ27C512
ORDERING INFORMATION
EXAMPLE: SMJ27C512-25JM
Device Number
Speed Package Operating
ns
Type
Temp.
SMJ27C512
-15
J
*
SMJ27C512
-20
J
*
SMJ27C512
-25
J
*
*AVAILABLE PROCESSES
M = Extended Temperature Range
SMJ27512
Rev. 1.2 01/10
-55oC to +125oC
Micross Components reserves the right to change products or specifications without notice.
10
UVEPROM
SMJ27C512
MICROSS TO DSCC PART NUMBER
CROSS REFERENCE*
Micross Package Designator J
TI Part #**
SMJ27C512-15JM
SMJ27C512-20JM
SMJ27C512-25JM
SMD Part #
5962-8764801XA
5962-8764802XA
5962-8764803XA
* Micross part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
** Parts are listed on SMD under the old Texas Instruments part number. Micross purchased this product line in November of 1999.
SMJ27512
Rev. 1.2 01/10
Micross Components reserves the right to change products or specifications without notice.
11