87648

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Add CAGE number 34335 as approved source for 01 device. Add
CAGE number 66579 for devices 01 through 04. Add device 04.
Delete footnote 4/ from tQLQV condition block. Add footnote 4/ to tEHQZ
condition block. Remove test condition C. Make editorial changes to
margin test method B. Make editorial changes to power dissipation.
89-08-23
M. A. Frye
B
Add case outline letter and device type 05 for vendor CAGE number
1FN41. Add test condition C to 4.2 and 4.3.2. Add vendor CAGE
number 34649 to the drawing as a source for device types 01XX,
02XX, and 03XX. Add vendor CAGE 34335 for devices 04XX, 04YX,
05XX, and 05YX. Removed vendor CAGE number 60991 from
drawing. Editorial changes throughout.
93-02-02
M. A. Frye
C
Make changes to paragraph 1.3, Table I, and AC waveforms. Add
paragraph 3.11 and remove paragraph 4.2c. Updated boilerplate and
Source Approval Bulletin.
96-03-01
M. A. Frye
D
Add device types 06 - 14 to drawing along with CAGE number 65786
as source of supply. Updated boilerplate.
97-07-07
Raymond Monnin
E
Boilerplate update, part of 5 year review. ksr
06-09-11
Raymond Monnin
F
Update drawing in accordance with current MIL-PRF-38535
requirements. - glg
15-03-18
Charles Saffle
REV
SHEET
REV
F
F
SHEET
15
16
REV STATUS
REV
F
F
F
F
F
F
F
F
F
F
F
F
F
F
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
Kenneth Rice
STANDARD
MICROCIRCUIT
DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
CHECKED BY
http://www.landandmaritime.dla.mil
Raymond Monnin
APPROVED BY
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
Michael A. Frye
DRAWING APPROVAL DATE
88-06-13
REVISION LEVEL
F
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS, 64K x 8 UVEPROM,
MONOLITHIC SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
1 OF
5962-87648
16
5962-E233-15
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part
or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
1.2 PIN. The PIN is as shown in the following examples:
5962-87648
01
X
A
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
87648
01
Q
X
A
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
For device classes Q and V:
5962
-
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number 1/
01,12
02,13
03,14
04,11
05,10
06
07
08
09
Circuit function
Access time
64K x 8-bit UVEPROM
64K x 8-bit UVEPROM
64K x 8-bit UVEPROM
64K x 8-bit UVEPROM
64K x 8-bit UVEPROM
64K x 8-bit UVEPROM
64K x 8-bit UVEPROM
64K x 8-bit UVEPROM
64K x 8-bit UVEPROM
150 ns
200 ns
250 ns
120 ns
90 ns
70 ns
55 ns
45 ns
35 ns
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level
as follows:
Device class
M
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN
class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Certification and qualification to MIL-PRF-38535
1/ Generic numbers listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will
also be listed in MIL-HDBK-103.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
2
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Z
Descriptive designator
Terminals
GDIP1-T28 or CDIP2-T28
CQCC1-N32
See figure 1
Package style
28
32
32
Dual-in-line 2/
Rectangular leadless chip carrier 2/
"J" lead chip carrier 2/
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
1.3 Absolute maximum ratings.
Storage temperature range ........................................................ -65°C to +150°C
Input voltages with respect to ground ........................................ -0.6 V dc to +6.25 V dc
Output voltages with respect to ground ...................................... -0.6 V dc to VCC +1.0 V dc
Voltage on pin A9 with respect to ground .................................. -0.6 V dc to +13.5 V dc
VPP supply voltage with respect to ground ................................. -0.6 V dc to +14.0 V dc
Power dissipation (PD) 3/ ......................................................... 350 mW
Lead temperature (soldering, 10 seconds)................................. +300°C
Thermal resistance, junction-to-case (ΘJC) ................................ See MIL-STD-1835
Junction temperature (TJ)........................................................... +150°C
1.4 Recommended operating conditions.
Case operating temperature range (TC) ..................................... -55°C to +125°C
Supply voltage range (VCC) ........................................................ +4.5 V dc to 5.5 V dc
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order Desk,
700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2/ Lid shall be transparent to permit ultraviolet light erasure.
3/ Must withstand the added PD due to short-circuit test; e.g., IOS.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
3
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless
a specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in
the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M
shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3.
3.2.3.1 Unprogrammed or erased devices. The truth table for unprogrammed devices for contracts involving no altered item
drawing shall be as specified on figure 3. When required in groups A, B, or C inspection (see 4.3), the devices shall be
programmed by the manufacturer prior to test in a checkerboard pattern or equivalent ( minimum of 50 percent of the total
number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits
programmed.
3.2.3.2 Programmed devices. The truth table for programmed devices shall as specified by an attached altered item drawing.
3.2.4 Block diagram(s). The block diagram(s) shall be as specified on figure 4.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be
in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of
supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MILPRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of
product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
4
3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime's agent,
and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore
documentation shall be made available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 42 (see MIL-PRF-38535, appendix A).
3.11 Processing EPROMs. All testing requirements and quality assurance provisions herein shall be satisfied by the
manufacturer prior to delivery.
3.11.1 Erasure of EPROMs. When specified, devices shall be erased in accordance with the procedure and characteristics
specified in 4.5 herein.
3.11.2 Programmability of EPROMs. When specified, devices shall be programmed to the specified pattern using the
procedures and characteristics specified in 4.6 herein.
3.11.3 Verification of erasure and/or programmability of EPROMs. When specified devices shall be verified as either
programmed to the specified pattern or erased. As a minimum, verification shall consist of performing a functional test
(subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a
device failure, and shall be removed from the lot.
3.12 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall
be done for initial characterization and after any design or process changes which may affect data retention. The methods and
procedures may be vendor specific but shall guarantee data retention over the full military temperature range. The vendor's
procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity,
along with test data.
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015
of MIL-STD-883.
(2) TA = +125°C, minimum.
b. Interim and final electrical test parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q and V.
a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device
manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document
revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535
and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs,
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD883.
b. Interim and final electrical test parameters shall be as specified in table IIA herein.
c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF38535, appendix B.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
5
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions
-55°C < TC < +125°C, VSS = 0 V;
4.5 V < VCC < 5.5 V
unless otherwise specified
Group A
subgroups
Device
types
Limits
Unit
Min
Max
Input leakage current
ILI
VIN = 0 V to 5.5 V
1, 2, 3
All
-10
+10
µA
Output leakage
current
ILO 1/
VOUT = 0 V to 5.5 V
1, 2, 3
All
-10
+10
µA
Operating current
ICC1
CE = OE /VPP= VIL
00-7 = 0 mA, VCC = 5.5 V
f = 1/tAVQV (maximum)
1, 2, 3
All
VCC = 5.5 V
CE = VIH
1, 2, 3
VCC = 5.5 V
CE = VCC ±0.2 V
1, 2, 3
Standby current
(TTL inputs)
Standby current
(CMOS inputs)
ICC2
ICC3
60
mA
01-05
3
mA
06-14
25
01-05
325
µA
06-14
25
mA
Input low voltage
(TTL)
VIL 2/ 3/
1, 2, 3
All
-0.1
0.8
V
Input low voltage
(CMOS)
VIL 2/ 3/
1, 2, 3
All
-0.2
0.2
V
Input high voltage
(TTL)
VIH 2/ 3/
1, 2, 3
All
2.0
VCC
+1.0
V
Input high voltage
(CMOS)
VIH 2/ 3/
1, 2, 3
All
VCC
-0.2
VCC
+0.2
V
0.45
V
Output low voltage
VOL
IOL = 2.1 mA
VIL = 0.8 V, VIH = 2.0 V
1, 2, 3
All
Output high voltage
VOH
IOH = -400 µA
VIH = 2.0 V, VIL = 0.8 V
1, 2, 3
All
Output short-circuit
IOS
VO = 0 V
1, 2, 3
01-05
+100
06-14
+100
VO = 0 V 4/
2.4
V
mA
Input capacitance
(excluding OE/VPP)
CIN1
4/ 5/
VIN = 0 V, TC = +25°C
f = 1 MHz
See 4.4.1c
4
All
12
pF
Input capacitance
(for OE/VPP)
CIN2
4/ 5/
VIN, VOUT = 0 V, TC = +25°C
f = 1 MHz, OE /VPP = 0
See 4.4.1c
4
All
25
pF
Output capacitance
COUT
4/ 5/
VOUT = 0 V, TC = +25°C
f = 1 MHz
See 4.4.1c
4
All
12
pF
7, 8
All
Functional tests
See 4.4.1e
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
6
TABLE I. Electrical performance characteristics.
Test
Symbol
Address to output
delay
CE to output delay
OE to output delay
tAVQV
tELQV
tOLQV
Conditions
-55°C < TC < +125°C, VSS = 0 V;
4.5 V < VCC < 5.5 V
unless otherwise specified
Group A
subgroups
9, 10, 11
OE /VPP= VIL 6/ 7/
9, 10, 11
CE = VIL 6/ 7/
Limits
Min
9, 10, 11
CE = OE /VPP= VIL 6/ 7/
Device
types
Unit
Max
01,12
150
02,13
200
03,14
250
04,11
120
05,10
90
06
70
07
55
08
45
09
35
01,12
150
02,13
200
03,14
250
04,11
120
05,10
90
06
70
07
55
08
45
09
35
01
70
02
75
03
100
04
50
05,12
40
13,14
60
11
35
10
30
06
25
07
20
08,09
18
ns
ns
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
7
TABLE I. Electrical performance characteristics.
Test
Symbol
OE high to output float
Output hold from
address CE or OE /VPP
whichever occurred
first
tEHQZ
tAVQZ
Conditions
-55°C < TC < +125°C
VSS = 0 V;
4.5 V < VCC < 5.5 V
unless otherwise specified
Group A
subgroups
Device
types
Limits
Min
CE = VIL 4/ 6/ 7/
9, 10, 11
CE = OE /VPP= VIL 6/ 7/
9, 10, 11
Unit
Max
01
50
02
55
03,13,14
60
04
45
05,10
30
12
40
11
06
07
08,09
35
25
20
18
All
0
ns
ns
1/
2/
3/
4/
Connect all address inputs and OE to VIH and measure ILO with the output under test connected to VOUT.
Test for all input and control pins.
Guaranteed if applied as a forcing function for VOL and VOH.
Tested initially and after any design changes that affect this parameter, and therefore shall be guaranteed to the
limits specified in table I.
5/ All pins not being tested shall be grounded.
6/ See figure 5.
7/ Equivalent ac test conditions (actual load conditions vary by tester):
Device types 01-06, 10-14:
Output load = 1 TTL gate and CL = 100 pF.
Input rise and fall times < 20 ns.
Input pulse levels: 0.45 V and 2.4 V.
Timing measurement reference levels:
Inputs = 0.8 V and 2.0 V; Outputs = 0.8 V and 2.0 V
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
Device types 07-09:
Output load; CL = 30 pF.
Input rise and fall times < 3 ns.
Input pulse levels: 0.0 V and 3.0 V.
Timing measurement reference levels:
Inputs = 1.5 V ; Outputs = 1.5 V
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
8
NOTES:
1. Dimensions are in inches.
2. Metric equivalents are given for general information only.
3. Metric equivalents are in parentheses.
FIGURE 1. Case outline Z.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
9
Device types
Case outlines
Terminal number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
01 through 14
A15
A12
A7
A6
A5
A4
A3
A2
A1
AQ
I/00
I/01
I/02
GND
I/03
I/04
I/05
I/06
I/07
20
21
A10
X
Y and Z
Terminal symbol
NC
A15
A12
A7
A6
A5
A4
A3
A2
A1
AQ
NC
I/00
I/01
I/02
GND
NC
I/03
I/04
I/05
CE
I/06
I/07
/VPP
A11
A9
OE
22
23
24
25
26
27
28
29
30
31
32
CE
A10
A8
A13
A14
VCC
---------
/VPP
NC
A11
A9
A8
A13
A14
VCC
OE
FIGURE 2. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
10
Pins
Mode
CE
Read
VIL
Output disable
A9
VCC
Outputs
VIL
X
VCC
D out
VIL
VIH
X
VCC
High Z
Standby
VIH
X
X
VCC
High Z
Program
VIL
VPP
X
VCC
D in
OE
/VPP
(See note 1)
Program verify
VIL
VIL
X
VCC
D out
(See note 1)
Program inhibit
VIH
VPP
X
VCC
High Z
(See note 1)
Identity
VIL
VIL
VH
VCC
Identity code(s)
(See note 1)
NOTES:
1. VCC in programming mode shall be as specified by the device manufacturer.
2. VH = 11.5 V to 12.5 V.
3. X can be either VIL or VIH (don't care state).
FIGURE 3. Truth table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
11
FIGURE 4. Block diagram.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
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SHEET
12
AC testing input, output waveform, device types 01 - 06, 10 – 14
AC testing: See footnote 7/ on sheet 5.
AC testing input, output waveform, device types 07 – 09
AC testing: See footnote 7/ on sheet 5.
AC waveforms
NOTES:
1. tEHQZ and tAVQZ are specified from OE /VPP or CE , whichever occurs first.
2.
OE /VPP may be delayed up to tELQV - tOLQV after the falling edge of CE without impact on tELQV.
FIGURE 5. Switching waveforms
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
13
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF38535 including groups A, B, C, D, and E inspections and as specified. Quality conformance inspection for device class M shall
be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M
shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through
4.4.4).
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted.
c.
Subgroup 4 (CIN and COUT measurements) shall be measured only for initial qualification and after any process or
design changes which may affect input or output capacitance. Sample size is 15 devices with no failures, and all input
and output terminals tested.
d.
All devices selected for testing shall have the EPROM programmed with a checkerboard pattern or equivalent. After
completion of all testing, the devices shall be erased and verified (except devices submitted for groups C and D
testing).
e.
Subgroups 7 and 8 shall consist of verifying the EPROM pattern specified in 4.4.1d.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test conditions C and D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method
1005 of MIL-STD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
d.
All devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After completion of all
testing, those devices that were subjected to a nondestructive subgroup for testing shall be erased and verified.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MILSTD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table IIA herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device
classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ± 5°C,
after exposure, to the subgroups specified in table IIA herein.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
14
4.5 Erasing procedure. The recommended erasure procedure for the device is exposure to shortwave ultraviolet light which
has a wavelength of 2537 Angstroms (Å). The integrated dose (i.e., UV intensity x exposure time) for exposure should be a
2
minimum of 15 Ws/cm . The erasure time with this dosage is approximately 25 minutes using an ultraviolet lamp with a 12000
2
μW/cm power rating. The device should be placed within 1 inch of the lamp tubes during erasure. The maximum integrated
dose the device can be exposed to without damage is 7258 Ws/cm2 (1 week at 12000 μW/cm2). Exposure of EPROMs to high
intensity UV light for long periods may cause permanent damage.
4.6 Programming procedures. The programming procedures shall be as specified by the device manufacturer.
TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/
Test requirements
Subgroups (in
accordance with MIL-STD883, TM 5005 Table I)
Subgroups
(in accordance with MIL-PRF-38535, table III)
Device class M
Device class Q
Device class V
Interim electrical
1, 7, 9
Static burn-in
Not
Not
Required
Required
Required
Required
1*, 2, 3, 7*,
1*, 2, 3, 7*,
1*, 2, 3, 7*, 8A,
1, 2, 3, 4***, 7, 8A,
1, 2, 3, 4***, 7, 8A,
1, 2, 3, 4***, 7, 8A,
Group C end-point electrical
2, 8A, 10
2, 8A, 10
1, 2, 3, 7, 8A,
Group D end-point electrical
2, 8A, 10
2, 8A, 10
2, 3, 8A, 8B
Group E end-point electrical
1, 7, 9
1, 7, 9
1, 7, 9
Dynamic burn-in
Final electrical
Group A test
1/
2/
3/
4/
5/
6/
(*) indicates PDA applies to subgroups 1 and 7.
(**) indicates that subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I.
(***) see 4.4.1c.
Any subgroups at the same temperature may be combined when using a multifunction tester.
Subgroups 7 and 8 shall consist of verifying the applicable data pattern, see 4.4.1d.
Δ indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed
with reference to the previous interim electrical parameters (see line 1).
TABLE IIB. Delta limits at +25°C.
Parameter 1/
Device types
ICC3
All
ILI
+ 10%
ILO
+ 10%
1/ The above parameter shall be recorded before and after
the required burn-in and life tests to determine the delta.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
15
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires
configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and
this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic
devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108.
6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA , Columbus, Ohio 43216-5000,
or telephone (614) 692-0540.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535, MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535
and MIL-HDBK-103. The vendors listed in QML-38535 and MIL-HDBK-103 have submitted a certificate of compliance (see 3.6
herein) to DLA Land and Maritime-VA and have agreed to this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DLA Land and Maritime-VA.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87648
A
REVISION LEVEL
F
SHEET
16
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 15-03-18
Approved sources of supply for SMD 5962-87648 are listed below for immediate acquisition only and shall be added to MILHDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition
or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been
submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated
revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of
supply at http://www.landandmaritime.dla.mil/Programs/Smcr/.
Standard
microcircuit
drawing PIN 1/
Vendor
CAGE
number
5962-8764801XA
0C7V7
2/
2/
2/
57300
AT27C512R-15DM/883
AM27C512-150/BXA
MD27C512-15/B
WS27C512L-15DMB
SMJ27C512-15JM
5962-8764801YA
0C7V7
2/
2/
57300
AT27C512R-15LM/883
AM27C512-150/BUA
WS27C512L-15CMB
AS27C512-15ECAM
5962-8764801ZA
0C7V7
AT27C512R-15KM/883
5962-8764802XA
57300
0C7V7
2/
2/
2/
SMJ27C512-20JM
AT27C512R-20DM/883
AM27C512-200/BXA
MD27C512-20/B
WS27C512L-20DMB
5962-8764802YA
0C7V7
2/
2/
57300
AT27C512R-20LM/883
AM27C512-200/BUA
WS27C512L-20CMB
AS27C512-20ECAM
5962-8764802ZA
0C7V7
AT27C512R-20KM/883
5962-8764803XA
57300
0C7V7
2/
2/
2/
SMJ27C512-25JM
AT27C512R-25DM/883
AM27C512-250/BXA
MD27C512-25/B
WS27C512L-25DMB
5962-8764803YA
0C7V7
2/
2/
57300
AT27C512R-25LM/883
AM27C512-250/BUA
WS27C512L-25CMB
AS27C512-25ECAM
5962-8764803ZA
0C7V7
AT27C512R-25KM/883
5962-8764804XA
0C7V7
2/
2/
57300
AT27C512R-12DM/883
WS27C512L-12DMB
AM27C512-120/BXA
AS27C512-12JM
5962-8764804YA
0C7V7
2/
2/
57300
AT27C512R-12LM/883
WS27C512L-12CMB
AM27C512-120/BUA
AS27C512-12ECAM
5962-8764804ZA
0C7V7
AT27C512R-12KM/883
5962-8764805XA
0C7V7
2/
AT27C512R-90DM/883
AM27C512-90/BXA
5962-8764805YA
0C7V7
2/
AT27C512R-90LM/883
AM27C512-90/BUA
5962-8764805ZA
0C7V7
AT27C512R-90KM/883
See footnotes at end of table.
1 of 3
Vendor
similar
PIN 3/
STANDARD MICROCIRCUIT DRAWING BULLETIN – continued.
DATE: 15-03-18
Standard
microcircuit
drawing PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 3/
5962-8764806XA
0C7V7
AT27C512R-70DM/883
5962-8764806YA
0C7V7
AT27C512R-70LM/883
5962-8764806ZA
5962-8764806QXA
0C7V7
2/
AT27C512R-70KM/883
CY27C512-70WMB
5962-8764806QYA
2/
CY27C512-70QMB
5962-8764807QXA
2/
CY27C512-55WMB
5962-8764807QYA
2/
CY27C512-55QMB
5962-8764808QXA
2/
CY27C512-45WMB
5962-8764808QYA
2/
CY27C512-45QMB
5962-8764809QXA
2/
CY27H512-35WMB
5962-8764809QYA
2/
CY27H512-35QMB
5962-8764810QXA
2/
CY27C512-90WMB
5962-8764810QYA
2/
CY27C512-90QMB
5962-8764811QXA
2/
57300
CY27C512-120WMB
AS27C512-12JM
5962-8764811QYA
2/
57300
CY27C512-120QMB
AS27C512-12ECAM
5962-8764812QXA
2/
57300
CY27C512-150WMB
AS27C512-15JM
5962-8764812QYA
2/
57300
CY27C512-150QMB
AS27C512-15ECAM
5962-8764813QXA
2/
57300
CY27C512-200WMB
AS27C512-20JM
5962-8764813QYA
2/
57300
CY27C512-200QMB
AS27C512-20ECAM
5962-8764814QXA
2/
57300
CY27C512-250WMB
AS27C512-25JM
5962-8764814QYA
2/
57300
CY27C512-250QMB
AS27C512-25ECAM
1/ The lead finish shown for each PIN representing a hermetic package is the most readily available
from the manufacturer listed for that part. If the desired lead finish is not listed, contact the vendor to
determine its availability.
2/ Not available from an approved source of supply.
3/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy
the performance requirements of this drawing.
2 of 3
STANDARD MICROCIRCUIT DRAWING BULLETIN – continued.
DATE: 15-03-18
Vendor CAGE
number
Vendor name
and address
0C7V7
e2v, Inc.
dba QP Semiconductor
765 Sycamore Drive
Milpitas, CA 95035
57300
Micross Components
7725 N. Orange Blossom Trail
Orlando, FL 32810-2696
The information contained herein is disseminated for convenience only and the Government assumes
no liability whatsoever for any inaccuracies in this information bulletin.
3 of 3