100V, 164A, 3.9mOhm, 160nC – Die Size – 6.4 x 5.3 mm2 – FDP047N10 MOSFET Bare Die

FDP047N10
N-Channel Power Trench Mosfet Chip
100V, 164A, 4.7mΩ1
Part
V(BR)DSS
FDP047N10
100V
IDn
RDS(on) Max
164A
4.7mΩ
Die Size
1
6.4 x 5.3 mm
2
See page 2 for ordering part numbers & supply formats
Features
Applications
•
High density AC / DC Converters
•
High Power & Current Handling Capability
•
Motor drives & Micro Inverters
•
Low RDS (on) per mm2
•
Low Gate Charge, Fast Switching
Maximum Ratings
Symbol
Parameter
Ratings
Units
VDSS
Drain to Source Voltage
100
V
Gate to Source Voltage
±20
V
VGSS
2
ID
Drain Current
3
IDM
Drain Current
TJ, TSTG
Continuous (TC = 25°C)
164
Continuous (TC = 100°C)
116
Pulsed
656
Operation Junction & Storage Temperature
EAS
Single Pulsed Avalanche
4
Energy
dv/dt
Peak Diode Recovery dv/dt
4
A
-55 to 175
°C
L = 0.41mH, IAS = 75A, VDD= 50V, RG=25Ω
Starting TJ =25°C
1153
mJ
ISD≤75A,di/dt≤200A/µs, VDD≤BVDSS, Start @ TJ=25°C
6
V/ns
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
BVDSS
Drain to Source Breakdown Voltage
ID = 250µA, VGS = 0V
100
-
-
V
VGS(th)
Gate threshold Voltage
VGS = VDS, ID =250µA
2.5
3.5
4.5
V
IDSS
Zero Gate Voltage Drain Current
VDS = 100V, VGS = 0V
-
-
1
µA
Zero Gate Voltage Drain Current @ 150°C
VDS = 100V, VGS = 0V
-
-
500
IGSS
Gate to Body Leakage Current
VGS = ±20V , VDS = 0V
-
-
±100
nA
RDS(on)
Static Drain to Source On Resistance
VGS = 10V, ID = 75A
-
3.9
4.7
mΩ
1.
2.
3.
1
Notes:
Defined by chip design, not subject to 100% production test at wafer level
Performance will vary based on assembly technique and substrate choice
Repetitive Rating: Pulse width limited by maximum junction temperature
Further Information - Contact your Micross sales office or email your enquiry to [email protected]
©2014 Fairchild Semiconductor Corporation & Micross Components
Page1
Static Characteristics, TJ = 25° unless otherwise noted
Dynamic Characteristics4, TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
VDS = 10V, ID = 75A
-
170
-
S
-
11500
15265
pF
-
1120
1500
pF
-
455
680
pF
-
160
210
nC
-
56
-
nC
-
36
-
nC
gFS
Forward Transconductance
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Qg(tot)
Total Gate Charge at 10V
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
VDS =25V, VGS = 0V
f = 1MHz
VDS =80V, ID = 75A
5
VGS = 10V
Typ
Max
Units
Switching Characteristics4, TJ = 25°C unless otherwise noted
Symbol
Parameter
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Test Conditions
VDD = 50V, ID = 75A
VGS = 10V RGEN = 25Ω5
Min
Typ
Max
Units
-
174
358
ns
-
386
782
ns
-
344
698
ns
-
244
299
ns
Drain-Source Diode Characteristics4, TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
IS
Maximum Continuous Drain to Source Diode Forward Current
-
-
164
A
ISM
Maximum Pulsed Drain to Source Diode Forward Current
-
-
656
A
VSD
Drain to Source Diode Forward Voltage
VGS = 0V, ISD = 75A
-
-
1.25
V
trr
Reverse Recovery Time
-
88
-
ns
Qrr
Reverse Recovery Charge
VGS = 0V, ISD = 75A
dIF/dt = 100A/μs
-
245
-
nC
4.
5.
Notes:
Characterised by design & tested at component level, not subject to production test at wafer level
Essentially independent of Operating Temperature Typical Characteristics
Ordering Guide
Part Number
Format
Detail / Drawing
FDP047N10MW
Un-sawn wafer, electrical rejects inked
Page 3
FDP047N10MWF
Sawn wafer on film-frame
Page 4
FDP047N10MD
Singulated die / chips in waffle pack
Page 4
Page2
Note: Singulated Die / Chips can also be supplied in Pocket Tape or SurfTape® on request
Further Information - Contact your Micross sales office or email your enquiry to [email protected]
©2014 Fairchild Semiconductor Corporation & Micross Components
Die Drawing
Mechanical Data
Parameter
Units
Chip Dimensions Un-sawn
6409 x 5310
µm
Chip Thickness (Nominal)
200
µm
Gate Pad Size
340 x 461
µm
Wafer Diameter
200 (subject to change)
mm
Saw Street
80 (subject to change)
µm
Wafer orientation on frame
Wafer notch parallel with frame flat
Topside Metallisation & Thickness
Al / Cu +TiW+Ti
4
µm
Backside Metallisation & Thickness
Ti+Ni / V+Ag
0.75
µm
Topside Passivation
Unpassivated
Recommended Die Attach Material
Soft Solder or Conductive Epoxy
Al 125µm X1
Al 500µm X3 double stitch
Page3
Recommended Wire Bond - Gate
Recommended Wire Bond – Source
Further Information - Contact your Micross sales office or email your enquiry to [email protected]
©2014 Fairchild Semiconductor Corporation & Micross Components
Sawn Wafer on Film-Frame – Dimensions (inches)
Die in Waffle Pack – Dimensions (mm)
A
X
X = 5.94mm ±0.13mm pocket size
Y = 8.23mm ±0.13mm pocket size
Z = 0.51mm ±0.08mm pocket depth
A = 5° ±1/2° pocket draft angle
No Cross Slots
Array = 6 X 4 (24)
Y
Z
X
OVERALL TRAY SIZE
Size = 50.67mm ±0.25mm
Height = 3.94mm ±0.13mm
Flatness = 0.30mm
DISCLAIMER THE INFORMATION HEREIN IS GIVEN TO DESCRIBE CERTAIN COMPONENTS AND SHALL NOT BE CONSIDERED AS WARRANTED CHARACTERISTICS. NO
RESPONSIBILITY IS ASSUMED FOR ITS USE; NOR FOR ANY INFRINGEMENT OF PATENTS OR OTHER RIGHTS OF THIRD PARTIES WHICH MAY RESULT FROM ITS USE. NO LICENSE IS
GRANTED BY IMPLICATION OR OTHERWISE UNDER ANY PATENT OR PATENT RIGHTS OF EITHER MICROSS COMPONENTS OR FAIRCHILD SEMICONDUCTOR CORPORATION.
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR
DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY
ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND
CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS
WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
(a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use
provided in the labelling, can be reasonably expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
Further Information - Contact your Micross sales office or email your enquiry to [email protected]
©2014 Fairchild Semiconductor Corporation & Micross Components
Page4
1. Life support devices or systems are devices or systems which,
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