BD9G101G Datasheet Single-chip Type with Built-in FET Switching Regulators Simple Step-down Switching Regulators with Built-in Power MOSFET BD9G101G ●General Description The BD9G101G is switching regulator with integrated internal high-side 42V Power MOSFET. It provides 0.5A DC output with small SOT23 package. Operating frequency is fixed 1.5MHz, allowing the use of small inductor and ceramic capacitor. Phase compensation components is built in. The BD9G101G is available in SOT-23-6(SSOP6) package. ●Features ■ High and Wide Input Range (VCC=6V~42V) ■ 45V/800mΩ Internal Power MOSFET ■ 1.5MHz Fixed Operating Frequency ■ Feedback Pin Voltage 0.75V±1.5% ■ Internal compensated ■ Internal Over Current protection, Under Voltage Locked Out, Thermal shutdown ■ 0µA Shutdown Supply Current ■ 6-Lead SOT-23 package(SSOP6) ●Key Specifications ■ Input Voltage ■ Ref. Precision (Ta=25℃) (Ta=-25~105℃) ■ Max Output Current ■ Operating Temperature ■ Max Junction Temperature ●Packages SSOP6 6～42 [V] ±1.5[%] ±2.0[%] 0.5 [A] (Max.) -40℃~105℃ 150℃ 2.90 ㎜×2.80 ㎜×1.25 ㎜ SSOP6 ●Applications ■ Industrial distributed power applications ■ Automotive Applications ■ Battery powered equipment ■ OA instruments ●Typical Application Circuits Figure 1. Typical Application Circuit ○Structure：Silicon Monolithic Integrated Circuit www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 ○This product is not designed for normal operation with in a radioactive. 1/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Pin Configuration Figure 2. Pin Configuration (TOP VIEW) ●Pin Description Pin No. Pin Name Description 1 BST The pin is power supply for floating Power NMOS driver. Connected a bypass capacitor between the pin and Lx pin for bootstrap operation. 2 GND Ground. It should be connected as possible to the output capacitor ground avoiding the high current switch paths. 3 FB Voltage feedback pin. This pin is error-amp input, the DCDC is set 0.75V at this pin with feed-back operation. 4 EN Enable input pin. The DCDC is start-up to apply over 2.0V. This pin is pull-down about 550kΩ, the DCDC is shutdown to open or apply under 0.8V. 5 VCC 6 Lx Input supply. It should be connected as near as possible to the bypass capacitor. Power FET switch output. It should be connected as near as possible to the schottky barrier diode, and inductor. ●Block Diagram Figure 3. Block Diagram www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 2/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Description of Blocks 1. Reference This block generates reference voltage and current. It start operation by applying EN more than 2.0V. It provides reference voltage and current to error-amp , oscillator ,and etc. 2. REG This is a gate drive voltage generator and 4.2V regulator for internal circuit power supply. 3. OSC This is a precise wave oscillation circuit with operation frequency fixed to 1.5MHz fixed. To protect from output shorted to GND, Frequency fold-back function is built in. 4. Soft Start This block does Soft Start to the output voltage of DC/DC comparator, and prevents in-rush current during Start-up. Soft Start Time depend on application and start-condition because Frequency fold-back function is built in. 5. ERROR AMP This is an error amplifier what detects output signal, and outputs PWM control signal. Internal reference voltage is set to 0.75V. Also, the BD9G101G has internal phase compensated element between input and output. 6. ICOMP This is a comparator that outputs PWM signal from current feed-back signal and error-amp output for current-mode. 7. Nch FET SW This is an 45V/800mΩ Power Nch MOSFET SW that converts inductor current of DC/DC converter. 8. UVLO This is a low voltage error prevention circuit. This prevents internal circuit error during increase of power supply voltage and during decline of power supply voltage. It monitors VCC pin voltage and internal REG voltage, And when VCC voltage becomes 5.4V and below, it turns OFF all output FET and turns OFF DC/DC comparator output, and Soft Start circuit resets. Now this Threshold has hysteresis of 200mV. 9. EN When a Voltage of 2.0V or more is applied, it turns ON, at Open or 0V application, it turns OFF. About 550kΩ Pull-down Resistance is contained within the Pin. 10. OCP The current of power MOSFET is limited by this function. The power MOSFET current is sensed by current sense FET. If the current of power MOSFET is over 1.2A(typ), this function reduce duty by pulse –by- pulse and restrict the and restraint on over current. 11.TSD Circuit for preventing malfunction at high Temperature . When it detects an abnormal temperature exceeding Tj=175℃, it turns OFF DC/DC Comparator Output. The threshold of TSD has Hysteresis(25℃). If Temperature falls 150℃,the IC automatically returns. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 3/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Absolute Maximum Ratings Item Symbol Ratings Unit VCC VCC 45 V Maximum input current Imax 1.0 A BST to GND VBST 50 V BST to Lx ⊿VBST 7 V EN VEN 45 V Lx VLx 45 V FB VFB 7 V Power Dissipation Pd 0.675(*1) W Operating Temperature Topr -40～+105(*2) ℃ Storage Temperature Tstg -55～+150 ℃ Junction Temperature Tjmax 150 ℃ (*1)During mounting of 70×70×1.6t mm 1layer board.Reduce by 5.4mW for every 1℃ increase. (Above 25℃) (*2)Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. thermal shutdown engages at Tj=175℃(typ) and disengages at Tj=155℃ (typ) ●Electrical Characteristics (Unless otherwise specified Ta=25℃, VCC=24V, Vo=5V,EN=3V ) Parameter Symbol Limit Min Typ Max Unit Condition 【Circuit Current】 Stand-by Current Ist － 0 5 µA VEN=0V Operating Current Icc － 0.7 1.2 mA FB=1.2V Vuv 5.1 5.4 5.7 V Vuvhy － 200 300 mV 【Under Voltage Lock Out (UVLO)】 Threshold Voltage Hysteresis width 【Oscillator】 Switching Frequency fosc 1.3 1.5 1.7 MHz Dmax 85 - - % VFBN 0.739 0.750 0.761 V VFBA IFB Tsoft 0.735 -100 1.2 0.750 0 4.0 0.765 100 - V nA ms GCS - 3 - A/V Nch MOSFET ON Resistance RonH － 800 － mΩ Min ON Time Tmin － 100 － nsec Switch Current Limit Iocp 0.85 1.2 － A VENON 2.0 － VCC V OFF VENOFF REN -0.3 2.7 － 5.5 0.8 11 V µA Max Duty Cycle 【Error AMP】 FB Pin Reference Voltage FB Pin Bias Current Soft-Start Time Ta=25℃ Ta=-25~105℃ VFB=2.0V 【Current Comparator】 Trans-conductance 【Output】 【CTL】 EN Thresohold Voltage EN Input Bias Current ON VEN=3V ◎Not designed to withstand radiation. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 4/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Operating Ratings Item Input Voltage Output Voltage Symbol VCC VOUT Ratings Min Typ Max 6 - 42 (*2) 1.0 Output Current IOUT (*2)Restricted by minimum on pulse typ. 100nsec (*3)Restricted by maxduty ,Ron and BST-UVLO. - Unit V (*3) VCC×0.7 500 V mA ●input and output voltage restriction The input voltage range of BD9G101G is limited by Ron, Maxduty(min85%) and preventing malfunction at low voltage between BST and LX(BST-UVLO). ①BST-UVLO BSTUVLO is the function that prevent the IC from abnormal operation that is caused by shortage of charge of High-SideFET driving. If the voltage between BST and Lx is lower than 1.5V, High-Side FET is turned off and there are new pass to charge voltage VCC to BST. BST voltage is charged by Vcc and goes over BST-UVLO threshold. As a result , BST-UVLO is turned off. The condition that BST-UVLO is working property is BST charging current (normal mode) VCC>>(BST-UVLO threshold + Vf )+ Vout. Therefore maximum output voltage is lower than Vin -3V. ※If output voltage is higher than Vin-3V, output voltage ripple is boosted by the trigger of BSTUVLO. This is no problem in IC operation. BST charging current (BST-UVLO mode) ②Max duty , Ron Maximum output voltage is limited by maxduty(min85%) and FET Ron. In the case of Io=500mA, VCC drop down 500mA×0.8Ω=0.6V besides maxduty. Vomax = (Vcc-Ron×Iomax)×0.85 (casually formula) NchFET OFF Considering the negative voltage in the case of pulling diode current, (BST-UVLO mode) Formula of maximum output voltage is Vomax = VCC×0.7. ③minimum on pulse Figure 4. BST-UVLO image Minimum output voltage is limited by minimum on pulse (typ 100nsec). Output voltage = frequency(typ 1.5MHz) × FET on time ×Vin If output voltage is lower than this formula , Output ripple voltage is boosted by intermittent spring. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 5/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Frequency fold-back function This IC has the frequency fold-back function to prevent from over current with the circuit output is shorted. The frequency fold-back has the function that the frequency is changed by FB voltage. Figure.5 shows FB voltage vs frequency Characteristics. 1600 1400 1200 Frequency[kHz] 1000 800 600 400 200 0 0 0.2 0.4 0.6 0.8 1 1.2 FBVoltage [ V ] Figure 5. FB voltage -frequency Characteristics When the output node is shorted, the IC narrows the frequency to 150kHz(typ) so that input current limiting. This IC operates on1.5MHz in case of normal mode, the voltage of FB is about 0.75V. ●Start-up Characteristics When the IC is starting up, frequency reacts to the voltage of FB on the function of frequency fold back. For the Softstart is operated by internal frequency clock, according to rising to the output voltage, the Softstart rising speed is more faster. Please check the using condition and the application waveform (P.10,P13) because of the Start-up characteristics changes to the output load and the output capacitor. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 6/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G 2 2 1.8 1.8 1.6 1.6 1.4 1.4 input current [mA] Input current [mA] ●Typical Performance Characteristics (Unless otherwise specified, Ta=25℃, VCC=12V, Vo=5V, EN=3V) 1.2 1 Ta=105℃ Ta=150℃ 0.8 0.6 Ta=25℃ 0.4 Ta=‐50℃ 1.2 1 0.6 Vin=12V 0.4 0.2 Vin=42V Vin=24V 0.8 Vin=6V 0.2 0 6 12 18 24 30 36 0 42 ‐40 ‐20 0 20 Vcc [V] 40 60 80 100 Ta[℃ ] Figure 6. Operating Current - Input Voltage Figure 7. Operating Current - Temperature 1.8 Frequency[MHz] 1.7 1.6 1.5 1.4 1.3 1.2 ‐40 ‐20 0 20 40 60 80 100 Ta[℃] Figure 8. UVLO Threshold - Temperature Figure 9. Oscillation frequency - Temperature 0.761 95 93 91 0.756 FB threshold [V] Max duty[%] 89 87 85 83 0.751 81 0.746 79 77 0.741 75 -40 -20 0 20 40 60 80 100 6.0 Ta[℃ ] 18.0 24.0 30.0 36.0 42.0 Input Voltage [V] Figure 10. Max Duty - Temperature www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 12.0 Figure 11. FB Pin Reference Voltage – Input Voltage 7/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G 2000 0.765 1800 0.760 1600 High‐Side FET Ron[mΩ] 1400 FB threshold [V] 0.755 0.750 0.745 1200 1000 800 600 400 0.740 200 0.735 ‐40 ‐20 0 20 40 60 80 0 100 ‐40 ‐20 0 20 Ta [℃ ] 60 80 100 Figure 13. Nch MOSFET ON Resistance Temperature Figure 12. FB Threshold - Temperature 200 2000 180 1800 160 1600 1400 Min_on_pulse[ns] OCP threshold [mA] 40 Ta [℃ ] 1200 1000 800 600 140 120 100 80 60 400 40 200 20 0 -40 -20 0 20 40 60 0 80 100 120 140 160 -40 -20 Ta [℃] 0 20 40 60 80 100 Ta[℃] Figure 15. Min ON Time Temperature Figure 14. OCP threshold- Temperature 2 1.8 1.6 Vin=12V Vin=6V EN threshold [V] 1.4 Vin=42V 1.2 1 0.8 0.6 0.4 0.2 0 ‐40 ‐20 0 20 40 60 80 100 Ta[℃ ] Figure 16. EN Threshold Voltage Temperature www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 8/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Reference Characteristics of typical Application Circuits 15000pF L1: 6.8μH Lx BST D1 GND C2:10μF/10V VCC C1:4.7μF/50V FB 12k EN ON/OFF control 68k Figure 17. Typical Application Circuit (VOUT=5V) Parts L1 ： TOKO TAIYO YUDEN DEM4518C 1235AS-H-100M NR4018 10µH 10µH C1 ： Murata GRM32EB31H475KA87 4.7µF/50V C2 ： Murata GRM31CB11A106KA01 10µF/10V D1 ： Rohm RB060M-60 100 90 Vin=12V 80 Vin=8V 70 Efficiency η [%] 60 Vin=24V 50 Vin=42V 40 30 20 10 0 1 10 Output Current [mA] Figure 18. Efficiency - Output Current www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 9/20 100 1000 VOUT=5V TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G EN 10V/div EN 10V/div Lx 10V/div Lx 10V/div VOUT 1V/div VOUT 1V/div IOUT 0.2A/div IOUT 0.2A/div Figure 19. Start-up Characteristics VIN=8V, IOUT=0mA ,VOUT=5V Figure 20. Start-up Characteristics VIN=8V, IOUT=500mA, VOUT=5V EN 20V/div Lx 10V/div EN 20V/div Lx 10V/div VOUT 1V/div VOUT 1V/div IOUT 0.2A/div IOUT 0.2A/div Figure 21. Start-up Characteristics VIN=12V, IOUT=0mA, VOUT=5V Figure 22. Start-up Characteristics VIN=12V, IOUT=500mA ,VOUT=5V EN 10V/div EN 10V/div Lx 10V/div Lx 10V/div VOUT 1V/div VOUT 1V/div IOUT 0.2A/div IOUT 0.2A/div Figure 24. Start-up Characteristics VIN=42V, IOUT=500mA, VOUT=5V Figure 23. Start-up Characteristics VIN=42V, IOUT=0mA, VOUT=5V www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 10/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G Io [100mA/div] Vout(AC) [50mV/div] Vout:offset 5V 10mV/div Overshoot Voltage:134mV UnderOvershoot Voltage:144mV Figure 25. Load Response Io=50mA⇔200mA Figure 26. Lx Switching/ Vout Ripple Io = 20mA Vout:offset 5V 10mV/div Phase Gain Figure 28. Frequency Response Io=100mA, VOUT=5V Figure 27. Lx Switching/ Vout Ripple Io=200mA Phase Gain Figure 29. Frequency Response Io=500mA, VOUT=5V www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 11/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Reference Characteristics of typical Application Circuits Figure 30. Typical Application Circuit (VOUT=12V) 使用部品 ：L1 ： TOKO TAIYO YUDEN DEM4518C 1235AS-H-6R8M NR4018 6.8µH 6.8µH C1 ： Murata GRM32EB31H475KA87 4.7µF/50V C2 ： Murata GRM31CB11A106KA01 10µF/25V D1 ： Rohm RB060M-60 100 90 Vin=24V 80 Vin=18V Efficiency η [%] 70 Vin=36V 60 Vin=42V 50 40 30 20 10 0 1 10 Output Current [mA] 100 1000 *The efficiency is fall when the switching waveform is turning from intermittent mode to continuous mode Figure 31. Efficiency - Output Current VOUT=12V www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 12/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G EN 20V/div EN 20V/div Lx 20V/div Lx 20V/div IOUT 1A/div IOUT 1A/div VOUT 2V/div VOUT 2V/div Figure 32. Start-up Characteristics VIN=18V, IOUT=0mA, VOUT=12V Figure 33. Start-up Characteristics VIN=18V, IOUT=500mA, VOUT=12V EN 20V/div EN 20V/div Lx 20V/div Lx 20V/div IOUT 1A/div IOUT 1A/div VOUT 2V/div VOUT 2V/div Figure 35. Start-up Characteristics VIN=24V, IOUT=500mA, VOUT=12V Figure 34. Start-up Characteristics VIN=24V, IOUT=0mA, VOUT=12V EN [50V/div] EN [50V/div] Lx [50V/div] Lx [50V/div] IOUT [1A/div] IOUT [1A/div] VOUT [2V/div] VOUT [2V/div] Figure 36. Start-up Characteristics VIN=42V, IOUT=0mA, VOUT=12V www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 Figure 37. Start-up Characteristics VIN=42V, IOUT=500mA, VOUT=12V 13/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G Io [100mA/div] Vout:offset 5V 20mV/div Overshoot Voltage:460mV Vout(AC) [100mV/div] UnderOvershoot Voltage:485mV Figure 38. Load Response Io=50mA⇔200mA, VOUT=12V Figure 39. Lx Switching/ Vout Ripple Io = 50mA, VOUT=12V Vout:offset 5V 20mV/div Phase Gain Figure 40. Lx Switching/ Vout Ripple Io = 200mA, VOUT=12V Figure 41. Frequency Response Io=100mA, VOUT=12V Phase Gain Figure 42. Frequency Response Io=500mA, VOUT=12V www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Application Components Selection Method (1) Inductors Something of the shield type that fulfills the current rating (Current value Ipecac below), with low DCR is recommended.Value of Inductance influences Inductor Ripple Current and becomes the cause of Output Ripple. In the same way as the formula below, this Ripple Current can be made small for as big as the L value of Coil or as high as the Switching Frequency. Ipeak =Iout + ⊿IL/2 [A] ΔIL (1) Figure 43. Inductor Current ⊿IL= Vin-Vout L Vout Vin × × 1 f [A] (2) (⊿IL: Output Ripple Current, f: Switching Frequency) For design value of Inductor Ripple Current, please carry out design tentatively with about 20%～50% of Maximum Input Current. In the BD9G101G, it is recommended the below series of 2.2µH～10µH inductance value. Recommended Inductor TOKO DE4518C Series TAIYO YUDEN NR4018 Series (2) Output Capacitor In order for capacitor to be used in output to reduce output ripple, Low ceramic capacitor of ESR is recommended. Also, for capacitor rating, on top of putting into consideration DC Bias characteristics, please use something whose maximum rating has sufficient margin with respect to the Output Voltage. Output ripple voltage is looked for using the following formula. 1 Vpp=⊿IL× 2π×f×Co + ⊿IL×RESR [V] (3) Please design in a way that it is held within Capacity Ripple Voltage. In the BD9G101G, it is recommended a ceramic capacitor over 10µF. (3) Output Voltage Setting ERROR AMP internal Standard Voltage is 0.75V. Output Voltage is determined as seen in (4) formula. VOUT ERROR AMP R1 Vo= (R1+R2) FB R2 ×0.75[V] ・・・ (4) R2 VREF 0.75 V Figure 44. Voltage Setting (4) Bootstrap Capacitor Please connect from 15000pF (Laminate Ceramic Capacitor) between BST Pin and Lx Pins. (5)Diode Select suitable shottky diode for break down voltage and input current. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 15/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Cautions on PC Board layout Figure 45. Reference PCB layout Layout is a critical portion of good power supply design. There are several signals paths that conduct fast changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power supplies performance. To help eliminate these problems, the VCC pin should be bypassed to ground with a low ESR ceramic bypass capacitor with B dielectric. Care should be taken to minimize the loop area formed by the bypass capacitor connections, the VCC pin, and the anode of the catch diode. See Figure.45 for a PCB layout example. In the BD9G101G, since the LX connection is the switching node, the catch diode and output inductor should be located close to the LX pins, and the area of the PCB conductor minimized to prevent excessive capacitive coupling. And GND area should not be connected directly power GND, connected avoiding the high current switch paths. The additional external components can be placed approximately as shown. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 16/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Power Dissipation t It is shown below reducing characteristics of power dissipation to mount 70mm×70mm×1.6mm , 1layer PCB. Junction temperature must be designed not to exceed 150℃ 1.5 ) W i ٛ d 1 P : n io t a p is is0.5 D re w o P 675mW 0 0 25 50 75 100 125 150 Ambient Temperature: Ta(℃) Figure 46. Power Dissipation ( 70mm×70mm×1.6mmt 1layer PCB) ●Power Dissipation Estimate The following formulas show how to estimate the device power dissipation under continuous mode operations. They should not be used if the device is working in the discontinuous conduction mode. The device power dissipation includes: 2 1) Conduction loss： Pcon = IOUT × RonH × VOUT/VCC –9 2 2) Switching loss: Psw = 0.41 × 10 × VCC × IOUT × fsw –9 3) Gate charge loss： Pgc = 4.88 × 10 × fsw 4) Quiescent current loss： Pq = 0.8× 10–3 × VCC Where: IOUT is the output current (A）, RonH is the on-resistance of the high-side MOSFET（Ω）, VOUT is the output voltage (V). VCC is the input voltage (V), fsw is the switching frequency (Hz). Therefore Power dissipation of IC is the sum of above dissipation. Pd = Pcon + Psw + Pgc + Pq For given Tj, Tj =Ta + θja × Pd Where: Pd is the total device power dissipation (W), Ta is the ambient temperature (℃) Tj is the junction temperature (℃), θja is the thermal resistance of the package (℃) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 17/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●I/O equivalent circuit Pin. No Pin Name 6 Lx 2 GND 1 BST 5 VCC Pin Equivalent Circuit Pin. No Pin Name 4 EN Pin Equivalent Circuit BST VC Lx GND EN GND s FB 3 FB GND Figure 47. I/O equivalent circuit www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 18/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Notes for use (1) About Absolute Maximum Rating When the absolute maximum ratings of application voltage, operating temperature range, etc. was exceeded, there is possibility of deterioration or destruction. Also, the short Mode or open mode, etc. destruction condition cannot be assumed. When the special mode where absolute maximum rating is exceeded is assumed, please give consideration to the physical safety countermeasure for the fuse, etc. (2) About GND Electric Potential In every state, please make the electric potential of GND Pin into the minimum electrical potential. Also, include the actual excessive effect, and please do it such that the pins, excluding the GND Pin do not become the voltage below GND. (3) About Heat Design Consider the Power Dissipation (Pd) in actual state of use, and please make Heat Design with sufficient margin. (4) About short circuit between pins and erroneous mounting When installing to set board, please be mindful of the direction of the IC, phase difference, etc. If it is not installed correctly, there is a chance that the IC will be destroyed. Also, if a foreign object enters the middle of output, the middle of output and power supply GND, etc., even for the case where it is shorted, there is a change of destruction. (5) About the operation inside a strong electro-magnetic field When using inside a strong electro-magnetic field, there is a possibility of error, so please be careful. (6) About checking with Set boards When doing examination with the set board, during connection of capacitor to the pin that has low impedance, there is a possibility of stress in the IC, so for every 1 process, please make sure to do electric discharge. As a countermeasure for static electricity, in the process of assembly, do grounding, and when transporting or storing please be careful. Also, when doing connection to the jig in the examination process, please make sure to turn off the power supply, then connect. After that, turn off the power supply then take it off. (7) About common impedance For the power supply and the wire of GND, lower the common impedance, then, as much as possible, make the ripple smaller (as much as possible make the wire thick and short, and lower the ripple from L・C), etc., then and please consider it sufficiently. (8) In the application, when the mode where the VCC and each pin electrical potential becomes reversed exists, there is a possibility that the internal circuit will become damaged. For example, during cases wherein the condition when charge was given in the external capacitor, and the VCC was shorted to GND, it is recommended to insert the bypass diode to the diode of the back current prevention in the VCC series or the middle of each Pin-VCC. ～ ～ (9) About IC Pin Input + This IC is a Monolithic IC, and between each element, it has P isolation for element separation and P board. With the N layer of each element and this, the P-N junction is formed, and the parasitic element of each type is composed. For example, like the diagram below, when resistor and transistor is connected to Pin, ○When GND＞(PinA) in Resistor, when GND＞(PinA), when GND＞(PinB) in Transistor (NPN), the P-N junction will operate as a parasitic diode. ○Also, during GND＞(Pin B) in the Transistor (NPN), through the N layer of the other elements connected to the above-mentioned parasitic diode , the parasitic NPN Transistor will operation. On the composition of IC, depending on the electrical potential, the parasitic element will become necessary. Through the operation of the parasitic element interference of circuit operation will arouse, and error, therefore destruction can be caused. Therefore please be careful about the applying of voltage lower than the GND (P board) in I/O Pin, and the way of using when parasitic element operating. Transistor (NPN) Resistor B (Pin B) E C (Pin A) P＋ N N P P P＋ N GND P N Ｎ P Substrate P Substrate Parasitic Element GND Parasitic Element (Pin A) ＋ P N ～ ～ N ＋ GND Figure 48. Example of simple structure of Bipolar IC Status of this document The English version of this document is formal specification. A customer may use this translation version only for a reference to help reading the formal version. If there are any differences in translation version of this document formal version takes priority www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 19/20 TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet BD9G101G ●Ordering part number B D 9 G 1 0 Part Number 1 G - package G: SSOP6 TR Packaging and forming specification TR: Embossed tape and reel ●External information １pin mark LOT No SSOP6 <Tape and Reel information> Tape Embossed carrier tape Quantity 3000pcs Direction of feed TR The direction is the 1pin of product is at the upper right when you hold ( reel on the left hand and you pull out the tape on the right hand ) 1pin Direction of feed Reel www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 20/20 ∗ Order quantity needs to be multiple of the minimum quantity. TSZ02201-0Q1Q0AJ00150-1-2 30.AUG.2012 Rev.001 Datasheet Notice ●General Precaution 1) Before you use our Products, you are requested to carefully read this document and fully understand its contents. ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any ROHM’s Products against warning, caution or note contained in this document. 2) All information contained in this document is current as of the issuing date and subject to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales representative. ●Precaution on using ROHM Products 1) Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). 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Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7) De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 8) Confirm that operation temperature is within the specified range described in the product specification. 9) ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Notice - Rev.003 © 2012 ROHM Co., Ltd. All rights reserved. Datasheet ●Precaution for Mounting / Circuit board design 1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the ROHM representative in advance. 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