1/4 STRUCTURE Silicon monolithic integrated circuits PRODUCT SERIES 2-in-1 motor driver for VTR TYPE BD6904FP FUNCTION ・VTR cylinder motor driver (Sensorless 3-phase full-wave soft switching drive system) ・VTR loading motor driver ○Absolute maximum ratings (Ta=25℃) Parameter Supply voltage Power dissipation Operating temperature range Storage temperature range Maximum output current (cylinder block) Maximum output current (loading block) Junction temperature Symbol Limit Unit VCC 7 V VM VG Pd Topr Tstg Iomax1 Iomax2 Tjmax 15 V V mW ℃ ℃ mA mA ℃ 20 1450※ 1 -20～+75 -55～+150 800※ 2 800※ 2 +150 ※1 90mm×90mm×1.6mm glass epoxy board. Derating in done at 11.6mW/℃ for operating above Ta=25℃. ※2 Do not, however exceed Pd, ASO and Tjmax=150℃. ○Recommended operating conditions (Ta= -25～+75℃) Parameter Supply voltage COM input in-phase voltage range PG amp in-phase input voltage range Symbol Min Typ Max Unit VCC VM VG VCOMD VPD 4.5 9 VM+2 0 1.5 5 12 17 - 5.5 14 19 VM-2.5 3.7 V V V V V This product described in this specification isn’t judged whether it applies to COCOM regulations. Please confirm in case of export. This product isn’t designed for protection against radioactive rays. REV. B 2/4 ○Electrical characteristics (Unless otherwise specified, Ta=25℃, VCC=5V, VM1=VM2=12V, VG=17V) Parameter Symbol Limit Unit Conditions Min. Typ. Max. ICC - 9 13 mA High-side output saturation voltage VOH - 0.4 0.7 V Io=-300mA Low-side output saturation voltage VOL - 0.55 0.85 V Io=300mA BEMF comparator hysteresis width + VHYSB+ +24 +36 +48 mV BEMF comparator hysteresis width - VHYSB- -59 -43 -27 mV VECR 2.35 2.5 2.65 V Torque reference I/O gain Gio 0.80 1.06 1.33 A/V Current limit voltage VCL 239 295 345 mV CT1, CT2 charge current ICTD -53 -39 -25 μA CT1, CT2 discharge current ICTI 29 45 61 μA High CT1, CT2 clamp voltage VCTH 3.4 3.8 4.2 V Low CT1, CT2 clamp voltage VCTL 0.85 1.05 1.25 V ICSTO -20 -14 -8 μA Overall VCC total supply current Output BEMF comparator Torque reference Torque reference start voltage EC=2.3V-2.2V Gain output (HLM) RRNF=0.68 RRNF=0.68Ω Soft switch Startup control logic CST charge current ICSTI 2 5.5 9 μA High CST clamp voltage VCSTH 2.4 2.8 3.2 V Low CST clamp voltage VCSTL 0.8 1.0 1.2 V CST off voltage VCSTO 3.6 3.8 4.0 V CST discharge current PG amp Input bias current IPG- - 1 3 μA Input offset voltage VIOP -8 - +8 mV DC bias voltage VBP 2.25 2.5 2.75 V Voltage gain 1 AV1 50 71 - dB f=1kHz High output voltage VOHP 3.4 3.75 - V IOH=-1mA Low output voltage VOLP - 1.2 1.6 V IOL=1mA VBP-0.1 VBP-0.125 V PG-=2.5V PFG output PG detection level VPGTH VBP-0.075 High output voltage VPFGH 3.5 - - V IO=-30μA Middle output voltage VPFGM 2.1 - 2.9 V IO=±10μA Low output voltage VPFGL - - 0.9 V IO=30μA Loading High-level FIN input VFINH 3.5 - - V High-level RIN input VRINH 3.5 - - V Low-level FIN input VFINL - - 1.5 V Low-level RIN input VRINL - - 1.5 V VCE - 0.3 0.6 V IO=200mA, Output saturation voltage total of output transistor high-side and low-side voltage ※Source currents are treated as negative while sinking currents are treated as positive. REV. B 3/4 ○Package outline Product No. BD6904FP Lot No. HSOP-25 (Unit:mm) ○Block diagram ○Pin No. / Pin name Pin No. Back EMF detection comparator VM1 output VCC U Pre-drive Drive signal selector V COM W RNF Startup Control logic CST Soft switch waveform CT1 CT2 Low-side saturation prevention TSD Control logic ERR Amp FIN 6 RIN 7 VG 8 GND 9 CST 10 CT1 11 CT2 EC 15 PG+ 16 PG- FIN RIN LGND OUT2 5 14 PG FG synthesis GND OUT2 PCI comparator PFGOUT LGND 4 PCI PG Amp Hysteresis PGOUT 3 CNF VM2 PG- OUT1 13 CNF PG+ VM2 2 VG Pre-drive VCC 1 12 CS Amp EC Pin name OUT1 REV. B 17 PGOUT 18 PFGOUT 19 VCC 20 COM 21 VM1 22 U 23 V 24 RNF 25 W 4/4 ○Operation Notes (1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range (Topr) may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. The implementation of a physical safety measure such as a fuse should be considered when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated. (2) Power supply lines Regenerated current may flow as a result of the motor's back electromotive force. Insert capacitors between the power supply and ground pins to serve as a route for regenerated current. Determine the capacitance in full consideration of all the characteristics of the electrolytic capacitor, because the electrolytic capacitor may loose some capacitance at low temperatures. If the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. It is recommended to implement a physical safety measure such as the insertion of a voltage clamp diode between the power supply and GND pins. (3) Ground potential Ensure a minimum GND pin potential in all operating conditions. (4) Setting of heat Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. (5) Actions in strong magnetic field Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction. (6) ASO When using the IC, set the output transistor for the motor so that it does not exceed absolute maximum ratings or ASO. (7) Thermal shutdown circuit This IC incorporates a TSD (thermal shutdown) circuit (TSD circuit). If the temperature of the chip reaches the following temperature, the motor coil output will be opened.The thermal shutdown circuit (TSD circuit) is designed only to shut the IC off to prevent runaway thermal operation. It is not designed to protect the IC or guarantee its operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is assumed. TSD on temperature [°C] (typ.) Hysteresis temperature [°C] (typ.) 170 20 (8) Ground Wiring Pattern When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either. REV. B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). 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