IDT54/74FCT374/A/C IDT54/74FCT534/A/C IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • IDT54/74FCT374/534/574 equivalent to FAST speed and drive • IDT54/74FCT374A/534A/574A up to 30% faster than FAST • IDT54/74FCT374C/534C/574C up to 50% faster than FAST • IOL = 48mA (commercial) and 32mA (military) • CMOS power levels (1mW typ. static) • Edge triggered master/slave, D-type flip-flops • Buffered common clock and buffered common threestate control • Product available in Radiation Tolerant and Radiation Enhanced versions • Military product compliant to MIL-STD-883, Class B • Meets or exceeds JEDEC Standard 18 specifications The IDT54/74FCT374/A/C, IDT54/74FCT534/A/C and IDT54/74FCT574/A/C are 8-bit registers built using an advanced dual metal CMOS technology. These registers consist of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) is LOW, the eight outputs are enabled. When the OE input is HIGH, the outputs are in the high-impedance state. Input data meeting the set-up and hold time requirements of the D inputs is transferred to the O outputs on the LOW-toHIGH transition of the clock input. The IDT54/74FCT374/A/C and IDT54/74FCT574/A/ C have non-inverting outputs with respect to the data at the D inputs. The IDT54/74FCT534/A/C have inverting outputs. FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT374 AND IDT54/74FCT574 D0 D1 D2 D3 D4 D5 D6 D7 CP CP D CP D CP D CP D CP D CP D CP D CP D Q Q Q Q Q Q Q Q O0 O1 O2 O3 O4 O5 O6 O7 OE 2603 cnv* 01 FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT534 D0 D1 D2 D3 D4 D5 D6 D7 CP CP D CP D CP D CP D CP D CP D CP D CP D Q Q Q Q Q Q Q Q O0 O1 O2 O3 O4 O5 O6 O7 OE 2603 cnv* 02 The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a trademark of National Semiconductor, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES 1992 Integrated Device Technology, Inc. 7.13 MAY 1992 DSC-4622/2 1 IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS D5 6 D2 7 D3 8 13 D4 O3 GND 9 12 10 11 O4 CP O1 O2 6 D2 D3 7 2 1 20 VCC 2 3 19 O0 5 D4 6 17 16 15 O6 15 O5 14 D5 O3 2603 cnv* 04 D1 5 1 O2 6 1 O3 7 1 O4 8 1 O5 O3 O4 D4 D5 D6 D6 8 13 O5 O6 D7 GND 9 12 O7 10 11 CP 2 1 O1 D3 7 1 1 O1 O2 4 D5 14 3 2 D2 L20-2 9 1 1 1 1 D7 GND D3 P20-1 D20-1 SO20-2 & E20-1 16 LCC TOP VIEW INDEX 4 D6 9 10 11 12 13 IDT54/74FCT574 18 D7 17 L20-2 DIP/SOIC/CERPACK TOP VIEW D1 D2 20 19 18 8 2603 cnv* 03 OE D0 1 D4 14 O2 5 3 O4 15 O6 O5 5 4 VCC O0 16 O1 D1 2603 cnv* 05 O7 D6 P20-1 D20-1 SO20-2 & E20-1 O6 17 4 OE VCC O7 D7 CP O7 18 OE 19 CP 2 3 INDEX VCC D0 20 GND D0 D1 1 D0 OE O0 O0 IDT54/74FCT374 2603 cnv* 06 LCC TOP VIEW DIP/SOIC/CERPACK TOP VIEW 19 O7 18 D7 D1 4 D6 O1 5 O2 6 D2 7 P20-1 17 D20-1 16 SO20-2 15 & E20-1 14 D3 8 13 D4 O3 GND 9 12 O4 10 11 CP 3 2 O6 O5 D5 D1 4 O1 5 O2 D2 D3 6 VCC O7 2 3 1 20 19 18 17 D7 D6 16 O6 7 15 8 14 O5 D5 L20-2 9 10 11 12 13 2603 cnv* 07 DIP/SOIC/CERPACK TOP VIEW D4 O0 D0 VCC CP O4 20 O0 1 O3 GND OE D0 INDEX OE IDT54/74FCT534 2603 cnv* 08 LCC TOP VIEW 7.13 2 IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN DESCRIPTION Pin Names DN CP Description D flip-flop data inputs. Clock Pulse for the register. Enters data on LOW-to-HIGH transition. 3-state outputs, (true). ON ON OE 3-state outputs, (inverted). Active LOW 3-state Output Enable input. 2603 tbl 06 FUNCTION TABLE(1) FCT534 Outputs Internal Inputs Function Hi-Z Load Register OE CP DN ON QN ON QN H H L L H H L H X X L H L H Z Z H L Z Z NC NC L H L H Z Z L H Z Z NC NC H L H L u u u u NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care 2603 tbl 05 Z = High Impedance NC = No Change = LOW-to-HIGH transition u ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Commercial VTERM(2) Terminal Voltage –0.5 to +7.0 with Respect to GND (3) VTERM Terminal Voltage –0.5 to VCC with Respect to GND TA Operating 0 to +70 Temperature TBIAS Temperature –55 to +125 Under Bias TSTG Storage –55 to +125 Temperature PT Power Dissipation 0.5 IOUT DC Output Current FCT374/574 Outputs Internal 120 CAPACITANCE (TA = +25°C, f = 1.0MHz) Military –0.5 to +7.0 Unit V –0.5 to VCC V –55 to +125 °C –65 to +135 °C –65 to +150 °C 0.5 W 120 mA Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V Typ. 6 Max. 10 Unit VOUT = 0V 8 12 pF pF NOTE: 2603 tbl 02 1. This parameter is measured at characterization but not tested. NOTES: 2603 tbl 01 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only. 7.13 3 IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10% Parameter Input HIGH Level Test Conditions(1) Guaranteed Logic HIGH Level VIL Input LOW Level Guaranteed Logic LOW Level II H Input HIGH Current VCC = Max. VI = VCC VI = 2.7V Symbol VIH II L IOZH Input LOW Current Off State (High Impedance) VCC = Max. Output Current IOZL Typ.(2) — Max. — — — 0.8 V — — 5 µA — — 5(4) VI = 0.5V — — –5(4) VI = GND — — –5 VO = VCC — — 10 Min. 2.0 VO = 2.7V — — 10(4) VO = 0.5V — — –10(4) VO = GND — — –10 Unit V µA VIK Clamp Diode Voltage VCC = Min., IN = –18mA — –0.7 –1.2 V IOS Short Circuit Current VCC = Max.(3) , VO = GND –60 –120 — mA VOH Output HIGH Voltage VCC = 3V, VIN = VLC or VHC, IOH = –32µA VHC VCC — V VOL Output LOW Voltage VCC = Min. IOH = –300µA VHC VCC — VIN = VIH or VIL IOH = –12mA MIL. 2.4 4.3 — IOH = –15mA COM'L. 2.4 4.3 — VCC = 3V, VIN = VLC or VHC, IOL = 300µA — GND VLC VCC = Min. IOL = 300µA — GND VLC(4) VIN = VIH or VIL IOL = 32mA MIL. — 0.3 0.5 IOL = 48mA COM'L. — 0.3 0.5 NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. This parameter is guaranteed but not tested. 7.13 V 2603 tbl 03 4 IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS VLC = 0.2V; VHC = VCC – 0.2V Symbol ICC Test Conditions(1) Parameter Quiescent Power Supply Current VCC = Max. VIN ≥ VHC; V IN ≤ V LC Min. Typ.(2) Max. Unit — 0.2 1.5 mA — 0.5 2.0 mA ∆ICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = 3.4V(3) ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open OE = GND One Input Toggling 50% Duty Cycle VIN ≥ VHC VIN ≤ VLC — 0.15 0.25 mA/ MHz IC Total Power Supply Current (6) VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND fi = 5MHz 50% Duty Cycle One Bit Toggling VIN ≥ VHC VIN ≤ VLC (FCT) — 1.7 4.0 mA VIN = 3.4V VIN = GND — 2.2 6.0 VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND Eight Bits Toggling fi = 2.5MHz 50% Duty Cycle VIN ≥ VHC VIN ≤ VLC (FCT) — 4.0 7.8 (5) VIN = 3.4V VIN = GND — 6.2 16.8 (5) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. 7.13 2603 tbl 04 5 IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE FCT374/534/574 Com'l. Symbol Parameter tPLH tPHL Propagation Delay CP to ON(3) tPZH tPZL tPHZ tPLZ tSU Output Enable Time tH tW Output Disable Time Set-up Time HIGH or LOW, DN to CP Hold Time HIGH or LOW, DN to CP CP Pulse Width HIGH or LOW Conditions(1) CL = 50pF RL = 500Ω Min.(2) Mil. Max. Min.(2) 2.0 10.0 1.5 FCT374A/534A/574A FCT374C/534C/574C Com'l. Com'l. Max. Min.(2) 2.0 11.0 12.5 1.5 1.5 8.0 2.0 Mil. Max. Min.(2) Max. Min.(2) 2.0 6.5 2.0 7.2 14.0 1.5 6.5 1.5 1.5 8.0 1.5 5.5 — 2.0 — 2.0 1.5 — 1.5 — 7.0 — 7.0 — NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. ON for FCT374 and FCT574, ON for FCT534. Mil. Max. Min.(2) Max. Unit 2.0 5.2 2.0 6.2 ns 7.5 1.5 5.5 1.5 6.2 ns 1.5 6.5 1.5 5.0 1.5 5.7 ns — 2.0 — 2.0 — 2.0 — ns 1.5 — 1.5 — 1.5 — 1.5 — ns 5.0 — 6.0 — 5.0 — 6.0 — ns 2603 tbl 07 7.13 6 IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS VCC 7.0V 500Ω V OUT VIN Pulse Generator D.U.T. 50pF RT 500Ω SET-UP, HOLD AND RELEASE TIMES Closed All Other Tests Open 3V 1.5V 0V tH TIMING INPUT 3V 1.5V 0V LOW-HIGH-LOW PULSE 3V 1.5V 0V HIGH-LOW-HIGH PULSE 1.5V tW t REM PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. Open Drain Disable Low Enable Low PULSE WIDTH DATA INPUT ASYNCHRONOUS CONTROL Switch DEFINITIONS: 2603 tbl 08 CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. CL t SU Test t SU 1.5V 3V 1.5V 0V tH PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE DISABLE 3V 3V 1.5V SAME PHASE INPUT TRANSITION t PLH t PHL CONTROL INPUT OUTPUT NORMALLY SWITCH LOW CLOSED t PZH VOL t PLH t PHL OUTPUT SWITCH NORMALLY OPEN HIGH 3V OPPOSITE PHASE INPUT TRANSITION 1.5V 0V t PLZ t PZL 0V VOH 1.5V OUTPUT 1.5V 3.5V 1.5V 3.5V 0.3V V OL t PHZ 0.3V 1.5V 0V V OH 0V 0V NOTES 2603 drw 15 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0 MHz; ZO ≤ 50Ω; tF ≤ 2.5ns; tR ≤ 2.5ns. 7.13 7 IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION IDT FCT XX XXXX Temp. Range Device Type X Package X Process Blank B Commercial MIL-STD-883, Class B P D SO L E Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK 374 574 534 374A 574A 534A 374C 574C 534C Non-Inverting Octal D Register Non-Inverting Octal D Register Inverting Octal D Register Fast Non-Inverting Octal D Register Fast Non-Inverting Octal D Register Fast Inverting Octal D Register Super Fast Non-Inverting Octal D Register Super Fast Non-Inverting Octal D Register Super Fast Inverting Octal D Register 54 74 –55°C to +125°C 0°C to +70°C 2603 cnv* 14 7.13 8