SSF4953

SSF4953
30V Dual P-Channel MOSFET
DESCRIPTION
D1
The SSF4953 uses advanced trench technology to
provide excellent RDS(ON), low gate charge. It has
been optimized for power management applications
requiring a wide range of gave drive voltage ratings
(4.5V – 25V).
D2
G1
G2
S1
S2
Schematic Diagram
GENERAL FEATURES
D1 D1 D2 D2
●V DS = -30V,ID = -5.3A
RDS(ON) < 85mΩ @ VGS=-4.5V
RDS(ON) < 53mΩ @ VGS=-10V
8
7
6
5
4 9 53
● High Power and current handing capability
● Lead free product
● Surface Mount Package
1
2
3
4
S1 G 1 S2 G 2
Marking and Pin Assignment
APPLICATIONS
●Battery protection
●Load switch
●Power management
SOP-8 Top View
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
Device
Device Package
Reel Size
Tape Width
Quantity
4953
SSF4953
SOP-8
Ø330mm
12mm
3000 units
ABSOLUTE MAXIMUM RATINGS (T A=25℃unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
V DS
-30
V
Gate-Source Voltage
V GS
±20
V
ID
-5.3
A
IDM
-20
A
PD
2.0
W
TJ,TSTG
-55 To 150
℃
R θJA
62.5
℃/W
Drain Current-Continuous@ Current-Pulsed (Note 1)
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
THERMAL CHARACTERISTICS
Thermal Resistance,Junction-to-Ambient (Note 2)
ELECTRICAL CHARACTERISTICS (T A=25℃unless otherwise noted)
Parameter
Symbol
Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
BVDSS
VGS=0V ID=-250μA
Zero Gate Voltage Drain Current
IDSS
VDS=-24V,VGS=0V
-1
μA
Gate-Body Leakage Current
IGSS
VGS=±25V,VDS=0V
±100
nA
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Page 1 of 6
-30
V
Rev.2.0
SSF4953
30V Dual P-Channel MOSFET
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Drain-Source On-State Resistance
Forward Transconductance
VGS(th)
R DS(ON)
gFS
V DS=VGS, ID =-250μA
-1
-3
V
VGS=-10V, ID =-5.3A
46
53
VGS=-4.5V, ID =-4A
70
85
VDS=-5V, ID =-5.3A
8
S
525
PF
135
PF
PF
mΩ
DYNAMIC CHARACTERISTICS (Note4)
Input Capacitance
Clss
VDS=-15V,V GS=0V,
F=1.0MHz
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
70
Turn-on Delay Time
td(on)
7
14
nS
Turn-on Rise Time
tr
13
24
nS
14
25
nS
SWITCHING CHARACTERISTICS (Note 4)
Turn-Off Delay Time
td(off)
VDD=-15V, ID =-1A
VGS=-10V,RGEN=6Ω
Turn-Off Fall Time
tf
9
17
nS
Total Gate Charge
Qg
6
9
nC
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
V DS=-15V, ID=-4.5A,V GS=-10V
2.2
nC
2
nC
DRAIN-SOURCE DIODE CHARACTERISTICS
Diode Forward Voltage (Note 3)
VSD
Diode Forward Current (Note 2)
IS
VGS=0V,IS=-2.1A
-0.8
-1.2
V
-2.1
A
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
2. Surface Mounted on FR4 Board, t ≤ 10 sec.
3. Pulse Test: Pulse Width ≤ 300μs, Duty Cycle ≤ 2%.
4. Guaranteed by design, not subject to production testing.
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Page 2 of 6
Rev.2.0
SSF4953
30V Dual P-Channel MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
ton
tr
td(on)
toff
tf
td(off)
90%
VOUT
90%
INVERTED
10%
10%
90%
VIN
50%
50%
10%
PULSE WIDTH
Figure 2:Switching Waveforms
PD Power(W)
-ID- Drain Current (A)
Figure 1:Switching Test Circuit
TJ-Junction Temperature(℃)
TJ-Junction Temperature(℃)
Figure 3 Power Dissipation
-ID- Drain Current (A)
Rdson On-Resistance(Ω)
Figure 4 Drain Current
-ID- Drain Current (A)
-Vds Drain-Source Voltage (V)
Figure 5 Output CHARACTERISTICS
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Figure 6 Drain-Source On-Resistance
Page 3 of 6
Rev.2.0
SSF4953
-ID- Drain Current (A)
Normalized On-Resistance
30V Dual P-Channel MOSFET
-Vgs Gate-Source Voltage (V)
TJ-Junction Temperature(℃)
Figure 8 Drain-Source On-Resistance
C Capacitance (pF)
Rdson On-Resistance(mΩ)
Figure 7 Transfer Characteristics
-Vds Drain-Source Voltage (V)
Figure 9 Rdson vs Vgs
Figure 10 Capacitance vs Vds
-Is- Reverse Drain Current (A)
-Vgs Gate-Source Voltage (V)
-Vgs Gate-Source Voltage (V)
Qg Gate Charge (nC)
Figure 11 Gate Charge
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-Vsd Source-Drain Voltage (V)
Figure 12 Source- Drain Diode Forward
Page 4 of 6
Rev.2.0
SSF4953
-ID- Drain Current (A)
30V Dual P-Channel MOSFET
Vds Drain-Source Voltage (V)
Safe Operation Area
r(t),Normalized Effective
Transient Thermal Impedance
Figure 13
Square Wave Pluse Duration(sec)
Figure 3: Normalized Maximum Transient Thermal Impedan
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Page 5 of 6
Rev.2.0
SSF4953
30V Dual P-Channel MOSFET
SOP-8 PACKAGE INFORMATION
NOTES:
1. Dimensions are inclusive of plating
2. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.
3. Dimension L is measured in gauge plane.
4. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
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Page 6 of 6
Rev.2.0