200323A.pdf

APPLICATION NOTE
APN1013: A Differential VCO Design for
GSM Handset Applications
Introduction
The VCO Model
The differential pair of bipolar transistors is the common building
block in modern RF integrated circuits. An advantage of this
architecture is its high loop gain making it popular for differential
Voltage Controlled Oscillator (VCO) designs in RFICs. Designers of
discrete (or hybrid) VCO circuits usually use the more traditional
Colpitts design, avoiding the added complexity of the differential
VCO configuration.
In the circuit in Figure 1 the transistor pair X1 and X2 form a
differential configuration with X3 as a current source. All of the
transistors are NEC NE68519 with 12 GHz fT. We chose this
transistor for this demonstration because it is commonly used in
many VCO applications and its SPICE parameters are available.
The RF signal from collector of X1 is fed through the coupling
capacitor SRLC3 to the resonator. The resonator is formed by the
parallel connection of capacitive branches SRLC4 and SRLC5/X4,
and the inductive branch formed by microstrip line TL1. The
output signal from the resonator is fed through the coupling
capacitor SRLC2 to the base of transistor X2, which is in differential feedback with X1. There it closes the feedback path. Ideally,
the phase shift between the base of X2 and the collector of X1 in
the differential stage is 0°, and the oscillation should occur at the
exact parallel resonance of the tank circuit. In reality, however,
the phase shift in the differential pair is not 0°, because of
unavoidable transit times and parasitic reactances.
Because of its primary usage in proprietary RFICs, only limited
differential VCO design and modeling information has been made
available. In this application note, we will attempt to build a
bridge toward better understanding of the differential VCO by
describing a design covering 910–980 MHz which is appropriate
for use in GSM handsets. This design will also demonstrate how
the SMV1493-079 varactor diode, an essential element in this
VCO, may be used advantageously in designs aimed at other
wireless applications including AMPS, CDMA, and PCS.
For example, the phase shift in this loop changes from
-50° to -100° in the frequency range of 0.8–1.5 GHz. To
compensate this (capacitive) phase shift, the resonator should be
inductive and provide an opposite phase shift. It is interesting to
note that compared to the Colpitts VCO configuration, the
resonant frequency may be set at the exact oscillation frequency.
The Colpitts design cannot be used at the natural resonance
frequency of the resonator due to losses in the feedback path.
Therefore, the differential design has the advantage of both high
phase slope at resonance and low loss in the feedback path.
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APPLICATION NOTE • APN1013
Spice Model for SMV1493-079
Figure 1. VCO Model Schematic
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APPLICATION NOTE • APN1013
Capacitors SRLC2 and SRLC3 are used to obtain the required
phase shift at the center of the tank circuit resonant frequency.
By changing the values of these capacitors, optimum phase noise
may be achieved.
Resistor R5 suppresses higher frequency oscillation modes
caused by the parasitic resonance between SRLC4 and varactor
branch SRLC5/X4. A resistance of 20–50 Ω is normally enough to
perform this function without serious degradation of loop power
and phase noise.
In the VCO model test bench in Figure 2 we define open loop
gain, Ku = VOUT/VIN, as the ratio of voltage phasors at the input
and output ports of an OSCTEST component. Defining the oscillation point is a technique to balance input (loop) power to
provide zero gain for a zero loop phase shift. Once the oscillation
point is defined, the frequency and output power may be
“measured.” We do not recommend the use of the OSCTEST2
component for closed loop analysis, since it may not converge
and does not allow clear insight to VCO behavior.
The differential stage bias is set by voltage dividers R6/PRC1 and
R8/R7. The base currents are limited by R3 and R5 for the differential pair and R2 for the current source. In this case, the 3 V, VCC
current is set to about 7 mA.
Figure 2. VCO Model Test Bench
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APPLICATION NOTE • APN1013
.
Figure 3. VCO Model Default Bench
Figure 3 shows the default bench where some circuit variables
were defined in the “Variables and Equations” component
for the convenience of “tuning” during performance analysis
and optimization
SMV1493-079 SPICE Model
SMV1493-079 is a low series resistance, hyperabrupt junction
varactor diode. It features the industry’s smallest plastic package
SC-79 with a body size of 47 x 31 x 24 mm (the total length with
leads is 62 mm).
The SPICE model for the SMV1493-079 varactor diode, defined
for the Libra IV environment, is shown in Figure 1 with a
description of the parameters employed.
Table 1 describes the model parameters. It shows default values
appropriate for silicon varactor diodes that may be used by the
Libra IV simulator.
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APPLICATION NOTE • APN1013
Parameter
Unit
Default
IS
Saturation current (with N, determine the DC characteristics of the diode)
Description
A
1e-14
RS
Series resistance
Ω
0
N
Emission coefficient (with IS, determines the DC characteristics of the diode)
-
1
TT
Transit time
S
0
CJO
Zero-bias junction capacitance (with VJ and M define nonlinear junction capacitance of the diode)
F
0
VJ
Junction potential (with VJ and M define nonlinear junction capacitance of the diode)
V
1
M
Grading coefficient (with VJ and M define nonlinear junction capacitance of the diode)
-
0.5
EG
Energy gap (with XTI, helps define the dependence of IS on temperature)
eV
1.11
XTI
Saturation current temperature exponent (with EG, helps define the dependence of IS on temperature)
-
3
KF
Flicker noise coefficient
-
0
AF
Flicker noise exponent
-
1
FC
Forward bias depletion capacitance coefficient
-
0.5
BV
Reverse breakdown voltage
V
Infinity
IBV
Current at reverse breakdown voltage
A
1e-3
ISR
Recombination current parameter
A
0
NR
Emission coefficient for ISR
-
2
IKF
High injection knee current
A
Infinity
NBV
Reverse breakdown ideality factor
-
1
IBVL
Low-level reverse breakdown knee current
A
0
NBVL
Low-level reverse breakdown ideality factor
-
1
TNOM
Nominal ambient temperature at which these model parameters were derived
°C
27
FFE
Flicker noise frequency exponent
-
1
Table 1. Silicon Diode Default Values in Libra IV
According to the SPICE model, the varactor capacitance, CV, is a
function of the applied reverse DC voltage, VR, and may be
expressed as follows:
CV =
CJO
M
( 1 + VVAR )
Part CJO
Number
M
(pF)
VJ
CP
(V)
RS
(pF)
LS
Ω)
(Ω
(nH)
SMV1493-079
29
0.47
0.63
0
0.25
1.7
Table 2. SPICE Parameters for SMV1493-079
+ CP
VJ
30
Note, that in the Libra model above, CP is given in picofarads,
while CGO is given in farads to comply with the default unit
system used in Libra.
25
Capacitance (pF)
This equation is a mathematical expression of the capacitance
characteristic. The model is accurate for abrupt junction varactors
(like the SMV1408). For hyperabrupt junction varactors, the model
is less accurate because the coefficients are dependent on the
applied voltage. To make the equation work better for the hyperabrupt varactors, the coefficients were optimized for the best
capacitance vs. voltage fit as shown in Table 2 and Figure 4.
Measurement Data
Model
20
15
10
5
0
1
2
3
4
5
Varactor Voltage (V)
Figure 4. SMV1493-079 CV Curve
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APPLICATION NOTE • APN1013
VCO Design, Materials, Layout and Performance
The differential VCO schematic diagram appropriate for an RFIC
in many wireless or cordless applications is shown in Figure 5.
This circuit is supplied from the 3 V voltage source. The ICC
current is established at approximately 8 mA, and the RF output
signal is fed from the VCO through capacitor C4 (1 pF).
The PCB layout is shown in Figure 6. The board is made of
standard 30 mil thick FR4 material.
Table 3 lists the bill of materials.
VCC +3 V
L1
33 n
R4
3k
R2
3k
R7
3k
R6
3k
R10
51
C6
100 p
R1
47
C3
2p
C2
3.6 p
C4
1p
RF Out
V2
NE68519
V1
NE68519
C8
6p
R9
3.9 k
R5
3k
R3
9.1 k
C1
100 p
V3
NE68519
C7
2p
M1
4 x 0.5 mm
R8
20
M2
6.5 x 0.2 mm
D1
SMV1493-079
VVAR
C5
100 p
Figure 5. VCO Schematic Diagram
Figure 6. Differential VCO PC Board Layout
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APPLICATION NOTE • APN1013
Designator
Value
Part Number
Footprint
Manufacturer
C1
100 p
0603AU101JAT9
0603
AVX
C2
3.6 p
0603AU3R6JAT9
0603
AVX
C3
2p
0603AU2R0JAT9
0603
AVX
C4
1p
0603AU1R0JAT9
0603
AVX
C5
100 p
0603AU101JAT9
0603
AVX
C6
100 p
0603AU101JAT9
0603
AVX
C7
2p
0603AU2R0JAT9
0603
AVX
C8
6p
0603AU6R0JAT9
0603
AVX
D1
SMV1493-079
SMV1493-079
SOD-323
Skyworks Solutions
Coilcraft
L1
33 n
0603CS-33NX_BC
0603
M1
4 x 0.5 mm
MSL
4 x 0.5 mm
M2
6.5 x 0.2 mm
MSL
6.5 x 0.2 mm
R1
47
CR10-470J-T
0603
AVX
R10
51
CR10-510J-T
0603
AVX
R2
3k
CR10-302J-T
0603
AVX
R3
9.1 k
CR10-912J-T
0603
AVX
R4
3k
CR10-302J-T
0603
AVX
R5
3k
CR10-302J-T
0603
AVX
R6
3k
CR10-302J-T
0603
AVX
R7
3k
CR10-302J-T
0603
AVX
R8
20
CR10-200J-T
0603
AVX
R9
3.9 k
CR10-392J-T
0603
AVX
V1
NE68519
NE68519
SOT-416
NEC
V2
NE68519
NE68519
SOT-416
NEC
V3
NE68519
NE68519
SOT-416
NEC
Table 3. VCOs Bill of Materials
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APPLICATION NOTE • APN1013
The measured performance of this circuit and the simulated
results obtained with the model are shown in Figure 7.
Fairly good compliance of frequency response vs. varactor tuning
voltage confirms the validity of the varactor model for predicting
the frequency behavior of the VCO. However, the power response
simulation indicates more variation of power in the tuning range
than the measured response. This may be due to the transistor
modeling accuracy or the accuracy of the overall VCO model. For
example, simulations show that the power may strongly depend
on high order harmonics which may not be accurately described
by the VCO model.
1.00
-5
Frequency Simulated
0.98
-6
0.96
-7
0.94
-8
-9
0.92
Output Power (dBm)
Frequency (GHz)
example, after exchanging the varactor with a lower loss discrete
ceramic capacitor, the phase noise was improved by 5–6 dB. In
another example, increasing the solder thickness on the
microstrip line improved phase noise as much as 3 dB. In
comparison, typically there is less phase noise sensitivity to
circuit components in a Colpitts VCO design, where the oscillation
frequency is always below the resonance frequency of the
resonator.
Power Simulated
-10
0.90
0
1
2
3
Figure 8. The VCO Phase Noise
vs. Carrier Offset Frequency
Tuning Voltage (V)
Frequency Meas.
Power Meas.
Figure 7. Measured and Simulated Frequency and Power
Responses of the Differential VCO
Figure 8 shows the phase noise of the VCO measured in the
range of 100 Hz to 8 MHz offset from the carrier. This
measurement was made using the Aeroflex PN9000 Phase Noise
Test Set with a 40 ns delay line. The best phase noise occurred
with circuit components very close to the originally established
values in the preliminary simulation. Only small changes were
introduced such as: C2 from its original 4 pF to 3.6 pF, C3 from
1.5 pF to 2 pF and C4 from 1.5 pF to 1 pF.
Phase noise was approximately -93 dBc/Hz at a 10 kHz offset,
which is about 5–10 dB poorer than a typical Colpitts low noise
VCO having similar bias condition. The reason for the poorer
phase noise may be that the resonator in a differential VCO works
at its resonance frequency (or very near to it). This results in high
reactive currents in the resonator, causing high power losses,
causing much higher phase noise sensitivity to resonator
component losses. This was confirmed by replacing the resonator
circuit components with similar ones having less loss. For
List of Available Documents
The Differential RF VCO Simulation Project Files for Libra IV.
The Differential RF VCO Circuit Schematic and PCB Layout for
Protel EDA Client, 1998 Version.
The Differential RF VCO PCB Gerber Photo-plot Files.
VCO Related Application Notes
APN1004, “Varactor SPICE Models for RF VCO Applications.”
APN1006, “A Colpitts VCO for Wideband (0.95– 2.15 GHz) Set-Top
TV Tuner Applications.”
APN1005, “A Balanced Wideband VCO for Set-Top TV Tuner
Applications.”
APN1007, “Switchable Dual-Band 170/420 MHz VCO for Handset
Cellular Applications.”
“An RF VCO Design for Wireless and Broadband Applications.”
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APPLICATION NOTE • APN1013
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