200325A.pdf

APPLICATION NOTE
APN1015: A Dual-Band Switchable IF VCO
for GSM/PCS Handsets
Introduction
Many of today’s handset cellular telephones are multifunctional,
multiband units. They are complex RF systems with frequency
plans requiring multiple RF sources. To accomplish this, the
number of VCOs can be increased, however this is expensive and
requires more PCB area. This approach strongly contradicts
current market trends. A straightforward solution proposed in this
application note is using switchable (multiband) VCOs.
Skyworks application note APN1007, Switchable Dual-Band
170/470 MHz VCO for Handset Cellular Applications, discusses a
switchable Colpitts VCO design switching between the 170 MHz
and 420 MHz range. Described here is a solution for higher
frequency range switching, 450/640 MHz, using a DC Cascode
Colpitts configuration for the VCO. This design is optimized for the
lowest phase noise meeting GSM/PCS handset requirements.
The Colpitts VCO Fundamentals
Fundamental Colpitts VCO operation is illustrated in Figures 1a
and 1b. Figure 1a shows the Colpitts VCO circuit as it is usually
implemented. In Figure 1b, the same circuit is shown as a
common emitter amplifier with parallel feedback. The transistor
junction and package capacitors CEB, CCB and CCE are separated
from the rest of the transistor parasitic components to demonstrate their direct effect on the VCO tank circuit.
In a real low noise VCO circuit, the capacitor, CVAR, may have a
more complicated structure including series and parallel
connected discrete capacitors used to set required oscillation
frequency and tuning sensitivity. The parallel connection of
resonator inductor, LRES, and varactor capacitive branch, CVAR ,
constitutes a parallel resonator (or simply resonator). A fundamental property of the parallel resonator in a Colpitts VCO
implementation is that it always shows inductive impedance at
the oscillation frequency. This means that its parallel resonant
frequency is always above the oscillation frequency.
Loss in the resonator increases as the frequency approaches
resonance in the feedback loop, acting as a stop-band filter at
resonance. Thus, the nearer the oscillation frequency to parallel
resonance, the more loss incurred in the feedback path. However,
since more reactive energy is stored in the resonator nearer to
the resonance frequency, higher loaded Q (QL) is achieved.
Obviously, low loss resonators, such as crystals or dielectric
resonators, allow oscillation buildup closer to parallel resonance
with much lower loss compared to microstrip or discrete
component-based resonators.
The proximity of the parallel resonant frequency to the oscillation
frequency is established by the value of capacitor, CSER. If the
capacitance of CSER were reduced, then the parallel resonator
would be more inductive to compensate for the increased capacitive reactance. This means that the oscillation frequency should
move closer to the parallel resonance and would result in higher
QL and higher feedback losses.
VCC
CCB
CCE
CSER
CVCC
CCB
CDIV1
LRES
CVAR
POUT
CEB
CSER
LRES
CVCC
CDIV2
RL
CEB
CVAR
CDIV1
CDIV2
RL
CCE
Figure 1a. Basic Colpitts VCO Configuration
Figure 1b. Common Emitter View of the Colpitts VCO
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APPLICATION NOTE • APN1015
is that the control component (PIN diode) is not placed in the
resonator current path. That way it exercises control over a small
reactance portion of the overall tank circuit. This has significant
impact on VCO performance, especially if more than 10% of the
switching gap (the difference between designated frequency
bands) is required.
The Leeson equation, establishing connection between tank
circuit QL and its losses, states:
ξ ( ƒm)
=
FkT
2P
1+
ƒ2
4 Q L2 ƒm2
Where F is the large signal noise figure of the amplifier shown in
Figure 1b, P is the loop or feedback power (the one which
measured at the input of the transistor), and QL is loaded Q.
These three parameters have significant consequences for phase
noise in a low noise RF VCO. In designing a low noise VCO, we
need to define the conditions for minimum F and maximum P and
QL. The above discussion shows that the loop power and QL are
contradictory parameters. That is, an increase of QL leads to
more losses in the feedback path resulting in lower loop power.
The optimum conditions for noise also contradict maximum loop
power, and largely depend on transistor choice. Usually the best
noise is achieved with high gain transistors with maximum gain
coinciding with minimum noise at the large signal condition.
Because no such specifications are currently available for
industry-standard transistors, we can base our transistor choice
only on experience.
A Switchable Resonator VCO Circuit
Switchable resonator VCO designs are shown in Figures 2a and
2b. In the switchable resonator concept, two or more separate
resonators, tuned and optimized according frequency bands, are
activated (switched) by low resistance PIN-diodes (D3 and D4).
The advantage of switching the entire resonator rather than
switching an element within the resonator (capacitor or inductor)
To understand the impact of switching on the resonator losses,
consider the following example. Assume switching between 0.47
and 0.62 GHz bands using these two concepts. In the intraresonator-switching scheme in Figure 3a, the capacitance
changes from 10 pF to 5.8 pF. In this case, 4.2 pF was added to
jump to the lower frequency band. Alternately, in the interresonator switching scheme, 2 pF was added to the switching
path. Simple analysis shows that the current flowing through the
switching component in the intraresonator scheme may be more
than double. This results in more than 6 dB additional loss in the
lower band compared to the interresonator concept, which may
be enough to prevent any oscillation. Even if oscillation could be
sustained due to the excess of gain in the oscillator’s active
portion, there is still the problem of balancing loaded Q and the
feedback loop power to optimize the phase noise performance.
Other problems with the intraresonator switching scheme include
the lack of flexibility in providing optimum tuning in both
frequency bands and extra noise modulation. The PIN diode
control current comes from the same source that feeds the rest
of the handset circuitry. This current may be carrying lowfrequency noise that may not be filterable. Even though these
noise fluctuations of DC current are small and relatively fast, the
PIN diode is still a semiconductor device with inevitable nonlinear
and/or parametric consequences that may result in excess
modulation noise.
VSW1: Band 1
VCTL: 0.5–2.5 V
VSW1: Band 1
VCC: 3 V
C5
C1
C9
R1
R6
VCC: 3 V
C1
L3
C5
C11
C9
R1
R6
L1
L1
D1
D2
L2
V1
D3
D4
R2
R3
C2
C3
C12
D1
C6
C4
R4
C10
C8
D4
C14
POUT
L4
R5
V1
C6
D2
C7
D3
L2
C2
R3
R4
C7
C10
R2
POUT
C8
C13
R5
C4
VCTL: 0.5–2.5 V
C3
VSW2: Band 2
Figure 2a. Switchable Resonator VCO with Simplified Resonator
Design
VSW2: Band 2
Figure 2b. Switchable Resonator VCO with
High-Performance Resonator Design
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APPLICATION NOTE • APN1015
RS
2
CPAR
3.8 p
LRES
12 nH
Relative Tuning Sensitivity Variation (%)
CSER
2p
ISW1
C
4.2 p
a) Intraresonator Switching
CSER
2p
CSER
2p
RS
2
LRES
12 nH
CPAR
50
45
40
35
6 pF
30
4.5 pF
25
LRES
20
LRES
12 nH
CPAR
3.8 p
CSER2
CPAR
15
3 pF
10
SMV1763
2 pF
5
3
RS
2
CPAR
8p
55
4
5
6
7
8
9
10
Series Capacitance (CSER2) (pF)
Figure 4. Relative Tuning Sensitivity (Kf) Variation in
the Range of 0.5–2.5V for SMV1763-079 as a
Function of CSER2 and CPAR
ISW2 <0.5ISW1
b) Interresonator Switching
Figure 3. VCO Band Switching Concepts
The two circuits shown in Figure 2 differ only in resonator design.
Figure 2a shows a simplified resonator design, minimizing the
component count, thus minimizing cost and space. Resonator
inductors L1 and L2 are also used as varactor biasing chokes.
However, this circuit has some drawbacks. One is a lack of
design flexibility caused by discrete choices of available varactors
(D1 and D2) and inductors (L1 and L2) values. Capacitors may be
added in parallel to the varactors to improve design flexibility, but
this may degrade the tuning sensitivity. Tuning linearity may also
suffer in such a circuit because there is no capacitor in series
with the varactor.
Alternately, the resonator in Figure 2b has more components,
which allows more design flexibility and better tuning linearity,
but the component count is higher. The effect of capacitor, CSER2,
in series with the varactor is demonstrated in Figure 4. The
relative tuning sensitivity is defined as:
K
ƒ
=
1 ∂ƒ
;
ƒ ∂V V
C S2
K ƒ = C JO
K DV =
K DV
C 2VAR (C S + C PAR ) + C VAR C S ( 2 C PAR + C S ) + C
2V J
V
1 + VAR
M?
VJ
K ƒVAR =
K ƒ 0.5 V K
K
M +1
ƒ 2.5 V
ƒ 1.5 V
%
2
S C PAR
;
Where VVAR is varactor DC bias in the middle of the tuning
range,CSER2 and CPAR are capacitors in series with the varactor
(C11 and C13 in Figure 2b) and resonator parallel capacitors
(C12 and C14 in Figure 2b), and CJO, VJ, M are parameters
describing varactor capacitance [1]: See SMV1763-079 SPICE
model section.
According to this equation, relative tuning sensitivity variation is
defined as the percent variation of tuning sensitivity per volt in
the tuning range from 0.5–2.5 V — typical for most battery
handset applications. The graph shows that higher values of
CSER2 cause larger tuning sensitivity variations. Consequently,
high variation of tuning sensitivity would occur across the tuning
range without CSER2 in Figure 2a.
VCO Model Description
In the circuit in Figure 5 transistors, X3 and X9 are connected in
DC Cascode sharing the base biasing network consisting of R1
(RDIV2), R4 (RDIV1), and R7 (RDIV3). The bias resistor values were
selected to evenly distribute DC voltages between X3 and X9.
Resistor R5 (RL) was chosen as low as 100 Ω to minimize the
DC voltage drop for the specified 8 mA DC current. At RF
frequencies, X9 works as a common emitter amplifier with the
emitter grounded through capacitor SRLC1. The oscillator stage
output is fed to the buffer transistor through coupling capacitor
C17 (CCPL).
The output circuit of the buffer stage consists of discrete
inductor, L4, modeled with parallel capacitor, C5 (0.38 pF), and
output capacitor C1 (COUT). For flatter power response over the
specified 450/640 MHz range, capacitor SLC2 (for values less
than 2 pF), in parallel with inductor L4 (in Figure 5), may be used
for fine trimming.
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APPLICATION NOTE • APN1015
The dual-band switchable resonator circuit in Figure 6 consists of
two identical parts (low band on the left, and high band on the
right). The PIN diodes were modeled as parallel RC networks
PRC1 and PRC2, with switching resistors, RSW_L and RSW_H, in
the low band and high band branches respectively.
Figure 5. Open Loop Analysis VCO Schematic Bench
Figure 6. Dual-Band Resonator Schematic Bench
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APPLICATION NOTE • APN1015
The appropriate biasing resistors, R1, R2, and R3, are shown as
shunt elements to ground. The truth table showing the values
of RSW_L and RSW_H for the appropriate low/high switching is
shown below:
RSW_L
RSW_H
State
3 Ω
3000 Ω
Low band
3000 Ω
3 Ω
High band
Resonator inductors, L1 and L4, are modeled as inductance
losses with parallel capacitors, C4 and C5 respectfully. The
resonator’s parallel capacitors are presented as series equivalent
models, SRLC1 and SRLC2, each with 1.5 nH inductance and 0.2
Ω series resistance. Other discrete capacitors are modeled with
similar series SRLC networks. The different inductor values were
selected based on the individual RF path layout.
Varactor SMV1763-079, used in this design, is described by the
PN-junction diode SPICE model described in the next section.
The variable values used in the circuit are given in the Variable
Equation module of the Default Bench shown in Figure 7. The
Test Bench is shown in Figure 8. For open loop analysis we use
the OSCTEST component supplied in the Libra IV library. This
component allows us to observe the open loop VCO feedback
gain as a function of frequency and power (in the loop)
preserving feedback loading integrity. This is the way the VCO
would see it when the feedback loop is closed. (Refer to Libra IV
manual for further details of OSCTEST operation).
Figure 7. VCO Default Bench
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APPLICATION NOTE • APN1015
Figure 8. VCO Test Bench
SMV1763-079 SPICE Model
SMV1763-079 is a low series resistance, hyperabrupt varactor
diode. It has the industry’s smallest plastic package SC-79 with a
plastic body size of 47 x 31 x 24 mils (the total length with leads
is 62 mils).
The SPICE model for the SMV1763-079 varactor diode, defined
for the Libra IV environment, is shown in Figure 9 with a
description of the parameters employed.
Figure 9. SMV1763-079 SPICE Model for Libra IV
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APPLICATION NOTE • APN1015
Table 1 describes the model parameters. It shows the appropriate
default values for silicon varactor diodes that may be used by the
Libra IV simulator.
This equation is a mathematical expression of the capacitor characteristic. The model is most accurate for abrupt junction
varactors (like the SMV1408). However, for hyperabrupt junction
varactors the model is less accurate because the coefficients are
dependent on the applied voltage. To make the above equation
work better for hyperabrupt junction varactors, the coefficients
were optimized for the best capacitance vs. voltage fit. These
simulated coefficients may not have physical meaning.
According to the SPICE model the varactor capacitance, CV, is a
function of the applied reverse DC voltage, VR, and may be
expressed as follows:
C JO
CV =
V
1+ R
VJ
M
+CP
Note that in the Libra model, CP, is given in picoFarads, while
CGO is given in Farads to comply with the default unit system
used in Libra.
Parameter
Unit
Default
IS
Saturation current (with N, determine the DC characteristics of the diode)
Description
A
1e-14
RS
Series resistance
Ω
0
N
Emission coefficient (with IS, determines the DC characteristics of the diode)
-
1
TT
Transit time
S
0
CJO
Zero-bias junction capacitance (with VJ and M define nonlinear
junction capacitance of the diode)
F
0
VJ
Junction potential (with VJ and M define nonlinear junction capacitance of the diode)
V
1
M
Grading coefficient (with VJ and M define nonlinear junction capacitance of the diode)
-
0.5
EG
Energy gap (with XTI, helps define the dependence of IS on temperature)
EV
1.11
XTI
Saturation current temperature exponent (with EG, helps define
the dependence of IS on temperature)
-
3
KF
Flicker noise coefficient
-
0
AF
Flicker noise exponent
-
1
FC
Forward-bias depletion capacitance coefficient
-
0.5
BV
Reverse breakdown voltage
V
Infinity
IBV
Current at reverse breakdown voltage
A
1e-3
ISR
Recombination current parameter
A
0
NR
Emission coefficient for ISR
-
2
IKF
High injection knee current
A
Infinity
NBV
Reverse breakdown ideality factor
-
1
0
IBVL
Low-level reverse breakdown knee current
A
NBVL
Low-level reverse breakdown ideality factor
-
1
TNOM
Nominal ambient temperature at which these model parameters were derived
°C
27
FFE
Flicker noise frequency exponent
-
1
Table 1. Silicon Diode Default Values in Libra IV
Part Number
CJO (pF)
M
VJ (V)
CP (pF)
Ω)
RS (Ω
LS (nH)
SMV1763-079
8.87
2.7
4.3
0.1
0.5
0.9
Table 2. SPICE Parameters for SMV1763-079
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APPLICATION NOTE • APN1015
VCO Design, Materials and Layout
The VCO schematic diagram is shown in Figure 10. The circuit is
powered from a 3 V voltage source. The ICC current was set at
approximately 8 mA. The RF output signal is coupled from the
VCO through capacitor C18 (5 pF). Band selection is accomplished
D1, D2
SMV1763-079
by forward biasing either of the PIN diodes D3 or D4. Bias current
is set by resistors R2, R3 and R4. In the “ON” state, the PIN diodes
(SMP1320-079) have about 2 Ω RF resistance with 1 mA control
current.
D3, D4
SMV1320-079
VCTL: 0.5–2.5 V
L1
100 nH
R1
50
VCC: 3 V
8 mA
VSW_460 MHz
C1
100 pF
C3
3p
C2
8p
C4
2p
D1
R2
1.0 k
C12
100 pF
C9
100 pF
R6
3.9 k
L3
15 nH
D2
L4
10 nH
L2
100 nH
C6
6p
C8
3p
POUT: 0 dBm
C17
2p
D4
C5
1.5 p
L5
15 nH
V2
NE68019
V1
NE68119
C11
100 pF
D3
C16
100 p
R7
270
R3
1.0 k
R4
1.5 k
R5
6.8 k
C13
10 p
C14
6p
C10
100 pF
C18
5p
C15
1p
R8
100
C7
100 pF
VSW _600 MHz
Figure 10. The Switchable VCO Circuit Diagram
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APPLICATION NOTE • APN1015
The PCB layout is shown in Figure 11. The board was made of
standard, 30 mil thick, FR4 material.
Figure 11. PCB Layout
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APPLICATION NOTE • APN1015
The bill of materials used is given in the Table 3.
Designator
Value
Part Number
Footprint
C1
100 p
0402AU101KAT
0402
AVX
Manufacturer
C2
8p
0402AU8R0KAT
0402
AVX
C3
3p
0402AU3R0KAT
0402
AVX
C4
2p
0402AU2R0KAT
0402
AVX
C5
1.5 p
0402AU1R5KAT
0402
AVX
C6
6p
0402AU6R0KAT
0402
AVX
C7
100 p
0402AU101KAT
0402
AVX
C8
3p
0402AU3R0KAT
0402
AVX
C9
100 p
0402AU101KAT
0402
AVX
C10
100 p
0402AU101KAT
0402
AVX
C11
100 p
0402AU101KAT
0402
AVX
C12
100 p
0402AU101KAT
0402
AVX
C13
10 p
0402AU100KAT
0402
AVX
C14
6p
0402AU6R0KAT
0402
AVX
C15
1p
0402AU1R0KAT
0402
AVX
C16
100 p
0402AU101KAT
0402
AVX
C17
2p
0402AU2R0KAT
0402
AVX
C18
5p
0402AU5R0KAT
0402
AVX
D1
SMV1763-079
SMV1763-079
SC-79
Skyworks Solutions
D2
SMV1763-079
SMV1763-079
SC-79
Skyworks Solutions
D3
SMP1320-079
SMP1320-079
SC-79
Skyworks Solutions
D4
SMP1320-079
SMP1320-079
SC-79
Skyworks Solutions
L1
100 nH
LL1608-FHR10
0603
TOKO
L2
100 nH
LL1608-FHR10
0603
TOKO
L3
15 nH
0402CS-15NXJB
0402
COILCRAFT
L4
10 nH
0402CS-10NXJB
0402
COILCRAFT
L5
15 nH
LL1005-F15NS
0402
TOKO
R1
50
CR10-500J-T
0402
AVX/KYOCERA
R2
1k
CR10-102J-T
0402
AVX/KYOCERA
R3
1k
CR10-102J-T
0402
AVX/KYOCERA
R4
1.5 k
CR10-152J-T
0402
AVX/KYOCERA
R5
6.8 k
CR10-682J-T
0402
AVX/KYOCERA
R6
3.9 k
CR10-392J-T
0402
AVX/KYOCERA
R7
270
CR10-271J-T
0402
AVX/KYOCERA
R8
100
CR10-101J-T
0402
V1
NE68119
NE68119
SOT-416
NEC/CEL
V2
NE68019
NE68019
SOT-416
NEC/CEL
AVX/KYOCERA
Table 3. The VCO’s Bill of Materials
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APPLICATION NOTE • APN1015
3.0
The measured performance of this circuit and the simulated
results obtained with the model above are shown in Figures 12
and 13. The simulated results agree with the measurements
confirming the validity of the VCO model. A difference of about
1 dB in simulation of the output power at low band may be
attributed to the effects of higher harmonics. A more precise
VCO simulation would require more accurate modeling of
miscellaneous parasitic components such as pad capacitances
to the ground, transmission lines and discontinuities. Note that
in the simulations, the low band resonator inductor (L3 = 15 nH
in Figure 10) was replaced with a 16.5 nH measured for that
type of inductor in our lab. Another reason for the divergence of
simulated power response from the measurements may be
in the precision of the transistor models used. These models
are usually derived for small-signal or relatively weak-signal
amplifier applications, and may not reflect the highly nonlinear
operation of a VCO.
510
2.5
500
2.0
490
1.5
480
1.0
470
0.5
460
0
450
-0.5
440
-1.0
430
-1.5
-2.0
420
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Varactor Voltage (V)
F (meas)
F (simu)
P (meas)
POUT (simu)
Frequency Deviation (MHz)
Figure 12. Low Band VCO Tuning Performance
660
0
650
-0.2
640
-0.4
630
-0.6
620
-0.8
610
-1.0
600
-1.2
590
-1.4
580
-1.6
570
-1.8
560
Output Power (dBm)
Both measured and simulated VCO output power variations in the
tuning ranges are less than 1 dB. The measured frequency tuning
sensitivity in Figures 12 and 13 are relatively linear at 27 MHz/V
(low band) and 28 MHz/V (high band) in the 0.5–2.5 V range for
battery applications. The simulated frequency tuning response is
very similar to the measured one, although a slightly higher
tuning voltage was observed in simulations for high band over
the 2 V varactor bias voltage.
Frequency Deviation (MHz)
520
Output Power (dBm)
Measurement and Simulation Results
-2.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Varactor Voltage (V)
F (meas)
F (simu)
P (meas)
POUT (simu)
Figure 13. High Band VCO Tuning Performance
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APPLICATION NOTE • APN1015
Phase noise measurements vs. frequency offset for both low
band and high band are shown in Figure 14. It shows
-100 dBc/Hz in high band and -105 dBc/Hz in low-band at
10 kHz offset and -120 dBc/Hz and -126 dBc/Hz at 100 kHz
offset. The 20 dB/Decade slope is fairly constant to 5 MHz. The
measurements were done using a Comstron-Aeroflex PN9000
Phase Noise Test Set in the range of less than 7 MHz offset
because of the 100 ns delay-line setup used.
Figure 14. Measured VCO Phase Noise for Low and High Bands at VCC = 3 V, VVAR = 1.5 V
List of Available Documents
VCO Related Application Notes
The GSM/PCS Switchable IF VCO Simulation Project
Files for Libra IV.
APN1004: Varactor SPICE Models for RF VCO Applications
The GSM/PCS Switchable IF VCO Circuit Schematic and PCB
Layout for Protel EDA Client 1998 version.
The GSM/PCS Switchable IF VCO PCB Gerber Photo-plot files.
APN1006: A Colpitts VCO for Wide Band (0.95 GHz
2.15 GHz) Set-Top TV Tuner Applications.
APN1005: A Balanced Wide Band VCO for Set-Top TV
Tuner Applications.
APN1007: Switchable Dual-Band 170/420 MHz VCO For Handset
Cellular Applications.
An RF VCO Design for Wireless and Broadband
A Differential VCO for GSM Handset Applications
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