Accurate Scalable Capacitance/Current-Voltage Based Lookup-Table Diode Model Ce-Jun Wei1, Yu Zhu, Hong Yin, D. Whitefield, Frank Gao, and Dylan Bartle SKYWORKS SOLUTION INC., 20 SYLVAN ROAD, WOBURN, MA 01801, USA 1 [email protected] ABSTRACT — A capacitance and Current look-up table based large-signal Phemt-diode model is presented based on an ensemble of bias-dependent small-signal equivalent circuits. The model is capable of accurate simulation of bias-dependent smallsignal S-parameters and current performance over the dataacquisition bias range. Instead of charge model in conventional Root diode model, capacitance as function of voltage is used. Compared to charge model, capacitance gives more accuracy that fits to higher order of derivatives and avoids potential data instability. The model has also accurate leakage model and can be used for a variety of applications where accurate nonlinearity is of primary concern. The validity of the model is demonstrated by comparing the simulation of DC curves, leakages, and smallsignal S-parameters over a wide bias range, by comparison of the measured data. Keywords---- Lookup_table Model, deembedding I. INTRODUCTION For modern communications, diodes are used in a variety of designs, such as power detector, ESD protection circuits. For those designs, it is highly desirable to have good diode model that can accurately predict bias-dependent Sparameters and harmonics. Unfortunately, standard diode models fail to predict accurate CV dependence and therefore cannot give the right impedance and nonlinearity. This is because that the conventional diode models assume PNjunction like CV dependence. In most Phemt based or MESFET based diodes, the capacitance verse voltage sudden drops at pinchoff voltage showing more complex voltage dependence. It is impossible to fit such CV behaviour using PN-junction-like CV function and is also difficult to use any other close-form equations. Root has developed data-based diode model using measured IV-data and derived charge look-up table. [1,2][3,4] This model is believed to be the only accurate diode model so far. However, to do interpolation of charge look-up table by Spline, the maximum fit to the order of derivatives is the third in charge-voltage function. For prediction of the third order distortion such as third intermodulation, this accuracy is not sufficient. In this paper, instead of charge, capacitance verse voltage lookup table, namely the first derivative of charge, is used, the interpolation can give one order higher of accuracy. Besides, we found that using charge-lookup-table, sometimes it may suffer from data instability. In this paper we present an extended and improved look-up table based model. Instead of a charge-based model, we use capacitance based look-up tables.[5,6,and 7] Plus with the accurate leakage look-up tables, the model is capable of wide applications. Systematic extraction to extract two RF-IVs and CV functions is described. Following is the validation of the model in terms of fitting of IV, S-parameters in wide range, for typical sizes of devices. Scaling rule is also developed over a variety of diode sizes. II. EQUIVALENT CIRCUIT OF THE MODEL The device is based on pHemt technology and has several gate fingers as anode and drain/source as cathode. The equivalent circuit of the model is shown in figure 1 with an example of the diode layout. Real measurement structure contains two launches and their effects on S-parameters are to be taken into account in extraction. The model contains, as usual, access resistances Rs, that composed by two parts, source/drain resistances, Rsource||Rdrain and gate metal resistance Rg and access inductances, Ls and possible some parasitic capacitances that can be included into extrinsic circuit, not shown here. In the figure, there are one diode currents between gate and drain/source, Id is the dc current, and one capacitance as function of voltage, the current flowing through the capacitance is Cd*dv/dt. mesa NonlinC Cd R Rs Port Anode L Ls Port Cathod I_DC Id Figure 1. Equivalent circuit of the diode model The charge model and capacitance model is equivalent since the capacitance is one-dimensional function only and the charge can be integrated as: Qd Vg Vp Cd (Vd ) dVd where Cd is measured bias dependent diode capacitance and the integration with respect to time over one period does not generate any DC component. It is convenient to express capacitive current through Cd(Vd) as Cd dVd dt that can be implemented using SDD in ADS. The model is implemented with a three port SSD in ADS, as shown in figure 3. The model contains capacitive current that can be related to an implicit relation at port 4. The model also contains a thermal circuit at port 3 that will generate the temperature rise and self-heating effects can be included. Anode P2 dT dvdt SDD4P SDD4P1 I[1,0]=Id+1e9*Cd*dvd_dt I[2,0]=-Id-1e9*Cd*dvd_dt I[3,0]=-Id*(_v1-_v2) I[3,1]=Cth*_v3 F[4,1]=(_v1-_v2)/1e9 F[4,0]=-dvd_dt Figure 2. Using SDD to build look-up table model. III. MODEL EXTRACTION In order to find out the scaling rule, the model extraction uses a series of diodes with various dimension as shown in Table 1. The ugw denotes the unit gate length, Ng is gate number and Wt is the total gate periphery in um. Diode_name D9 D10 D14 D18 D25 D26 D29 Ng 4 8 12 6 6 12 8 ugw(um) Wt(um) 25 100 12.5 100 16.67 200 50 300 100 600 50 600 100 800 Table 1. List of diodes under model extraction for scaling rules The diodes are based on Phemt6a2 technology with Skyworks. Each diode has embedded into a measurement structure, GSG probable structure, or launchers. Figure 3 shows a typical m=probable structure for 4x75um diode. It is important to de-embed the diode model from the structure. EM simulation was done for individual structures of various diodes to obtain the S-parameters of launches. In this way we can easily to dembed the diode S-parameters from measured S-parameters by negating the two two-port launch sparameters as shown in figure 4. Figure 3. GSP probable structure for diode 8x12.5um device. S2PMDIF S2P1 File="W213S_0403u_T25_D14_cold.mdf" iVar1="Vg" iVal1=Vg Ref 1 2 2 1 Ref DC_Block DC_Block1 Term Term1 Num=1 Z=50 Ohm De_Embed2 SNP1 File="D14_12_Spa.s2p" PortMappingType=Standard De_Embed2 DC_Block SNP2 DC_Block2 File="D14_34_Spa.s2p" PortMappingType=Standard Term Term2 Num=2 Z=50 Ohm Figure4. Deembedding diode S-parameters by simulation. By deembedding the diode S-parameters, the parasitic series diode resistance and inductance can be readily obtained at higher diode conductance, to say Vd=1.15, where the junction impedance can be assumed to be insignificant and only Rs and Ls can be calculated from real part and imaginary part of the admittance. 4x75um E-mode pHEMT from Winn-semi. ICCAP is used for measurements. The diode IV curve is measured at DC including leakages at reverse biases. Junction capacitance as function of diode voltages is done over wide range of Vd=-10V to 0.8V. The Capacitance over Vd=0.8V was extrapolated to higher voltages since the deembedding of capacitance becomes difficult due to high shunting junction conductance. After deembedding the diode parameters and measured IV/CV for variety of diode dimensions, we come out with the scaling rule as followings: - For IV and CV, it is scalable as long as the scaling factor is Ng*(ugw+Lmargin), where the Lmargin is the distance from unit-gate end to the mesa fringe, which is 2um. - Rd=Rs*wt/1000+Rg*(ugw/250)^0.2*(2/Ng)^0.51 where Rs=0.3339 is the source||drain resistance for - 1mm periphery and Rg=2.4232 is the gate metal resistance for 2x250um diode. Ld=L1*(ugw/25)^0.43865*(Ng/4)^0.02724 where L1=0.07156nH is the inductance for 4x25um diode. With the parasitic parameters known and keeping in mind that the parasitic are bias independent, reading the IV and CV look-up tables as function of instantaneous diode voltage are incorporated into the model script . For RF application, diode capacitance fitting is important. Figure 6 shows the capacitance fitting as function of diode voltage. It is shown that the fitting is perfect until near diode conductance, Vd=0.8V. The CV fitting beyond conductance is not an issue since conductance is dominating the impedance. It is noted that the C(V) sudden changes the values when Vd across the pinchoff around -1V. It is normally more difficult to use equation to fit these characteristics. IV. MODEL VALIDATION 6E-13 0.020 4E-13 3E-13 2E-13 1E-13 2E-2 1E-3 0.015 0.010 0.005 -10 1E-9 1E-11 0.4 0.6 0.8 -8 -7 -6 -5 -4 -3 -2 -1 0 1 Vg 0.000 0.2 -9 1E-7 -0.005 0.0 0 1E-5 Id_meas Id.i, A Id_meas Id.i, A 5E-13 Cdm_500V..Cg Cd It is expected that the model should generate DC-Id curves as measured. Figure 4 shows indeed the fitting is perfect, where the lines are modeled and the symbols are measured. The right figure is in linear scale showing excellent fitting for forward Vd changes from 0V to 0.9V and the right figure is in log-scale showing perfect fitting at very small current range. 1.0 0.0 0.2 0.4 Vd 0.6 0.8 1.0 Vd Figure 5. Modeled (lines) and measured (symbols) Id curves (left:linear, Right:log scale)for a 4x75um phemt diode. The leakage model is verified by comparing modeled and measured Id at and reverse bias direction up-to -13V where the current shows trend of breakdown as shown in figure 6. Again it shows perfect fitting, however, one must be cautious since there is large variation in leakages from diode to diode and wafer to wafer due to uncontrolled factors in processing. Figure 7. Modeled (lines) and measured (symbols) capacitance as function of voltage for Vd=-10V to 0.95 V. To further validate the model, it is interesting to see the biasdependent S-parameter fitting over frequency. Figure 8 shows the S11, and S12 fitting for a 4x75 diode together with the launcher structure in series with the termination. The black dotted lines are measured and red lines are modeled. The biases are: -10,-7,-5,-3,-1, 0.1 to 0.7 with step 0.1, 0.8 and 1.15 V. It is shown excellent agreement for all those range. S(3,3) S(1,1) S(3,4) S(1,2) 0.000005 0.000000 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 Id_meas Id.i, A -0.000005 -0.000010 freq (200.0MHz to 10.00GHz) freq (200.0MHz to 10.00GHz) -0.000015 -0.000020 -0.000025 -0.000030 -14 -12 -10 -8 -6 -4 -2 0 Figure 8. Modeled (lines) and measured (symbols) S-parameters, S11 (left) and S12 (right) at f=0.2 to 10 GHz, biases from -10V to 1.15V. Black-dotted: measured, red lines: modeled Vd Figure 5. Modeled (lines) and measured (symbols) Id leakages at reverse bias direction. IV. SCALING RULE CHECK The scaling rules were checked over a variety of diodes of different dimensions. To save the pages, we only present three devices, 4x25um, 8x16.7um and 8x50um, or D9, D14 and D26 respectively. Figure 9 shows the IV curve fitting of three diodes, the upper curves are for D9 and middle curves are for D14 and the bottom one are for D26. The left side figures are in linear region showing the Rs fitting at high current, and right figures are in log-scale showing the low current region. The model is a scalable model using look-up table for 4x25um diode. Figure 8. Modeled (lines) and measured (symbol) C(V) characteristics from -10V to 0.95V using 6x25um diode model for two different diodes. Upper :6x50um, lower:12x50um. The model shows excellent fitting both in IV curves and CV characteristics, indicating the effectiveness of scaling rule of the model. It also has been shown that the model has good convergence for a device 4x25um and tested input power up to 20mW. VII. CONCLUSION A new lookup-table based and saleable diode model is developed. The model is based on capacitance characteristics, and diode current as a function of diode voltages. Parasitic diode resistance and inductance were extracted from deep forward S-parameters and taking into account the test launcher structure. The model perfectly is compatible with bias-dependent small-signal models. Leakage lookup-table is also incorporated into the model. The model has been implemented as design kits at Skyworks Solutions, Inc. The new model shows exact DC fitting and excellent biasdependent S-parameter fitting at the wide bias range. Largesignal simulation also shows it is robust. The model extraction is fast and technology-independent. REFERENCES Figure 9. Modeled (lines) and measured (symbol) IV curves in linear (left) scale and log (right) scale for three diodes, 4x25um (upper), 12x16.7um (mid) and 12x50um (bottom). 1.2E-12 1.0E-12 8.0E-13 6.0E-13 4.0E-13 2.0E-13 0.0 -10 -8 -6 -4 -2 0 2 Vg Modeled and Measured Cd (F) Modeld and measured Cd (F) 1.4E-12 4E-12 3E-12 2E-12 1E-12 0 -10 -8 -6 -4 Vg -2 0 2 [1] D. E. Root, S, Fan, and J. Meyer, “Technology-independent Large-signal FET Model: A measurement-based Approach to Active Device Modeling,” 1991, Proc. 15th ARMMS Conference. [2] D. E. Root, M. Pirola, S. Fan, W. J. Anklam, and A. Cognata, "Measurement-based large-signal diode modeling system for circuit and device design," IEEE Trans. Microwave Theory Tech. , vol. 41, pp. 2211-2217, Dec. 1993. [3] M. C. Filicori and G. Vannini, “Mathematical Approach to Large-signal Modeling of Elecronic Devices,” 1991, Electronic Devices, Vol.27, pp.357-359 [4] I. Schmale, F. van Raay, and G. Kompa, “Dispersive Tablebased Large-signal FET Model Validated in Analysis of MMIC Frequency Doubler,” 1996, Proc. 26th EuMc, pp.260263 [5] C.-J. Wei, Y. A. Tkachenko, J. Gering and D. Bartle,” COMPLETELY CONSISTENT ‘NO-CHARGE’ PHEMT MODEL INCLUDING DC/RF DISPERSION,’ Digest, 2002 International Microwave Symposium, pp.2137-2141, Seattle, 2002 [6] C.-J. Wei, ” Large-signal Modeling of Microwave MESFET/PHEMTs: Challenges and Solutions,” 2001 IEEE Radio and wireless Conference, workshop, invited report, Boston, August 19-22, 2001 [7] C. -J. Wei, Y. A. Tkachenko and D. Bartle, “A Compact Largesignal Model of GaAs MESFET and It’s Parameter Extraction,” 1997, Micowave J. No.12 [8] C.-J. Wei, Yu Zhu, Hong Yin , Oleksiy Klimashov, Cindy Zhang, and Tzung-Yin Lee, “Capacitance and RFConductance/Transconductance Look-up Table Based pHEMT Model,” 2011 APMC, Melbourne, Australia, 12/4-12/8, 2011 .

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