Multimedia ICs SYNC separator IC with AFC BA7046 / BA7046F The BA7046 and BA7046F separate the synchronization signals from a video signal and output the horizontal and vertical synchronization signals (HD and VD), and the composite synchronization signal (Sync-out). The HD and VD pulse phase difference is guaranteed. •TVsApplications and VCRs •1)Features Built-in AFC circuit. 4) Low external parts count. 5) 8-pin DIP / SOP package. 6) Horizontal free-run frequency does not require adjustment. 2) HD and VD phase difference guaranteed. 3) Low power dissipation. (approx. 21mW) Absolute maximum ratings (Ta = 25°C) •BA7046 (DIP) Parameter Symbol Limits Unit VCC Max. 8.0 V Pd 500∗ mV Operating temperature Topr – 20 ~ + 75 °C Storage temperature Tstg – 55 ~ + 125 °C Power supply voltage Power dissipation ∗ Reduced by 5mW for each increase in Ta of 1°C over 25°C. BA7046F (SOP) Parameter Symbol Limits Unit VCC Max. 8.0 V Pd 350∗ mW Operating temperature Topr – 20 ~ + 75 °C Storage temperature Tstg – 55 ~ + 125 °C Power supply voltage Power dissipation ∗ When mounted on a 50mm × 50mm PCB board, reduced by 3.5mW for each increase in Ta of 1°C over 25°C. •Recommended operating conditions (Ta = 25°C) Parameter Symbol Min. Typ. Max. Unit Operating power supply voltage VCC 4.5 — 5.5 V 1 Multimedia ICs BA7046 / BA7046F •Block diagrams 1 PHASE COMP H. OSC 2 7 SYNC SEPA 3 4 8 V. SEPA 6 5 •Pin descriptions Pin No. Function 1 Horizontal oscillator resistor 2 HD output 3 SYNC output (open collector) 4 VD output 5 GND 6 Video input 7 Power supply 8 Phase comparator output •Input / output circuits VCC VCC 12k 200 200 1k 1pin 100µA 5k Fig. 3 Fig. 2 Fig. 1 3pin 2pin VCC VCC 3k 3k 3k VCC 10k 200 1k 100 4pin 6pin 10µA 3k 3k 3k Fig. 4 2 Fig. 5 Fig. 6 8pin Multimedia ICs BA7046 / BA7046F •Electrical characteristics (unless otherwise noted Ta = 25°C and V Parameter Symbol Min. Quiescent current CC Typ. Max. Unit IQ 2.0 4.1 6.2 mA = 5.0V) Conditions pin 3 open Vsyn-Min. — 0.08 0.15 VP-P Pulse voltage, LOW VP-L — 0.1 0.3 V pins 2, 4 Pulse voltage, HIGH VP-H 4.7 4.9 — V pins 2, 4 (Horizontal) free-running frequency fH-O 13.9 15.7 17.5 kHz Capture range ∆fCAP ± 2.1 ± 2.9 — kHz Lock-in phase difference THPH – 1.0 + 1.0 µs pin2 pin– 6 HD, VD phase difference THVD 30.0 µs pin4 pin– 2 HD pulse width THD 4.6 5.1 5.6 µs pin2 VD pulse width TVD 190 230 270 µs pin4 Minimum synchronization separation level 0 17.0 23.5 pin 6 terminated with 75Ω resistor No input signal, I1 = open 䊊 Not designed for radiation resistance. •Measurement circuit 0.022µ Video In 47µ 1µ + 2200p 75 + 39k VCC 1µ A + 8 7 6 5 1 2 3 4 470k 130k II V T V 10k VCC T V T 100p Fig. 7 operation •(1)Circuit Synchronization separation circuit Detects the charging current to a externally-connected capacitor, and performs synchronization separation. (2) Horizontal oscillation circuit When a video signal is input, it is synchronized with Hsync by the PLL. The horizontal free-running frequency is determined by external resistor R1. 2.05E6 [kHz] fH-O = R1 (3) Vertical synchronization separation circuit When a video signal is input, synchronization signal separation is done over the vertical synchronization pulse interval. 3 Multimedia ICs •V , H IN D BA7046 / BA7046F and VD timing charts Vertical synchronization pulse interval NTSC signal Odd field (IN) NTSC signal Even field (IN) VD (OUT) HD, VD phase difference HD Odd field (OUT) HD Even field (OUT) Fig. 8 (1) The rise and fall positions for VD are basically the same for both odd and even fields. (2) HD shifts by 1 / 2H during the odd and even field interval. (3) Only the odd field is given for the specification. 4 1 / 2H Multimedia ICs BA7046 / BA7046F •Application example ∗ R2 VCC = 5V R3 10k 470k R1 C2 VCC = 5V 130k 10k 1 HD 2 SYNC 3 VD 4 PHASE COMP H. OSC 2200p C4 100p 8 + + C3 C6 0.022µ 1µ 7 C1 SYNC SEPA 6 + 330 470k 5 V. SEPA Vsig R4 1µ 1000p R5 ∗ C5 47µ C7 VCC By configuring the circuit enclosed in the dotted line to that in the diagram on the right, you can decrease the lock-in time and increase the capture range. R2 470k R3 10k Fig.9 8 C3-1 0.47µ C3-2 0.47µ C2 2200p • When SYNC SEPA output only is used. HD and VD unused. VCC = 5V R1 VCC = 5V + 120k 10k 1 HD 2 SYNC 3 VD 4 H. OSC PHASE COMP C5 C6 47µ 0.022µ 8 7 C1 6 + R5 5 V. SEPA R4 1µ Vsig 330 470k 1000p SYNC SEPA C7 Fig. 10 (1) Connect pin 1 to GND via a 120kΩ (approx.) resistor. Leave pins 2, 4 and 8 open. (2) SYNC output polarity (pin 3) is positive. (3) The delay time for rising edge of the SYNC output (pin 3) with respect to the falling edge of Sync for the Vsig input signal (pin 6) is 850ns (reference value). (4) The delay time for falling edge of the SYNC output (pin 3) with respect to the rising edge of Sync for the Vsig input signal (pin 6) is 450ns (reference value). Attached components •Resistor R should have a tolerance of ± 2%, and a temperature coefficient of 100ppm or lower. 1 5 Multimedia ICs BA7046 / BA7046F •Electrical characteristic curves 6 16.4 6.0 5.5 CURRENT : ICC (mA) 5 CURRENT : ICC (mA) HORIZONTAL FREQUENCY : f (kHz) VCC = 5.0V 4 3 2 5.0 4.5 4.0 3.5 3.0 1 16.2 16.0 15.8 15.6 15.4 15.2 2.5 0 4.0 5.0 – 25 6.0 POWER SUPPLY VOLTAGE (V) Fig. 11 Quiescent current vs. power supply voltage 50 5.8 16.4 16.0 15.8 15.6 15.4 15.2 250 50 75 5.4 5.2 5.0 4.8 4.6 100 0 25 50 NTSC VCC = 5.0V 75 190 – 25 100 30 20 20 75 100 TEMPERATURE (°C) Fig. 17 HD, VD phase difference vs. temperature 25 50 100 VCC = 5.0V 15 – cap – lock 10 75 Fig. 16 VD pulse width vs. temperature + cap 10 50 0 TEMPERATURE (°C) (csp.lock) 40 25 200 + lock FREQUENCY : f (csp. lock) (kHz) 50 0 210 Fig. 15 HD pulse width vs. temperature 60 – 25 220 TEMPERATURE (°C) Fig. 14 Horizontal free-running frequency vs. temperature 70 230 180 – 25 TEMPERATURE (°C) NTSC VCC = 5.0V 240 (kHz) 25 5.5 Fig. 13 Horizontal free-running frequency vs. power supply voltage FREQUENCY : f 0 5.0 POWER SUPPLY VOLTAGE (V) 4.4 – 25 6 4.5 100 VD PULSE WIDTH : VD (µs) 5.6 16.2 0 75 NTSC VCC = 5.0V VCC = 5.0V HD PULSE WIDTH : HD (µs) HORIZONTAL FREQUENCY : f (kHz) 25 Fig. 12 Quiescent current vs. temperature 16.6 HD · VD PULSE TIMING (µs) 0 TEMPERATURE (°C) + lock 20 + cap 15 – cap – lock 10 4.5 5.0 5.5 POWER SUPPLY VOLTAGE (V) Fig. 18 Capture range / lock range vs. power supply voltage – 25 0 25 50 75 100 TEMPERATURE (°C) Fig. 19 Capture range charging / lock range vs. temperature Multimedia ICs BA7046 / BA7046F 700 300 POWER LOCK IN TIME (ms) SIGNAL - LOCK IN TIME (ms) VCC = 5.0V fLOCK = 15.734kHz 200 100 600 VCC = 5.0V fLOCK = 15.734kHz 500 400 300 200 100 0 0 13 14 15 16 17 18 19 20 13 14 15 16 17 18 19 20 FREQUENCY (kHz) FREQUENCY (kHz) Fig. 21 Time from power on to pull in Fig. 20 Time from no signal to pull in notes •• Operation Make the ground line as thick as possible. • Keep power supply noise to a minimum. •External dimensions (Units: mm) BA7046 BA7046F 5.0 ± 0.2 0.3 ± 0.1 2.54 5 1 4 1.27 0.15 ± 0.1 4.4 ± 0.2 6.2 ± 0.3 7.62 8 1.5 ± 0.1 4 0.11 1 6.5 ± 0.3 5 0.51Min. 3.2 ± 0.2 3.4 ± 0.3 9.3 ± 0.3 8 0.4 ± 0.1 0.3Min. 0.5 ± 0.1 0° ~ 15° DIP8 0.15 SOP8 7