(Data Sheet Rev. 2)

MX877
8-Channel, 60V Driver with
Push-Pull Output, 3 Wire Interface
INTEGRATED CIRCUITS DIVISION
Features
•
•
•
•
•
•
•
•
Description
Eight (8) Outputs Rated at 60V, ±80mA
Push-Pull Driver Configuration
6V to 60V Driver Supply Range
2.7V to 5.5V Logic Supply Range
3-Wire Serial Interface plus Chip Select
Captures Serial & Parallel Input Data
Outputs Can Be Paralleled
28-Lead QFN Package
The MX877 is an 8-channel, high voltage switch with
8-bit parallel or serial input control. The MX877
connects directly to a microprocessor through a
standard 3-wire serial interface. The push-pull output
configuration can drive up to 60 volts at 80mA.
Outputs can be paralleled for increased drive current
up to a device total of 400mA, sink or source.
The MX877 is designed to operate over a temperature
range of -40°C to +85°C, and is available in a 28-lead
QFN Package.
Applications
• White Goods
• ATE
• Industrial Equipment
Ordering Information
Part
Description
MX877R
QFN-28 (73/Tube)
MX877RTR
QFN-28 Tape & Reel (2500/Reel)
Functional Block Diagram
VCC
VPWR
CS*
SDO
I/O
Register
Parallel Inputs
Shift Direction
IN7
IN6
IN5
IN4
IN3
IN2
IN1
IN 0
Latch
Register
Driver
Parallel
In & Out
Level
Translator
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
OUT0
SCK
SDI
OE
GND
DS-MX877-R02
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1
MX877
INTEGRATED CIRCUITS DIVISION
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 Dynamic Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Serial Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7 Parallel Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
3
3
4
4
5
6
6
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3. Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Parallel In / Parallel Out Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Serial Cascade Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Control System Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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R02
MX877
INTEGRATED CIRCUITS DIVISION
1 Specifications
1.2 Pin Description
1.1 Package Pinout
The thermal pad is connected internally to GND.
14
13
12
11
10
9
8
7
6
5
4
3
2
1
15
16
17
18
19
20
21
22
23
24
25
26
27
28
BOT TOM V IEW
R02
Pin#
Name
1
OUT7
2
N/C
No Internal Connection
3
GND
Ground
4
VPWR
High Voltage Supply (6V to 60V)
5
N/C
No Internal Connection
6
VCC
Logic Supply (2.7V to 5.5V)
7
SDO
Serial Data Output
8
IN7
Parallel Input
9
IN6
Parallel Input
10
IN5
Parallel Input
11
IN4
Parallel Input
12
IN3
Parallel Input
13
IN2
Parallel Input
14
IN1
Parallel Input
15
IN0
Parallel Input
16
SCK
Serial Clock
17
VPWR
High Voltage Supply (6V to 60V)
18
SDI
Serial Data Input
19
CS*
Chip Select (Active Low)
20
OE
Output Enable
21
GND
Ground
22
OUT0
Parallel Output
23
OUT1
Parallel Output
24
OUT2
Parallel Output
25
OUT3
Parallel Output
26
OUT4
Parallel Output
27
OUT5
Parallel Output
28
OUT6
Parallel Output
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Description
Parallel Output
3
MX877
INTEGRATED CIRCUITS DIVISION
1.3 Absolute Maximum Ratings
Parameter
Symbol
Min
Max
VPWR Supply Voltage
VPWR
-
60
V
Logic Supply Voltage
VCC
-
6
V
Input Pin Voltage
VIN
-
6
V
IOUTn
-
±100
mA
TJ
-
150
°C
Continuous Output Current
OUT0 - OUT7
Operating Junction Temperature
Thermal Resistance
(Junction to Ambient)
Operating Temperature
Storage Temperature
RJA
Units
110 Typical
Absolute maximum electrical ratings are at 25°C
Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to
the device. Functional operation of the device at these or
any other conditions beyond those indicated in the
operational sections of this data sheet is not implied.
Exposure of the device to the absolute maximum ratings for
an extended period may degrade the device and affect its
reliability.
°C/W
TA
-40
85
°C
TSTG
-55
150
°C
Voltages with respect to GND=0V.
ESD Warning: ESD (electrostatic discharge) sensitive device. Although the MX877 features proprietary ESD protection
circuitry, permanent damage may be sustained if subjected to high energy electrostatic discharges. Proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
1.4 DC Electrical Characteristics
VCC=5V, VPWR=42V, TA=25°C, unless otherwise specified.
Parameter
Conditions
Symbol
Minimum
Typical
Maximum
Units
Logic Supply Voltage
-
VCC
2.7
-
5.5
V
Logic Supply Current
fSCK=5MHz
ICC
-
50
-
A
fSCK=0
ICC
-
-
1
A
VPWR Voltage
-
VPWR
6
-
60
V
VPWR Current
Total of all Outputs
IPWR
GND Current
Quiescent VPWR Current
Total of all Outputs
VPWR=42V, No Load
-
-
-
400
400
mA
mA
IPWR
-
mA
IN0-IN7, SCK, SDI, OE, CS*
VIH
VCC-0.5
0.75
High Level Input Voltage
-
-
V
Low Level Input Voltage
-
VIL
-
-
0.5
1
1
V
A
A
Any One Output, Sink or Source
IOUTn
-
-
±80
mA
VPWR=42V
ROUTn
-
9
-

OE=Logic Low
IOUTn
-
-
1
A
Quiescent Logic Supply Current
Input Leakage Current
SDO Tri-State Leakage Current
OUT0-OUT7 Current
OUT0-OUT7 ON Resistance
OUT0-7 Tri-State Leakage Current
Notes:
CS*=Logic High
To avoid unwanted output during VPWR application and system initialization, keep OE at a logic low until
CS* has completed one cycle.
Thermal Resistance is measured in still air with the device soldered to a 6 square inch board without a
ground plane. Applications may require derating of the specified maximum currents to avoid exceeding the
maximum operation junction temperature.
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MX877
INTEGRATED CIRCUITS DIVISION
1.5 Dynamic Electrical Characteristics
VCC=5V, VPWR=42V, TA=25°C, unless otherwise specified.
Parameter
Conditions
Symbol
Minimum
Typical
Maximum
Units
SCK Period
-
-
100
-
DC
ns
SCK High Time
-
-
40
-
-
ns
SCK Low Time
-
-
40
-
-
ns
-
tCSwh
50
-
-
ns
Setup Time
tCSs
150
-
-
ns
SCK Low (Parallel Input Mode)
tCSwl
150
-
-
ns
INx to CS Falling (SETUP TIME)
-
tINs
15
-
-
ns
INx to CS Falling (HOLD TIME)
-
tINh
30
-
-
ns
SDI to SCK Rising (SETUP TIME)
-
tSDIs
20
-
-
ns
SDI to SCK Rising (HOLD TIME)
-
tSDIh
25
-
-
ns
SCK Falling to to SDO Data Valid
-
tSDO
-
10
-
ns
CS* Rising to SDO High Z
-
tSDOz
-
12
-
ns
CS* Rising to OUTx Rising
To 50%, C(OUTx)=1000pF
tOUTr
-
750
-
ns
CS* Rising to OUTx Falling
To 50%, C(OUTx)=1000pF
tOUTf
-
570
-
ns
OUTx Rise Time
From 10% to 90%, C(OUTx)=1000pF
-
-
110
-
ns
OUTx Fall Time
CS* High Time
CS* Falling to SCK Rising
CS* Low Time
From 10% to 90%, C(OUTx)=1000pF
-
-
75
-
ns
OE Rising to OUTx Rising
To 90%
-
-
580
-
ns
OE Rising to OUTx Falling
To 90%
-
-
390
-
ns
OE Falling to OUTx High Z
To 10%, OUTx High
-
-
130
-
ns
To 10%, OUTx Low
-
-
90
-
ns
R02
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MX877
INTEGRATED CIRCUITS DIVISION
1.6 Serial Timing
INx
tINh
tINs
CS*
tCSs
tCSwh
SCK
tSDIh
tSDIs
SDI
tSDOz
tSDO
SDO
tOUTr
tOUTf
OUTx
1.7 Parallel Timing
INx
tINs
tINh
CS*
tCSwl
tOUTr
OUTx
6
tOUTf
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MX877
INTEGRATED CIRCUITS DIVISION
2 Functional Description
Figure 1. Serial Data Transfer Example
The MX877 is an 8 channel high voltage driver with
8-bit input control. The MX877 interfaces to a
microprocessor through a standard 3 wire serial
interface and an active-low chip select, or can be used
in a parallel-in, parallel-out configuration.
Parallel data is transferred to the I/O register of the
MX877 through the parallel input pins, IN0 through IN7
on the falling edge of the chip select pin, CS*. When
CS* is in a logic low state, serial data can be
transferred to the I/O register through the serial input
pin, SDI, and from the I/O register through the serial
output pin, SDO. Parallel or serial input data is
transferred from the I/O register to the latch and high
voltage output drivers, OUT0 through OUT7, on the
positive edge of CS*. This data remains latched until
the next positive edge of CS*.
The 8-bit I/O shift register is clocked by the serial clock
pin, SCK. Serial data presented at the SDI pin is
transferred to the shift register on the positive edge of
SCK. Data shifts out of the register through the SDO
pin on the negative edge of SCK. SDI and SCK are
ignored, and SDO transitions to a high impedance
condition when CS* is at a logic high state.
Serial data is received by the MX877 through the SDI
pin. This data is accepted on the rising edge of SCK. A
specific output is programmed to a logic high state if
SDI is at a logic high state during the rising edge of
SCK. Conversely, a specific output is programmed to a
logic low state if SDI is at a logic low state during the
rising edge of SCK. Outputs transition to their
programmed states on the positive edge of CS* if the
output enable pin, OE is in a logic high state.
The MSB input data (IN7) is presented at the serial
output pin, SDO on the falling edge of CS*. Input data
from IN6 through IN0 is sequentially presented at
SDO on negative SCK transitions if CS* remains in a
logic low state. If CS* is at a logic low state beyond 8
cycles of SCK, SDI data that has propagated through
the I/O register will then be presented at SDO. The
SDO pin transitions to a high impedance state when
CS* is in a logic level high state, thus allowing multiple
serial peripherals to share the microprocessor data
pin.
R02
IN7
0
IN6
0
IN5
1
IN4
0
IN3
1
IN2
1
IN1
1
IN0
0
SDI
1
t1
0
0
0
0
1
1
0
0
0
1
0
1
1
1
0
CS *
SCK
SDO
SDI at
time t1
OUT7
1
OUT6
0
OUT5
0
OUT4
0
OUT3
0
OUT2
1
OUT1
1
OUT0
0
Devices may be serially cascaded by connecting SDO
to SDI of the next device. Pins SCK and CS* are
common to all devices in serial cascade. For
n-cascaded devices the CS* should remain low for 8n
cycles of SCK.
An output enable pin, OE enables the driver outputs
OUT0 through OUT7 when logic high. A logic low level
on OE forces the OUT0 through OUT7 outputs to a
high impedance state.
The MX877 can also operate as a parallel-in,
parallel-out level shifter and driver. SCK must remain
at a logic low state when operating in this mode.
Parallel input data presented to IN0 through IN7 is
captured on the falling edge of CS*. This data is
transferred to OUT0 through OUT7 on the rising edge
of CS*, and remains latched until the next rising edge
of CS*.
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MX877
INTEGRATED CIRCUITS DIVISION
3 Application Examples
3.1 Parallel In / Parallel Out Application
IN
OUT
8
8
CS*
SDI
OE
SCK
3.2 Serial Cascade Application
MASTER IN
SDO
IN
OUT
8
8
SCK
CS*
OE
SDI
SDO
IN
OUT
8
8
SCK
CS*
OE
SDI
MASTER OUT
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R02
MX877
INTEGRATED CIRCUITS DIVISION
3.3 Control System Application
System
MX877
capture
sensors
IN
8
SDI
SDO
drive
µC
SCK
actuators
OUT
8
CS*
OE
Type 1 timing:
capture N
drive N
analyze N, calculate N+1
capture N+1
drive N+1
CS*
µC
SDI
µC
output N
output N+1
SCK
SDO
input N
µC
input N+1
µC
Type 2 timing:
analyze N, calculate N+1
capture N
drive N+1
capture N+1
CS*
SDI
µC
don't care
output N+1
SCK
SDO
R02
input N
µC
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MX877
INTEGRATED CIRCUITS DIVISION
4 Manufacturing Information
4.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classifies its plastic encapsulated devices for moisture sensitivity according to the latest
version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation.
We test all of our products to the maximum conditions set forth in the standard, and guarantee proper
operation of our devices when handled according to the limitations and information in that standard as well as to any
limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled
according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device
Moisture Sensitivity Level (MSL) Classification
MX877R
MSL 1
4.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
4.3 Soldering Profile
Provided in the table below is the Classification Temperature (TC) of this product and the maximum dwell time the
body temperature of this device may be (TC - 5)ºC or greater. The classification temperature sets the Maximum Body
Temperature allowed for this device during lead-free reflow processes. For through-hole devices, and any other
processes, the guidelines of J-STD-020 must be observed.
Device
Classification Temperature (TC)
Dwell Time (tp)
Max Reflow Cycles
MX877R
260°C
30 seconds
3
4.4 Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. Board washing to reduce or
remove flux residue following the solder reflow process is acceptable provided proper precautions are taken to
prevent damage to the device. These precautions include but are not limited to: using a low pressure wash and
providing a follow up bake cycle sufficient to remove any moisture trapped within the device due to the washing
process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature
and duration necessary to remove the moisture trapped within the package is the responsibility of the user
(assembler). Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be
used. Additionally, the device must not be exposed to flux or solvents that are Chlorine- or Fluorine-based.
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MX877
INTEGRATED CIRCUITS DIVISION
4.5 Mechanical Dimensions
4.5.1 QFN-28 Package & Recommended PCB Land Pattern
Recommended PCB Land Pattern
2
1
5.00 BSC
(0.197 BSC)
0.18 / 0.30
(0.007 / 0.012)
28
0.500 BSC
(0.0197 BSC)
0.80 / 1.00
(0.031 / 0.039)
0.200 REF
(0.008 REF)
0.00 / 0.05
(0.000 / 0.002)
0.50
(0.020)
4.70
(0.185)
Pin 1 REF
3.25
(0.128)
3.00 / 3.25
(0.118 / 0.128)
3.00 / 3.25
(0.118 / 0.128)
5.00 BSC
(0.197 BSC)
0.45 / 0.65
(0.018 / 0.026)
4.70
(0.185)
3.25
(0.128)
1.00
(0.039)
0.30
(0.012)
NOTES: (Unless otherwise specified)
1. Coplanarity applies to the exposed
heat sink slug as well as the terminals.
2. Dimensions and tolerancing conform
to ASME Y14.5M-1994.
3. Molded package shall conform to
JEDEC Standard configuration
MO-220 Variation VHHD-1.
4. Pins 2 and 5 are not internally connected.
5. Thermal pad is internally connected to
GND (pins 3 & 21).
Dimensions
mm MIN / mm MAX
(inches MIN / inches MAX)
4.5.2 Tape & Reel Dimensions
4.00 ± 0.10
(0.157 ± 0.004)
2.00 ± 0.05
(0.079 ± 0.002)
B
330.2 DIA.
(13.00 DIA.)
ø1.55 ± 0.05
(ø0.061 ± 0.002)
1.75 ± 0.10
(0.069 ± 0.004)
R0.50 TYP
(R0.020 TYP)
12.00 ± 0.10
(0.472 ± 0.004)
Top Cover
Tape Thickness
0.066 MAX.
(0.0026 MAX.)
BO=5.30 ± 0.10
(0.209 ± 0.004)
Embossed Carrier
KO=1.10 ± 0.10
(0.043 ± 0.004)
Section B-B
Embossment
5.50 ± 0.05
(0.217 ± 0.002)
A
A
B
8.00 ± 0.10
(0.315 ± 0.004)
AO=5.30 ± 0.10
(0.209 ± 0.004)
Section A-A
ø1.50 MIN
(ø0.059 MIN)
Dimensions
mm
(inches)
NOTES:
1. A0 & B0 measured at 0.3mm above base of pocket.
2. 10 pitches cumulative tol. ±0.2mm
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IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and
reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses or indemnity are expressed
or implied. Except as set forth in IXYS Integrated Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability
whatsoever, and disclaims any express or implied warranty relating to its products, including, but not limited to, the implied warranty of merchantability, fitness for a
particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized, or warranted for use as components in systems intended for surgical implant into
the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical
harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes
to its products at any time without notice.
Specification: DS-MX877-R02
©Copyright 2016, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
6/9/2016
R02
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