AAT1153_201992C.pdf

DATA SHEET
AAT1153: 2 A Step-Down Converter
Applications
Description
 Cellular phones
The AAT1153 SwitchReg™ is a 1.2 MHz constant frequency
current mode PWM step-down converter. It is ideal for portable
equipment requiring very high current up to 2 A from single-cell
Lithium-Ion batteries while still achieving over 90% efficiency
during peak load conditions. The AAT1153 also can run at 100%
duty cycle for low dropout operation, extending battery life in
portable systems while light load operation provides very low
output ripple for noise-sensitive applications.
 Digital cameras
 DSP core supplies
 PDAs
 Portable instruments
 Smart phones
The AAT1153 can supply up to 2 A output load current from a
2.5 V to 5.5 V input voltage and the output voltage can be
regulated as low as 0.6 V. The high switching frequency
minimizes the size of external components while keeping
switching losses low. The internal slope compensation setting
allows the device to operate with smaller inductor values to
optimize size and provide efficient operation.
Features
 Input voltage range: 2.5 V to 5.5 V
 Output voltages: 0.6 V to VIN
 Output current: 2 A
 High efficiency: up to 95%
The AAT1153 is available with adjustable (0.6 V to VIN) output
voltage. The device is available in a Pb-free, 10-pin, 3  3 mm
TDFN package and is rated over the 40 °C to +85 °C
temperature range.
 1.2 MHz constant switching frequency
 Low RDS(ON) internal switches: 0.15 
 Allows use of ceramic capacitors
 Current mode operation for excellent line and load transient
response
 Short-circuit and thermal fault protection
 Soft start
A typical application circuit is shown in Figure 1. The pin
configuration and package are shown in Figure 2. Signal pin
assignments and functional pin descriptions are provided in
Table 1.
 Low dropout operation: 100% duty cycle
Skyworks Green™ products are compliant with
all applicable legislation and are halogen-free.
For additional information, refer to Skyworks
Definition of Green™, document number
SQ04-0074.
 Low shutdown current: ISHDN < 1 A
 40 °C to +85 °C temperature range
 TDFN (10-pin, 3  3 mm) package (MSL1, 260 ºC per
JEDEC J-STD-020)
VIN
2.5 to 5.5 V
C1
22 μF
1 EN
2 IN
3 AIN
6 AGND
4 AGND
LX
LX
AAT1153
FB
PGND
PGND
8
7
5
10
9
L1
22 μH
R1
634 kΩ
VOUT
1.8 V, 2 A
C2
22 μF
R2
316 kΩ
Y1611
Figure 1. AAT1153 Typical Application Circuit
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
201992C • Skyworks Proprietary and Confidential Information • Products and Product Information are Subject to Change Without Notice • December 17, 2014
1
DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
EN
1
10
PGND
IN
2
9
PGND
AIN
3
8
LX
AGND
4
7
LX
FB/OUT
5
6
AGND
tc458
Figure 2. AAT1153 Pinout – 10-Pin TDFN
(Top View)
Table 1. AAT1153 Signal Descriptions
Pin
Name
Description
1
EN
Enable pin. Active high. In shutdown, all functions are disabled drawing < 1 A supply current. Do not leave EN floating.
2
IN
Power supply input pin. Must be closely decoupled to AGND with a 2.2 F or greater ceramic capacitor.
3
4, 6
5
AIN
Analog supply input pin. Provides bias for internal circuitry.
AGND
Analog ground pin.
FB/OUT
Feedback input. Connect FB to the center point of the external resistor divider. The feedback threshold voltage is 0.6 V.
7, 8
LX
Switching node pin. Connect the output inductor to this pin.
9, 10
PGND
Power ground pin.
EP
Power ground exposed pad. Must be connected to bare copper ground plane.
Electrical and Mechanical Specifications
The absolute maximum ratings of the AAT1153 are provided in
Table 2, and electrical specifications are provided in Table 3.
Typical performance characteristics of the AAT1153 are illustrated
in Figures 3 through 21.
Table 2. AAT1153 Absolute Maximum Ratings (Note 1)
Parameter
Symbol
Minimum
Maximum
Units
Input supply voltages
VIN, VAIN
0.3
+6.0
V
FB, LX voltages
VFB, VLX
0.3
VIN + 0.3
V
EN voltage
VEN
0.3
VIN + 0.3
V
Ground voltages
PGND, AGND
0.3
+6.0
V
Operating temperature range
TA
40
+85
ºC
Storage temperature
TSTG
65
+150
ºC
Lead temperature (soldering, 10 s)
TLEAD
300
ºC
Thermal resistance (Notes 2, 3)
JA
45
ºC/W
Thermal dissipation at TA = 25 °C
PD
2.2
W
Note 1: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other
parameters set at or below their nominal value. Exceeding any of the limits listed may result in permanent damage to the device.
Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + PD  JA.
Note 3: Thermal Resistance is specified with approximately 1 square inch of 1 oz. copper.
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
CAUTION: Although this device is designed to be as robust as possible, electrostatic discharge (ESD) can damage this device. This device
must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body
or equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times.
Table 3. AAT1153 Electrical Specifications (Note 1)
(VIN = 3.6 V, TA = –40 C to +85C, Typical Values are TA = 25 C, Unless Otherwise Noted)
Parameter
Symbol
Input voltage range (Note 2)
VIN
Output voltage range
VOUT
Input DC supply current
Feedback input bias current
Test Condition
Min
Max
Units
2.5
Typical
5.5
V
0.6
VIN
V
Active mode: VFB = 0.5 V
300
500
A
Shutdown mode: VEN = 0 V, VAIN = 5.5 V
0.1
1
A
IQ
IFB
30
nA
TA = 25°C
VFB = 0.65 V
0.5880
0.6000
0.6120
V
V
Regulated feedback voltage (Note 3)
VFB
0 C  TA  85 C
0.5865
0.6000
0.6135
−40 C  TA  85 C
0.5850
0.6000
0.6150
V
Line regulation
VLINEREG/VIN
VIN = 2.5 to 5.5 V, IOUT = 10 mA
0.10
0.20
%/V
Load regulation
VLOADREG/IOUT
IOUT = 10 mA to 2 A
0.20
Output voltage accuracy
VFB
VIN = 2.5 to 5.5 V, IOUT = 10 mA to 2 A
Oscillator frequency
fOSC
VFB = 0.6 V
Startup time
tSTUP
From enable to output regulation
1.3
ms
Over-temperature shutdown threshold
TSD_THR
170
C
Over-temperature shutdown hysteresis
TSD_HYS
10
C
−3
0.96
2.5
1.2
%/A
+3
% VOUT
1.44
MHz
Peak switch current
ILIM
P-CH MOSFET
RDS(ON)_P
VIN = 3.6 V
135
3.5
200
m
A
N-CH MOSFET
RDS(ON)_N
VIN = 3.6 V
95
150
m
Enable threshold low
VEN_L
Enable threshold high
VEN_H
Input low current
IIN_L
0.3
1.5
VIN = VEN = 5.5 V
−1.0
V
V
1.0
A
Note 1: The AAT1153 is guaranteed to meet performance specifications over the −40°C to +85°C operating temperature range and is assured by design, characterization, and correlation with
statistical process controls.
Note 2: VIN should be not less than VOUT + VDROPOUT, where VDROPOUT = IOUT x (RDS(ON)_P + ESRINDUCTOR, typically VDROPOUT = 0.3 V.
Note 3: The regulated feedback voltage is tested in an internal test mode that connects VFB to the output of the error amplifier.
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
Typical Performance Characteristics
(VIN = 3.6 V, TA = –40 C to +85C, Typical Values are TA = 25 C, Unless Otherwise Noted)
3.399
100
VIN = 4.2 V
90
3.366
80
VIN = 3.7 V
VIN = 5.5 V
VIN = 5.0 V
50
40
30
20
3.300
tc459
0
0.1
1
10
100
1000
3.201
0
10000
200
400
600
Figure 3. Efficiency vs Output Current
(VOUT = 3.3 V, TA = 25 C, L = 2.2 H, CIN = COUT = 22 F)
Output Voltage (V)
VIN = 2.5 V
VIN = 5.5 V
VIN = 5.0 V
50
40
30
2000
1.818
VIN = 5.0 V
VIN = 4.2 V
VIN = 5.5 V
1.800
1.782
VIN = 3.6 V
VIN = 2.5 V
1.764
tc461
10
0
0.1
1
10
100
1000
1.746
0
10000
200
400
600
800
1000
1200
1400
1600
1800
2000
Output Current (mA)
Output Current (mA)
Figure 6. DC Regulation
(VOUT = 1.8 V, TA = 25 C, L = 2.2 H, CIN = COUT = 22 F)
Figure 5. Efficiency vs Output Current
(VOUT = 1.8 V, TA = 25 C, L = 2.2 H, CIN = COUT = 22 F)
1.545
100
90
VIN = 4.2 V
1.530
80
Output Voltage (V)
VIN = 3.6 V
VIN = 2.5 V
50
VIN = 5.5 V
40
VIN = 5.0 V
30
20
VIN = 4.2 V
1.515
VIN = 5.0 V
VIN = 5.5 V
1.500
1.485
VIN = 3.6 V
VIN = 2.5 V
tc463
1
10
100
1000
10000
Output Current (mA)
Figure 7. Efficiency vs Output Current
(VOUT = 1.5 V, TA = 25 C, L = 2.2 H, CIN = COUT = 22 F)
tc464
1.470
10
1.455
0
200
400
600
800
1000
1200
1400
1600
1800
2000
Output Current (mA)
Figure 8. DC Regulation
(VOUT = 1.5 V, TA = 25 C, L = 2.2 H, CIN = COUT = 22 F)
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1800
tc462
Efficiency (%)
1600
1.836
20
Efficiency (%)
1400
VIN = 4.2 V
VIN = 3.6 V
60
0
0.1
1200
1.854
90
60
1000
Figure 4. DC Regulation
(VOUT = 3.3 V, TA = 25 C, L = 2.2 H, CIN = COUT = 22 F)
100
70
800
Output Current (mA)
Output Current (mA)
70
VIN = 4.2 V
VIN = 3.7 V
3.267
3.234
10
80
VIN = 5.0 V
3.333
tc460
Efficiency (%)
60
Output Voltage (V)
VIN = 5.5 V
70
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
1.236
100
90
VIN = 4.2 V
80
1.224
Output Voltage (V)
VIN = 3.6 V
VIN = 2.5 V
60
50
VIN = 5.5 V
40
VIN = 5.0 V
30
20
1.212
VIN = 5.0 V
VIN = 4.2 V
VIN = 5.5 V
1.200
1.188
VIN = 3.6 V
VIN = 2.5 V
1.176
tc465
10
0
0.1
1
10
100
1000
tc466
Efficiency (%)
70
1.164
0
10000
200
400
600
800
1000
1200
1400
1600
1800
2000
Output Current (mA)
Output Current (mA)
Figure 10. DC Regulation
(VOUT = 1.2 V, TA = 25 C, L = 2.2 H, CIN = COUT = 22 F)
Figure 9. Efficiency vs Output Current
(VOUT = 1.2 V, TA = 25 C, L = 2.2 H, CIN = COUT = 22 F)
400
0.38
0.32
0.30
0.28
VOUT = 1.8 V
0.26
0.24
0.20
2.5
tc467
0.22
3.0
3.5
4.0
4.5
5.0
5.5
350
VIN = 4.2 V
VOUT = 3.3 V
300
VIN = 3.6 V
VOUT = 1.8 V
250
200
-40
tc468
VOUT = 3.3 V
0.34
Quiescent Current (μA)
Quiescent Current (mA)
0.36
-20
0
20
40
60
80
100
Temperature (ºC)
Input Voltage (V)
Figure 12. Quiescent Current vs Temperature
(L = 2.2 H, CIN = COUT = 22 F)
Figure 11. Quiescent Current vs Input Voltage
(TA = 25 C, L = 2.2 H, CIN = COUT = 22 F)
0.40
IOUT = 1 A
IOUT = 600 mA
IOUT = 1 mA
IOUT = 1.5 A
0.00
-0.20
IOUT = 2 A
-0.40
2.5
tc469
Accuracy (%)
0.20
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Input Voltage (V)
Figure 13. Line Regulation
(VOUT = 1.8 V, L = 2.2 H, CIN = COUT = 22 F)
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
150
200
85 °C
85 °C
130
160
RDS(ON)_N (mΩ)
RDS(ON)_P (mΩ)
180
25 °C
140
120
110
25 °C
90
–40 °C
tc470
80
2.5
3
3.5
4
4.5
5
tc471
–40 °C
70
100
50
2.5
5.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Input Voltage (V)
Figure 15. N-Channel RDS(ON) vs Input Voltage
Figure 14. P-Channel RDS(ON) vs Input Voltage
0.609
1.4
Reference Voltage (V)
1.2
1.1
1.0
-40
-20
0
20
40
60
80
0.605
0.603
0.601
0.599
0.597
0.595
0.593
0.591
-40
100
tc473
1.3
tc472
Switching Frequency (MHz)
0.607
-20
0
20
40
60
80
100
Temperature (ºC)
Temperature (ºC)
Figure 17. Reference Voltage vs Temperature
(VIN = 3.6 V)
Figure 16. Switching Frequency vs Temperature
(VIN = 3.6 V, VOUT = 1.8 V)
2.2
6
2.0
-2
1.4
1.0
0.6
Output Voltage (top) (V)
0
1.8
1.6
2A
200 mA
0.2
-0.2
Time (400 μs/div)
Figure 18. Soft Start
(VIN = 3.6 V, VOUT = 1.8 V, IOUT = 2 A, CFF = 22 pF)
tc474
Time (400 μs/div)
tc475
Figure 19. Load Transient Response
(VIN = 3.6 V, VOUT = 1.8 V, L = 2.2 H, CIN = COUT = 22 F)
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2.6
2.2
1.8
1.4
1.0
0.6
0.2
-0.2
Output Current (bottom) (A)
2
Input Current (bottom) (A)
Enable Voltage (top) (V)
Output Voltage (middle) (V)
4
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1.81
1.81
1.80
1.79
0.3
0.2
0.1
0.0
Output Voltage (top) (V)
1.82
1.80
1.79
2.5
2.3
2.1
1.9
Inductor Current (bottom) (A)
1.82
Inductor Current (bottom) (A)
Output Voltage (top) (V)
DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
1.7
-0.1
Time (100 μs/div)
Figure 20. Output Ripple
(VIN = 3.6 V, VOUT = 1.8 V, IOUT = 0 A, L = 2.2 H)
1.5
tc476
Time (400 ns/div)
tc477
Figure 21. Output Ripple
(VIN = 3.6 V, VOUT = 1.8 V, IOUT = 2 A, L = 2.2 H)
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
OSC
SLOPE
COMP
IN
+ VIN: 2.5 to 5.5 V
+
ISENSE
0.6 V
AMP
Softstart
SET
ICOMP
+
+
RESET
PWM
LOGIC
FB/OUT
VOUT
L1
COUT
R2*
R2*
+
IZERO
0.6 V
REF
EN
LX
R1*
+
0.65 V OVDET
R1*
Over-Temperature
and Short-Circuit
Protection
NON-OVERLAP
CONTROL
COMP
PGND
SHUTDOWN
AIN AGND
*The resistor divider R1 + R2 is internally set for the fixed output versions, and is externally set for the adjustable output versions.
tc478
Figure 22. AAT1153 Functional Block Diagram
Functional Description
Current Mode PWM Control
The AAT1153 is a high-output current monolithic switch-mode
step-down DC-DC converter. The device operates at a fixed
1.2 MHz switching frequency, and uses a slope compensated
current mode architecture. This step-down DC-DC converter
can supply up to 2 A output current at VIN = 3 V and has an
input voltage range from 2.5 V to 5.5 V. It minimizes external
component size and optimizes efficiency at the heavy load
range. The slope compensation allows the device to remain
stable over a wider range of inductor values so that smaller
values (1 H to 4.7 H) with lower DCR can be used to achieve
higher efficiency. Apart from the small bypass input capacitor,
only a small L-C filter is required at the output. The device can
be programmed with external feedback to any voltage, ranging
from 0.6 V to near the input voltage. It uses internal MOSFETs to
achieve high efficiency and can generate very low output
voltages by using an internal reference of 0.6 V. At dropout, the
converter duty cycle increases to 100% and the output voltage
tracks the input voltage minus the low RDS(ON) drop of the
P-channel high-side MOSFET and the inductor DCR. The
internal error amplifier and compensation provides excellent
transient response, load, and line regulation. Internal soft-start
eliminates any output voltage overshoot when the enable or the
input voltage is applied.
Slope compensated current mode PWM control provides stable
switching and cycle-by-cycle current limit for excellent load and
line response with protection of the internal main switch
(P-channel MOSFET) and synchronous rectifier (N-channel
MOSFET). During normal operation, the internal P-channel
MOSFET is turned on for a specified time to ramp the inductor
current at each rising edge of the internal oscillator, and
switched off when the peak inductor current is above the error
voltage. The current comparator, ICOMP, limits the peak inductor
current. When the main switch is off, the synchronous rectifier
turns on immediately and stays on until either the inductor
current starts to reverse, as indicated by the current reversal
comparator, IZERO, or the beginning of the next clock cycle.
The functional block diagram is shown in Figure 22.
Control Loop
The AAT1153 is a peak current mode step-down converter. The
current through the P-channel MOSFET (high side) is sensed for
current loop control, as well as short circuit and overload
protection. A slope compensation signal is added to the sensed
current to maintain stability for duty cycles greater than 50%.
The peak current mode loop appears as a voltage-programmed
current source in parallel with the output capacitor. The output
of the voltage error amplifier programs the current mode loop
for the necessary peak switch current to force a constant output
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
voltage for all load and line conditions. Internal loop
compensation terminates the transconductance voltage error
amplifier output. The error amplifier reference is fixed at 0.6 V.
Soft Start / Enable
Soft start limits the current surge seen at the input and
eliminates output voltage overshoot. The enable pin is active
high. When pulled low, the enable input (EN) forces the
AAT1153 into a low-power, non-switching state. The total input
current during shutdown is less than 1 A.
synchronous rectifier. The slope compensation signal reduces
the peak inductor current as a function of the duty cycle to
prevent sub-harmonic oscillations at duty cycles greater than
50%. Conversely, the current limit increases as the duty cycle
decreases.
Applications Information
VIN: 2.5 to 5.5 V 1
Current Limit and Over-Temperature Protection
For overload conditions, the peak input current is limited to
3.5 A. To minimize power dissipation and stresses under
current-limit and short-circuit conditions, switching is
terminated after entering current limit for a series of pulses. The
termination lasts for seven consecutive clock cycles after a
current limit has been sensed during a series of four
consecutive clock cycles.
Thermal protection completely disables switching when internal
dissipation becomes excessive. The junction over-temperature
threshold is 170 °C with 10 °C of hysteresis. Once an overtemperature or over-current fault condition is removed, the
output voltage automatically recovers.
Dropout Operation
When the battery input voltage decreases near the value of the
output voltage, the AAT1153 allows the main switch to remain
on for more than one switching cycle and increases the duty
cycle until it reaches 100%. The duty cycle D of a step-down
converter is defined as:
D  tON  f OSC  100% 
VOUT
 100%
VIN
Where tON is the main switch on time and fOSC is the oscillator
frequency. The output voltage then is the input voltage minus
the voltage drop across the main switch and the inductor. At
low input supply voltage, the RDS(ON) of the P-channel MOSFET
increases, and the efficiency of the converter decreases.
Caution must be exercised to ensure the heat dissipated does
not exceed the maximum junction temperature of the IC.
Maximum Load Current
The AAT1153 operates with an input supply voltage as low as
2.5 V, however, the maximum load current decreases at lower
input voltages due to a large IR drop on the main switch and
C1
22 F
LX 8
LX 7
EN
2 IN
3 AIN
AAT1153-0.6 FB 5
6 AGND
4 AGND
L1
2.2 H
C3
22 pF
PGND 10
PGND 9
VOUT: 1.8 V, 2 A
R1
634 k
C2
22 F
R2
316 k
tc479
Figure 23. Basic Application Circuit
Setting the Output Voltage
Figure 23 shows the basic application circuit for the AAT1153.
The AAT1153 can be externally programmed. Resistors R1 and
R2 in Figure 23 program the output to regulate at a voltage
higher than 0.6 V. To limit the bias current required for the
external feedback resistor string while maintaining good noise
immunity, the minimum suggested value for R2 is 59 k.
Although a larger value further reduces quiescent current, it
also increases the impedance of the feedback node, making it
more sensitive to external noise and interference. Table 4
summarizes the resistor values for various output voltages with
R2 set to either 59 k for good noise immunity or 316 k for
reduced no load input current.
The AAT1153, combined with an external feed forward
capacitor (C3 in Figure 1), delivers enhanced transient response
for extreme pulsed load applications. The addition of the feed
forward capacitor typically requires a larger output capacitor C2
for stability. The external resistor sets the output voltage
according to the following equation:
R1 

VOUT  0.6V   1 

R2 


V
R1   OUT  1  R 2
0
.
6
V


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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
Table 4. Resistor Selections for Different Output Voltage
Settings (Standard 1% Resistors Substituted for Calculated
Values)
overshoot), the resistance should be kept below 100 m. The
DC current rating of the inductor should be at least equal to the
maximum load current plus half the ripple current to prevent
core saturation (2 A + 600 mA). Table 5 lists some typical
surface-mount inductors that meet target applications for the
AAT1153.
VOUT (V)
R1 (k)
(R2 = 59 k)
R1 (k)
(R2 = 316 k)
0.8
19.6
105
0.9
29.4
158
1.0
39.2
210
1.1
49.9
261
1.2
59.0
316
1.3
68.1
365
Slope Compensation
1.4
78.7
422
1.5
88.7
475
1.8
118
634
1.85
124
655
2.0
137
732
2.5
187
1000
3.3
267
1430
The AAT1153 step-down converter uses peak current mode
control with slope compensation for stability when duty cycles
are greater than 50%. The slope compensation is set to
maintain stability with lower value inductors which provide
better overall efficiency. The output inductor value must be
selected so the inductor current down slope meets the internal
slope compensation requirements. As an example, the value of
the slope compensation is set to 1 A/s which is large enough
to guarantee stability when using a 2.2 H inductor for all
output voltage levels from 0.6V to 3.3 V.
Inductor Selection
For most designs, the AAT1153 operates with inductor values of
1 H to 4.7 H. Low inductance values are physically smaller
but require faster switching, which results in some efficiency
loss. The inductor value can be derived from the following
equation:
 VIN  VOUT 
V
L  OUT
VIN  ΔI L  f OSC
Where IL is inductor ripple current. Large value inductors lower
ripple current and small value inductors result in high ripple
currents. Choose inductor ripple current approximately 30% of
the maximum load current 2 A, or
ΔI L  600 mA
For output voltages above 2.0 V, when light-load efficiency is
important, the minimum recommended inductor is 2.2 H.
Manufacturer’s specifications list both the inductor DC current
rating, which is a thermal limitation, and the peak current rating,
which is determined by the saturation characteristics. The
inductor should not show any appreciable saturation under
normal load conditions. Some inductors may meet the peak and
average current ratings yet result in excessive losses due to a
high DCR.
Always consider the losses associated with the DCR and its
effect on the total converter efficiency when selecting an
inductor. For optimum voltage-positioning load transients,
choose an inductor with DC series resistance in the 20 m to
100 m range. For higher efficiency at heavy loads (above
200 mA), or minimal load regulation (but some transient
For example, the 2.2 H CDRH5D16-2R2 inductor selected from
Sumida has a 28.7 m DCR and a 3.0 ADC current rating. At
full load, the inductor DC loss is 57 mW which gives a 1.6%
loss in efficiency for a 1200 mA, 1.8 V output.
The worst case external current slope (m) using the 2.2 H
inductor is when VOUT = 3.3 V and is:
m
VOUT 3.3

 1.5 A / μs
L
2.2
To keep the power supply stable when the duty cycle is above
50%, the internal slope compensation (mA) should be:
ma 
1
 m  0.75 A / μs
2
Therefore, to guarantee current loop stability, the slope of the
compensation ramp must be greater than one-half of the down
slope of the current waveform. So the internal slope
compensated value of 1 A/s guarantees stability using a
2.2 H inductor value for all output voltages from 0.6 V to 3.3 V.
Input Capacitor Selection
The input capacitor reduces the surge current drawn from the
input and switching noise from the device. The input capacitor
impedance at the switching frequency should be less than the
input source impedance to prevent high frequency switching
current passing to the input. The calculated value varies with
input voltage and is a maximum when VIN is double the output
voltage.
C IN
VOUT  VOUT 

 1 
VIN 
VIN 


 VPP

 ESR   f OSC
 I OUT

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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
C IN ( MIN ) 
1

 VPP

 ESR   4  f OSC
 I OUT

A low ESR input capacitor sized for maximum RMS current must
be used. Ceramic capacitors with X5R or X7R dielectrics are
highly recommended because of their low ESR and small
temperature coefficients. A 22 F ceramic capacitor for most
applications is sufficient. A large value may be used for
improved input voltage filtering.
The maximum input capacitor RMS current is:
I RMS  I OUT 
VOUT  VOUT
 1 
VIN 
VIN



The input capacitor RMS ripple current varies with the input and
output voltage and will always be less than or equal to half of
the total DC load current.
I RMS(MAX)
I
 OUT
2
To minimize stray inductance, the capacitor is placed as closely
as possible to the IC. This keeps the high frequency content of
the input current localized, minimizing EMI and input voltage
ripple. The proper placement of the input capacitor (C1) can be
seen in the evaluation board layout in Figures 24 and 25.
A laboratory test set-up typically consists of two long wires
running from the bench power supply to the evaluation board
input voltage pins. The inductance of these wires, along with
the low-ESR ceramic input capacitor, can create a high-Q
network that may affect converter performance. This problem
often becomes apparent in the form of excessive ringing in the
output voltage during load transients. Errors in the loop phase
and gain measurements can also result.
Since the inductance of a short PCB trace feeding the input
voltage is significantly lower than the power leads from the
bench power supply, most applications do not exhibit this
problem.
In applications where the input power source lead inductance
cannot be reduced to a level that does not affect the converter
performance, a high ESR tantalum or aluminum electrolytic
should be placed in parallel with the low ESR, ESL bypass
ceramic. This dampens the high-Q network and stabilizes the
system.
Output Capacitor Selection
The function of output capacitance is to store energy to attempt
to maintain a constant voltage. The energy is stored in the
capacitor’s electric field due to the voltage applied.
The value of output capacitance is generally selected to limit
output voltage ripple to the level required by the specification.
Since the ripple current in the output inductor is usually
determined by L, VOUT and VIN, the series impedance of the
capacitor primarily determines the output voltage ripple. The
three elements of the capacitor that contribute to its impedance
(and output voltage ripple) are equivalent series resistance (ESR),
equivalent series inductance (ESL), and capacitance (C).
The output voltage droop due to a load transient is dominated
by the capacitance of the ceramic output capacitor. During a
step increase in load current, the ceramic output capacitor
alone supplies the load current until the loop responds. Within
three switching cycles, the loop responds and the inductor
current increases to match the load current demand. The
relationship of the output voltage droop during the three
switching cycles to the output capacitance can be estimated by:
C OUT 
3  ΔI LOAD
V DROOP  f OSC
In many practical designs, to get the required ESR, a capacitor
with much more capacitance than is needed must be selected.
For either continuous or discontinuous inductor current mode
operation, the ESR of the COUT needed to limit the ripple to
VOUT, the peak-to-peak voltage is:
ESR 
ΔVOUT
ΔI L
Ripple current flowing through a capacitor’s ESR causes power
dissipation in the capacitor. This power dissipation causes a
temperature increase internal to the capacitor. Excessive
temperature can seriously shorten the expected life of a
capacitor. Capacitors have ripple current ratings that are
dependent on ambient temperature and should not be
exceeded. The output capacitor ripple current is the inductor
current, IL, minus the output current, IOUT. The RMS value of the
ripple current flowing in the output capacitance (continuous
inductor current mode operation) is given by:
I RMS  ΔI L 
3
 ΔI L  0.289
6
ESL can be a problem by causing ringing in the low megahertz
region but can be controlled by choosing low ESL capacitors,
limiting lead length (PCB and capacitor), and replacing one large
device with several smaller ones connected in parallel.
To meet the requirement of output voltage ripple small and
regulation loop stability, ceramic capacitors with X5R or X7R
dielectrics are recommended due to their low ESR and high
ripple current ratings. The output ripple VOUT is determined by:
ΔVOUT 
VOUT  VIN - VOUT  
1
  ESR 
L  f OSC  VIN
8
f

OSC  COUT




A 22 F ceramic capacitor can satisfy most applications.
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11
DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
Thermal Calculations
Layout Guidance
There are three types of losses associated with the AAT1153
step-down converter: switching losses, conduction losses, and
quiescent current losses. Conduction losses are associated with
the RDS(ON) characteristics of the power output switching
devices. Switching losses are dominated by the gate charge of
the power output switching devices. At full load, assuming
continuous conduction mode (CCM), a simplified form of the
losses is given by:

When laying out the PC board, the following layout guidelines
should be followed to ensure proper operation of the AAT1153:
 The exposed pad (EP) must be reliably soldered to the GND
plane. A PGND pad below EP is strongly recommended.
 The power traces, including the GND trace, the LX trace and
the IN trace should be kept short, direct and wide to allow
large current flow. The L1 connection to the LX pins should be
as short as possible. Use several VIA pads when routing
between layers.

2
I OUT
 RDS ( ON ) H  VOUT  RDS ( ON ) L  VIN  VOUT 
PTOTAL 


VIN
 The input capacitor (C1) should connect as closely as possible
to IN (Pin 2) and AGND (Pins 4 and 6) to get good power
filtering.
 t SW  f OSC  I OUT  I Q  VIN
IQ is the step-down converter quiescent current. The term tSW is
used to estimate the full load step-down converter switching
losses.
 Keep the switching node, LX (Pins 7 and 8) away from the
sensitive FB/OUT node.
 The feedback trace or OUT pin (Pin 2) should be separate
from any power trace and connect as closely as possible to
the load point. Sensing along a high-current load trace will
degrade DC load regulation. If external feedback resistors are
used, they should be placed as closely as possible to the FB
pin (Pin 5) to minimize the length of the high impedance
feedback trace.
For the condition where the step-down converter is in dropout
at 100% duty cycle, the total device dissipation reduces to:
2
PTOTAL  I OUT
 RDS ( ON ) H  I Q  VIN
Since RDS(ON), quiescent current, and switching losses all vary
with input voltage, the total losses should be investigated over
the complete input voltage range. Given the total losses, the
maximum junction temperature can be derived from the JA for
the DFN-10 package which is 45 °C/W.
 The output capacitor C2 and L1 should be connected as
closely as possible. The connection of L1 to the LX pin should
be as short as possible and there should not be any signal
lines under the inductor.
TJ ( MAX )  PTOTAL  θ JA  TA
 The resistance of the trace from the load return to PGND
should be kept to a minimum. This will help to minimize any
error in DC regulation due to differences in the potential of the
internal signal ground and the power ground.
Tables 5 and 6 lists the suggested component selection.
Table 5. Suggested Inductor Selection Information
Part Number
Inductance (H)
Max DC Current (A)
DCR (m)
Size L  W  H (mm)
Type
Manufacturer
2.2
3.0
28.7
5.8  5.8  1.8
Shielded
Sumida
CDRH5D16
CDRH5D16
3.3
2.6
35.6
5.8  5.8  1.8
Shielded
Sumida
CDRH8D28
4.7
3.4
19
8.3  8.3  3.0
Shielded
Sumida
SD53
2.0
3.3
23
5.2  5.2  3.0
Shielded
Coiltronics
SD53
3.3
2.6
29
5.2  5.2  3.0
Shielded
Coiltronics
SD53
4.7
2.1
39
5.2  5.2  3.0
Shielded
Coiltronics
Table 6 Suggested Capacitor Selection Information
Part Number
Value
Voltage (V)
Temp. Co.
Case
Manufacturer
GRM219R60J106KE19
10 F
6.3
X5R
0805
Murata
GRM21BR60J226ME39
22 F
6.3
X5R
0805
Murata
GRM1551X1E220JZ01B
22 pF
25
JIS
0402
Murata
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
Design Example
Specifications
VOUT = 1.8 V @2 A
VIN = 2.7 V to 4.2 V (3.6 V nominal)
fOSC = 1.2 MHz
Transient droop = 200 mV
VOUT = 50 mV
1.8 V Output Inductor
ΔI L  30%  I OUT  0.3  2  600( mA )
L

VOUT  VIN ( MAX )  VOUT
VIN ( MAX )  ΔI L  f OSC

1.8  4.2  1.8 
 1.4( μH )
4.2  0.6  1.2  10 6
For Sumida 2.2 H inductor (CDRH2D14) with DCR 75 m, the IL should be:
ΔI L 
VOUT  VOUT
  1 
L
VIN

I PKL  I OUT 

  T  395( mA )

ΔI L
0.395
2
 2.2( A )
2
2
2
P  I OUT
 DCR  2   0.0287  114.8( mW )
2
1.8 V Output Capacitor
COUT 
3  ΔI LOAD
3  1.2
 25( μF);

VDROOP  f OSC 0.2  1.2  10 6
ESR 
ΔVOUT
0.05

 0.13
（Ω）
ΔI L
0.395
use 22 μF
Select a 22 F, 10 m ESR ceramic capacitor to meet the ripple 50 mV requirement.
ΔVOUT 
VOUT  VIN - VOUT  
1
  ESR 
8  f OSC  COUT
L  f OSC  VIN


1.8  4.2 - 1.8 
1


 
  0.01 
 5.7( mV )
-6
6
6
-6 
2
.
2

10

1
.
2

10

4
.
2
8

1
.
2

10

22

10



I RMS  ΔI L  0.289  0.395  0.289  114( mArms )
2
PCOUT  ESR  I RMS
 0.01  12  10( mW )
Input Capacitor
Input ripple VPP = 25 mV
C IN ( MIN ) 
I RMS 
1

 VPP

 ESR   4  f OSC
I
 OUT


1
 13.9( μF );
0
.
025


 0.01  4  1.2  10 6

 2

use 22 μF
I OUT 2
  1( Arms )
2
2
2
PCIN  ESR  I RMS
 0.01  12  10( mW )
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13
DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
AAT1153 Losses
2
2
PTOTAL  I OUT
 RDS ( ON ) _ P  D  I OUT
 RDS ( ON ) _ N  1  D   t SW  f OSC  I OUT   VIN
 2 2  0.135 


1.8
1.8 

9
6
 2 2  0.095   1 
  5  10  1.2  10  2  4.2
4.2
4.2 

 498.9( mW )
Evaluation Board Description
Package Information
The AAT1153 Evaluation Board is used to test the performance
of the AAT1153. An Evaluation Board schematic diagram is
provided in Figure 24. Layer details for the Evaluation Board are
shown in Figure 25.
Package dimensions for the 10-pin TDFN package are shown in
Figure 26. Tape and reel dimensions are shown in Figure 27.
JP1
U1
AAT1153
JP3
SGND
VIN
2.5 V to 5.5 V
C1
22 F
1
EN
PGND 10
2
IN
PGND
3
AIN
LX
4
AGND
5
FB
LX
9
PGND
SGND
SW
8
L1
2.2 H
7
PGND
AGND
EP
SGND
11
6
SGND
JP2
R2A 316 k
R2B 634 k
R2C 1 M
R2D 1.43 M
VOUT
1.2 V, 1.8 V, 2.5 V, 3.3 V
1
2
3
4
5
6
7
8
C2
22 F
C3
22 pF
R1
316 k
SGND
JP2_1-2: 1.2 V
JP2_3-4: 1.8 V
JP2_5-6: 2.5 V
JP2_7-8: 3.3 V
L1: CDRH5D16-2R2NC
C1, C2: GRM21BR60J226ME39
tc480
Figure 24. AAT1153 Evaluation Board Schematic
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
Component Side Layout
Solder Side Layout
Exploded View of Component Side Layout
tc481
Figure 25. AAT1153 Evaluation Board Layer Details
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
0.230 ± 0.050
Pin 1 Location
0.400 ± 0.100
3.000 ± 0.050
0.500 ± 0.050
1
3.000 ± 0.050
Top View
5
C0.3
13
1.250 ± 0.050
Pin 1 Location
9
1.250 ± 0.050
0.025 ± 0.025
0.900 ± 0.100
Bottom View
0.214 ± 0.036
Side View
tc110
Figure 26. AAT1153 10-Pin TDFN Package Dimensions
4.0
2.00 ± 0.05
1.5 ± 0.1
5.50 ± 0.05
1.1
3.3 ± 0.1
12..0 ± 0.3
1.75 ± 0.10
8.0 ± 0.1
3.3 ± 0.1
Pin #1 Location
0.30 ± 0.05
tc111
All dimensions are in millimeters.
Figure 27. AAT1153 Tape and Reel Dimensions
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DATA SHEET • AAT1153: 2 A STEP-DOWN CONVERTER
Ordering Information
Model Name
AAT1153: 2 A Step-Down Converter
Package
Marking
Manufacturing Part Number
Evaluation Board Part Number
TDFN33-10 (Note 1)
ZSXYY (Note 2)
AAT1153IDE-0.6-T1(Note 3)
AAT1153IDE-0.6-EVB
Note 1: The leadless package family, which includes QFN, TQFN, DFN, TDFN and STDFN, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing process.
A solder fillet at the exposed copper edge cannot be guaranteed and is not required to ensure a proper bottom solder connection.
Note 2: XYY = assembly and date code.
Note 3: Sample stock is generally held on all part numbers listed in BOLD.
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