IX2120 1200V High and Low Side Gate Driver INTEGRATED CIRCUITS DIVISION Driver Characteristics Parameter VOFFSET IO +/- (Source/Sink) Description Rating Units 1200 V 2/2 A VOUT 15-20 V ton/toff 250/210 ns The IX2120 is a high voltage integrated circuit that can drive high speed MOSFETs and IGBTs that operate at up to +1200V. The IX2120 is configured with independent high-side and low-side referenced output channels, both of which can source and sink 2A. The floating high-side channel can drive an N-channel power MOSFET or IGBT 1200V from the common reference. Features Manufactured on IXYS Integrated Circuits Division's proprietary high-voltage BCDMOS on SOI (silicon on insulator) process, the IX2120 is extremely robust, and is virtually immune to negative transients. The UVLO circuit prevents turn-on of the MOSFET or IGBT until there is sufficient VBS or VCC supply voltage. Floating Channel for Bootstrap Operation to +1200V Outputs Capable of Sourcing and Sinking 2A Gate Drive Supply Range From 15V to 20V Enhanced Robustness due to SOI Process Tolerant to Negative Voltage Transients: dV/dt Immune • 3.3V Logic Compatible • Undervoltage Lockout for Both High-Side and Low-Side Outputs • • • • • The IX2120 is available in a 28-pin SOIC package. Ordering Information Part Description IX2120B 28-Pin SOIC (28/Tube) IX2120BTR 28-Pin SOIC (1000/Reel) IX2120 Functional Block Diagram VB VDD HIN SD Input Control Logic & Cycle-by-Cycle Edge-Triggered Shutdown Level Shift VDD / VCC VSS / COM Pulse Generator Mid Voltage Level Shift High Voltage Level Shift R S C Q Buffer HO VS VBM VSM UVLO LIN VSS UVLO Level Shift VDD / VCC VSS / COM LS Delay Control VCC Buffer LO COM DS-IX2120-R02 www.ixysic.com 1 IX2120 INTEGRATED CIRCUITS DIVISION 1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Package Pinout: 28-Pin SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Pin Description: 28-Pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Dynamic Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7 Static Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 Test Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9 IX2120 Typical Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3 4 4 4 5 5 6 7 2. Typical Performance Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 www.ixysic.com 12 12 12 12 12 13 R02 IX2120 INTEGRATED CIRCUITS DIVISION 1 Specifications Typical values are characteristic of the device at +25°C, and are the result of engineering evaluations. They are provided for information purposes only, and are not part of the manufacturing testing requirements. 1.1 Package Pinout: 28-Pin SOIC Package VS - 1 VB - 2 3 HO - 4 5 6 7 8 9 VDD - 10 HIN - 11 SD - 12 LIN - 13 VSS - 14 R02 1.2 Pin Description: 28-Pin SOIC Package 28 27 26 25 24 - VSM 23 - VBM 22 - VSM 21 20 19 - VCC 18 17 - COM 16 15 - LO Pin# Name 1 VS High-Side Floating Supply Return 2 VB High-Side Floating Supply 3 - 4 HO 5 - No Connection 6 - No Connection 7 - Internal Connection, Do Not Use 8 - No Connection 9 - Internal Connection, Do Not Use 10 VDD Logic Supply 11 HIN Logic Input for High-Side Gate Drive Output (HO), In-Phase 12 SD Logic Input for Shutdown 13 LIN Logic Input for Low-Side Gate Driver Output (LO), In-Phase 14 VSS Logic Ground 15 LO Low-Side Gate Drive Output 16 - 17 COM 18 - 19 VCC 20 - Internal Connection, Do Not Use 21 - No Connection 22 VSM Middle Floating Return 23 VBM Middle Floating Supply 24 VSM Middle Floating Return 25 - No Connection 26 - No Connection 27 - No Connection 28 - No Connection www.ixysic.com Description No Connection High-Side Gate Drive Output No Connection Low-Side Return No Connection Low-Side Supply 3 IX2120 INTEGRATED CIRCUITS DIVISION 1.3 Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. Parameter Symbol Min Max Units High-Side Floating Supply Voltage VB -0.3 1400 V High-Side Floating Supply Offset Voltage VS VB-20 VB+0.3 V High-Side Floating Output Voltage VHO VS-0.3 VB+0.3 V Middle Floating Supply Voltage VBM -0.3 700 V Middle Floating Supply Offset Voltage VSM VBM-20 VBM+0.3 V Low-Side Fixed Supply Voltage VCC -0.3 20 V Low-Side Output Voltage VLO -0.3 VCC+0.3 V Logic Supply Voltage VDD -0.3 VSS+20 V Logic Supply Offset Voltage VSS VCC-20 VCC+0.3 V Logic Input Voltage (HIN, LIN, SD) VIN VSS-0.3 VDD+0.3 V dVS/dt PD TJ TS - 50 V/ns - 1.3 W -40 +150 -55 +150 °C °C Allowable Offset Supply Voltage Transient Package Power Dissipation @25°C Junction Temperature Storage Temperature 1.4 Thermal Characteristics Parameter Thermal Impedance, Junction to Ambient Symbol Rating Units JA 74 °C/W 1.5 Recommended Operating Conditions For proper operation, the device should be used within the recommended conditions. The VS, VSM, and VSS offset ratings are tested with all supplies biased at a 15V differential. Parameter Symbol Min Max VB VS+15 VS+20 High-Side Floating Supply Offset Voltage VS - 1200 High-Side Floating Output Voltage VHO VS VB Middle Floating Supply Absolute Voltage VBM VSM+15 VSM+20 Middle Floating Supply Offset Voltage Low-Side Fixed Supply Voltage VSM VCC - 600 15 20 Low-Side Output Voltage VLO 0 VCC Logic Supply Voltage VDD VSS+3 VSS+20 Logic Supply Offset Voltage VSS -5 +5 Logic Input Voltage (HIN, LIN, SD) VIN VSS VDD High-Side Floating Supply Absolute Voltage 4 www.ixysic.com Units V R02 IX2120 INTEGRATED CIRCUITS DIVISION 1.6 Dynamic Electrical Characteristics VCC, VDD=15V; VBS, VBMSM=13.5V; CL=1000 pF; and VSS=COM unless otherwise specified. See “Test Waveforms” on page 6. Parameter Conditions Symbol Min Typ Max Turn-On propagation Delay VS=0V ton - 254 - Turn-Off propagation Delay VSM=600V VS=1200V toff - 213 - tSD - 207 - Turn-On Rise Time - tr - 9.4 - Turn-Off Fall Time Delay Matching, HS & LS Turn-On/Off - tf - 9.7 - MT - - 60 Shutdown propagation Delay Units ns 1.7 Static Electrical Characteristics VCC, VBMSM, VBS, VDD=15V, and VSS=COM unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN, and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Parameter Symbol Min Typ Max VIH 9.5 - - VIL - - 6 VIH 2.5 - - VIL - - 0.8 IO=0A VOH - 1.6 2.5 IO=20mA VOL - - 0.15 VB=VS=600V IHLK - 32 60 Middle Offset Supply Leakage Current Quiescent VBS Supply Current VBM=VSM=600V IMLK - 32 60 VIN=0V or VDD IQBS - 187 310 Quiescent VBMSM Supply Current VIN=0V or VDD IQBMSM - 487 730 Quiescent VCC Supply Current VIN=0V or VDD IQCC - 300 420 Quiescent VDD Supply Current VIN=0V or VDD IQDD - - 1 Logic “1” Input Bias Current VIN=VDD IIN+ - 22 40 Logic “0” Input Bias Current VBS Supply Undervoltage Positive Going Threshold VIN=0V IIN- - - 5 - VBSUV+ 7.5 8.4 9.7 VBS Supply Undervoltage Negative Going Threshold - VBSUV- 7 7.8 9.4 VCC Supply Undervoltage Positive Going Threshold - VCCUV+ 7.4 8.4 9.6 VCC Supply Undervoltage Negative Going Threshold - VCCUV- 7 7.8 9.4 Output High Short Circuit Pulsed Current VO=0V, VIN=VDD , PW10s IO+ 2 - - Output Low Short Circuit Pulsed Current VO=15V, VIN=0V, PW10s IO- 2 - - Logic “1” Input Voltage Logic “0” Input Voltage Logic “1” Input Voltage Logic “0” Input Voltage High-Level Output Voltage, VBIAS-VO Low-Level Output Voltage, VO High Offset Supply Leakage Current R02 Conditions VDD=15V VDD=3V www.ixysic.com Units V V V A A V A 5 IX2120 INTEGRATED CIRCUITS DIVISION 1.8 Test Waveforms 1.8.1 Switching Time Test Circuit VCC=15V 10µF 0.1µF 0.1µF 10 19 2 VDD VCC VB HIN SD VS - CL 4 12 23 10µF 10µF VBM + 13.5V - 22 10µF VSM 24 VSM (0 to 500V/600V) 15 13 LIN VS (0 to 1000V/1200V) HO 0.1µF VSM VB + 13.5V 1 11 VBM 10µF LO CL VSS 14 1.8.2 Input/Output Timing Waveform COM 17 1.8.4 Shutdown Waveform Definitions HIN LIN 50% SD SD tsd HO LO HO LO 1.8.3 Switching Time Waveform Definition HIN LIN ton 50% 50% tr toff 90% HO LO 90% 1.8.5 Delay Matching Waveform Definitions HIN LIN 50% tf LO 50% HO 90% 10% 10% MT 10% MT 90% LO 6 www.ixysic.com HO R02 IX2120 INTEGRATED CIRCUITS DIVISION 1.9 IX2120 Typical Application VHV M1 1200V R11 47 DG2 25V R12 4.7 DR2 1200V CB2 0.33µF 25V IX2120 VDD 1 VS N/C 28 2 VB N/C 27 3 N/C N/C 26 4 HO N/C 25 5 N/C VSM 24 6 N/C VBM 23 7 N/C VSM 22 8 N/C N/C 21 9 N/C N/C 20 10 VDD VCC 19 HIN 11 HIN N/C 18 SD 12 SD COM 17 LIN 13 LIN N/C 16 14 VSS LO 15 C1 1µF 25V DB2 600V RB2 5 RD2 5M DD2 600V CB1 0.33µF 25V RD1 5M RB1 5 VCC DD1 600V DB1 600V C3 1µF 25V M2 1200V R21 47 R22 4.7 DR1 1200V DG1 25V VSS COM The IX2120 is a 1200V half bridge gate driver for high voltage IGBTs and MOSFETs. Three input signals (HIN, LIN, and SD) determine the state of the gate driver outputs (HO and LO). HIN controls HO via a high voltage interface. The high voltage interface is integrated into the bootstrap supply by using two 600V diodes (DD1 and DD2). The high side bootstrap capacitor selection is a function of the switching frequency and the on-time (tONTIME) of the high side source driver. The quiescent VBS current (IQBS) is supplied by bootstrap capacitor CB2, and the quiescent VBMSM supply current (IQBMSM) is supplied by bootstrap capacitor CB1. To insure adequate supply current: A two-stage bootstrap supplies current to the high side and mid level circuitry. The two bootstrap circuits are identical, and careful board layout and positioning of the bootstrap components are required. Resistors RD1 and RD2 form a resistive divider to keep the mid supply very near the center of the high voltage supply range. High value resisters (5M) are recommended to minimize power dissipation. The two-stage bootstrap supply reduces the high side gate drive voltage (VB-VS) by two diode forward voltage drops (2VF). Therefore, the VCC supply range for the application circuit shown is: t ONTIME CB1 I QBS --------------------------------------------------------------------------------------------V CC – V BSUV+ + 2VF + V CE sat M2 and: t ONTIME CB2 I QBMSM --------------------------------------------------------------------------------------------V CC – V BSUV+ + 2VF + V CE sat M2 20V V CC V BSUV+ + 2V F + V CE sat M2 Where VCE(sat)M2 is the saturation voltage of IGBT, M2. R02 www.ixysic.com 7 IX2120 INTEGRATED CIRCUITS DIVISION 2 Typical Performance Data Turn-On Delay Time vs. Temperature 400 300 200 100 0 -50 Turn-On Delay Time (ns) Turn-Off Delay Time (ns) Turn-On Delay Time (ns) 350 500 500 400 300 200 100 -25 0 25 50 75 Temperature (ºC) 100 125 -25 0 25 50 75 Temperature (ºC) 100 150 100 50 10 125 200 100 Shutdown Delay Time (ns) 300 300 250 200 150 100 50 12 14 16 Supply Voltage (V) 18 Turn-On Rise Time vs. Temperature 250 200 150 100 -25 0 25 50 75 Temperature (ºC) 100 0 20 10 0 -25 0 25 50 75 Temperature (ºC) 100 40 30 20 10 125 25 20 15 10 5 -25 0 25 50 75 Temperature (ºC) 100 10 12 14 16 Supply Voltage (V) 18 20 25 20 15 10 5 10 Logic “0” Input Threshold vs. VDD 12 10 8 6 4 2 0 0 30 125 Logic “1” Input Threshold (V) Logic “0” Input Threshold (V) 30 20 0 -50 Turn-Off Fall Time vs. Voltage 35 10 15 Supply Voltage (V) Turn-On Rise Time vs. Voltage 0 -50 5 35 Turn-On Rise Time (ns) Turn-Off Fall Time (ns) 30 50 125 50 40 20 Shutdown Delay Time vs. VDD Supply Voltage Turn-Off Fall Time vs. Temperature 50 18 0 -50 20 14 16 Supply Voltage (V) 300 0 0 10 12 350 350 Shutdown Delay Time (ns) Turn-Off Delay Time (ns) 200 Shutdown Delay Time vs. Temperature 400 Turn-On Rise Time (ns) 250 0 -50 500 Turn-Off Fall Time (ns) 300 0 Turn-Off Delay Time vs. Supply Voltage 8 Turn-On Delay Time vs. Supply Voltage Turn-Off Delay Time vs. Temperature 0 3 6 9 12 VDD (V) 15 www.ixysic.com 18 21 12 14 16 Supply Voltage (V) 18 20 Logic “1” Input Threshold vs. VDD 12 10 8 6 4 2 0 0 3 6 9 12 VDD (V) 15 18 21 R02 IX2120 INTEGRATED CIRCUITS DIVISION 12 9 6 3 15 12 9 6 3 0 25 50 75 Temperature (ºC) 100 100 20 VDD Supply Current (µA) Logic "1" Input Current (µA) 2.0 1.5 1.0 0.5 0.0 -50 125 80 60 40 20 0 -25 0 25 50 75 Temperature (ºC) 100 -50 125 15 10 5 -25 0 25 50 75 Temperature (ºC) 100 125 -25 200 100 0 -50 -25 0 25 50 75 Temperature (ºC) 100 0 25 50 75 Temperature (ºC) 100 300 200 100 -50 125 550 500 450 400 350 300 250 200 150 100 50 0 125 -25 0 25 50 75 Temperature (ºC) 100 10 12 14 16 18 VCC Supply Voltage (V) 0.2 400 300 200 100 20 5 10 15 VDD Supply Voltage (V) 20 VBMSM Supply Current vs. Voltage 600 0 0 125 0.4 0 VBMSM Supply Current (µA) VBS Supply Current (µA) 100 100 0.6 VBS Supply Current vs. Voltage 200 25 50 75 Temperature (ºC) 0.8 125 500 300 0 0.0 VCC Supply Current vs. Voltage 400 -25 VDD Supply Current vs. Voltage 1.0 -50 500 125 400 VDD Supply Current (µA) VBMSM Supply Current (µA) 300 100 500 VBMSM Supply Current vs. Temperature VBS Supply Current vs. Temperature 400 25 50 75 Temperature (ºC) 0 -50 500 0 600 0 -50 -25 VCC Supply Current vs. Temperature VDD Supply Current vs. Temperature VCC Supply Current (µA) -25 Logic "1" Input Current vs. Temperature VBS Supply Current (µA) 2.5 0 -50 VCC Supply Current (µA) 3.0 Logic "0" Input Current (µA) Logic "1" Input Threshold (V) Logic "0" Input Threshold (V) 15 0 R02 Logic "0" Input Current vs. Temperature Logic "1" Input Threshold vs. Temperature Logic "0" Input Threshold vs. Temperature 500 400 300 200 100 0 10 12 14 16 18 VBS Floating Supply Voltage (V) www.ixysic.com 20 10 12 14 16 18 VBMSM Supply Voltage (V) 20 9 IX2120 INTEGRATED CIRCUITS DIVISION High/Middle Supply Leakage Current vs. Temperature 500 40 30 20 10 0 -50 400 10 300 200 9 8 7 100 6 0 -25 0 25 50 75 Temperature (ºC) 100 0 125 100 VCCUVvs. Temperature 200 300 400 Boost Voltage (V) 500 -50 600 10 10 9 8 9 8 6 25 50 75 Temperature (ºC) 100 125 High Level Output Voltage vs. Temperature (IO=0mA) Low Level Output Voltage (V) 5 4 3 2 1 0 -50 -25 0 25 50 75 Temperature (ºC) 100 0 25 50 75 Temperature (ºC) 100 -50 0.4 0.2 0.0 -50 -25 0 25 50 75 Temperature (ºC) 100 1 0 -25 0 25 50 75 Temperature (ºC) 100 125 125 100 125 2 1 -25 0 25 50 75 Temperature (ºC) Output Sink Current vs. Voltage 5 4 3 2 1 0 -50 25 50 75 Temperature (ºC) 3 0 -50 125 Output Sink Current (A) Output Source Current (A) 2 0 4 Output Source Current vs. Voltage 3 -25 5 5 4 100 8 Output Source Current vs. Temperature 0.6 5 125 9 125 0.8 Output Sink Current vs. Temperature Output Sink Current (A) -25 Low Level Output Voltage vs. Temperature (IO=20mA) 1.0 125 100 6 -50 Output Source Current (A) 0 25 50 75 Temperature (ºC) 7 7 6 High Level Output Voltage (V) VBSUV- (V) 10 VBSUV+ (V) 11 VCCUV- (V) 11 -25 0 VBSUVvs. Temperature 11 -50 -25 VBSUV+ vs. Temperature 7 10 11 VCCUV+ (V) Leakage Current (µA) Leakage Current (µA) 50 VCCUV+ vs. Temperature High/Middle Supply Leakage Current vs. VB / VBM Voltage 4 3 2 1 0 10 12 14 16 Supply Voltage (V) www.ixysic.com 18 20 10 12 14 16 Supply Voltage (V) 18 20 R02 IX2120 INTEGRATED CIRCUITS DIVISION Low Level Output Voltage vs. Supply Voltage 5 Low Level Output Voltage (mV) High Level Output Voltage (V) High Level Output Voltage vs. Supply Voltage 4 3 2 1 0 10 R02 12 14 16 Supply Voltage (V) 18 20 200 160 120 80 40 0 10 www.ixysic.com 12 14 16 18 VCC Supply Voltage (V) 20 11 IX2120 INTEGRATED CIRCUITS DIVISION 3 Manufacturing Information 3.1 Moisture Sensitivity All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033. Device Moisture Sensitivity Level (MSL) Classification IX2120B MSL 1 3.2 ESD Sensitivity This product is ESD Sensitive, and should be handled according to the industry standard JESD-625. 3.3 Soldering Profile Provided in the table below is the Classification Temperature (TC) of this product and the maximum dwell time the body temperature of this device may be above (TC - 5)ºC. The classification temperature sets the Maximum Body Temperature allowed for this device during lead-free reflow processes. For through hole devices, and any other processes, the guidelines of J-STD-020 must be observed. Device Classification Temperature (TC) Dwell Time (tp) Max Reflow Cycles IX2120B 260°C 30 seconds 3 3.4 Board Wash IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. Board washing to reduce or remove flux residue following the solder reflow process is acceptable provided proper precautions are taken to prevent damage to the device. These precautions include, but are not limited to: using a low pressure wash and providing a follow up bake cycle sufficient to remove any moisture trapped within the device due to the washing process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature and duration necessary to remove the moisture trapped within the package is the responsibility of the user (assembler). Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be used. Additionally, the device must not be exposed to flux or solvents that are Chlorine- or Fluorine-based. 12 www.ixysic.com R02 IX2120 INTEGRATED CIRCUITS DIVISION 3.5 Mechanical Dimensions 3.5.1 IX2120: 28-Pin SOIC Package 17.70 to 18.10 (0.697 to 0.713) See Note 3 7.40 to 7.60 (0.291 to 0.299) See Note 4 Recommended PCB Land Pattern 9.30 (0.366) 10.00 to 10.65 (0.394 to 0.419) 2.00 (0.079) Pin 1 Identifier 0.31 to 0.51 28x (0.012 to 0.020) 28x 2.35 to 2.65 (0.093 to 0.104) DIMENSIONS MIN to MAX mm (MIN to MAX inches) 0.10 to 0.30 (0.004 to 0.012) 0.10 (0.004) 1.27 26x (0.05) 26x 5º to 15º 4x 1.27 (0.050) 0.25 to 0.75 x 45º (0.010 to 0.030) x 45º See Note 5 Seating Plane 0.60 (0.024) 0.20 to 0.33 (0.008 to 0.013) See Note 6 0.40 to 1.27 (0.016 to 0.050) 0º to 8º Notes: 1. All dimensions are in mm / (inches). 2. This package conforms to JEDEC Standard MS-013, variation AE issue C. 3. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per end. 4. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. 5. This chamfer is optional. If it is not present, then a Pin 1 identifier must be located as shown. 6. The dimension applies to the flat section of the lead between 0.10mm to 0.25mm from the lead tip. 3.5.2 IX2120 Tape & Reel Information P=12.00 (0.472) 330.2 DIA. (13.00 DIA) Top Cover Tape Thickness 0.102 MAX (0.004 MAX) A0=10.90 (0.429) B0=18.30 (0.720) W=24.00+0.03/-0.01 (0.945+0.001/-0.0004) K0=3.20 (0.126) K1=2.70 (0.106) Embossed Carrier Embossment Dimensions mm (inches) Notes: 1. Unless otherwise specified, all dimensional tolerances per EIA standard 481 2. Unless otherwise specified, all dimensions ±0.10 (0.004) For additional information please visit our website at: www.ixysic.com IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice. Specification: DS-IX2120-R02 ©Copyright 2016, IXYS Integrated Circuits Division All rights reserved. Printed in USA. 2/3/2016 R02 www.ixysic.com 13