SMP1325_085LF_201648F.pdf

DATA SHEET
SMP1325-085LF: Surface-Mount PIN Diode for High-Power
Switch Applications
Applications
Anode
(Pin 1)
 Low-loss, high-power switches
Anode
(Pin 3)
 Low-distortion attenuators
Features
Cathode
(Pin 2, Exposed Paddle)
 Low-thermal resistance: 13 °C/W
 Suitable for 100 W continuous wave T/R switches
 Low capacitance: 0.56 pF typical @ 20 V
Figure 1. SMP1325-085LF Block Diagram
 Low distortion performance
 QFN (3-pin, 2 x 2 mm) package
(MSL1, 260 C per JEDEC J-STD-020)
Skyworks GreenTM products are compliant with
all applicable legislation and are halogen-free.
For additional information, refer to Skyworks
Definition of GreenTM, document number
SQ04–0074.
Description
The SMP1325-085LF is a surface-mountable, low-capacitance
silicon PIN diode designed as a shunt connected PIN diode for
high-power, high-volume switch and attenuator applications from
10 MHz to beyond 6 GHz.
Maximum resistance at 100 mA is 0.5 Ω and maximum
capacitance at 20 V is 0.65 pF. The combination of low junction
capacitance, low parasitic inductance, low thermal resistance,
and nominal 100 μm I-region width, makes the SMP1325-085LF
useful in large signal switches and attenuator applications.
The device has a 4.5 W dissipation power rating, making it
capable of handling more than 100 W continuous wave (CW) and
1000 W peak (1 μs pulse, 1 percent duty cycle, TC = 85 °C) in a
shunt-connected transmit/receive (T/R) switch.
Design information for high-power switches can be found in the
Skyworks Application Note, Design With PIN Diodes (document
number 200312).
A block diagram of the SMP1325-085LF is shown in Figure 1.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SMP1325-085LF: SURFACE-MOUNT PIN DIODE
Electrical and Mechanical Specifications
A plot of series resistance versus formard current is shown in
Figure 2.
The absolute maximum ratings of the SMP1325-085LF are
provided in Table 1. Electrical specifications are provided in
Table 2.
Table 1. SMP1325-085LF Absolute Maximum Ratings
Parameter
Symbol
Maximum
Units
VR
200
V
Forward current @ 25 °C
IF
200
mA
CW power dissipation @ 85 °C
PD
4.5
W
Reverse voltage
Minimum
Peak pulse power dissipation @ 85 °C (10% duty cycle)
450
W
Storage temperature
TSTG
–65
+200
C
Operating temperature
TA
–40
+150
C
Note:
Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other
parameters set at or below their nominal value. Exceeding any of the limits listed here may result in permanent damage to the device.
CAUTION: Although this device is designed to be as robust as possible, electrostatic discharge (ESD) can damage this device. This device
must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body
or equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times.
Table 2. SMP1325-085LF Electrical Specifications (Note 1)
(TA = +25 C Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Reverse current
IR
VR = 200 V
Capacitance
CT
f = 1 MHz, VR = 20 V
Resistance
RS
f = 100 MHz
Min
Typical
0.56
IF = 1 mA
IF = 10 mA
IF = 100 mA
8
1.3
0.35
Max
Units
10
μA
0.65
pF
0.50
Ω
Ω
Ω
Forward voltage
VF
IF = 1 mA
0.65
V
Carrier lifetime
TL
IF = 10 mA
5
μs
I region width
W
CW thermal resistance (Note 2)
θJC
μm
100
13
Note 1: Performance is guaranteed only under the conditions listed in this table.
Note 2: Measurement based on a thermal resistance of 92 C/W for the junction-to-bottom of circuit board.
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C/W
DATA SHEET • SMP1325-085LF: SURFACE-MOUNT PIN DIODE
Typical Performance Characteristics
(TA = 25 °C, Unless Otherwise Noted)
Series Resistance (Ω)
100
10
1
0.1
0.1
1
10
100
Forward Current (mA)
Figure 2. Series Resistance vs Current @ 100 MHz
High-Power Switch Design Applications
The SMP1325-085LF PIN diode is designed for shunt applications
such as reflective switches or shunt-diode attenuator circuits.
Compared to other surface-mount packages, the design of the
QFN package produces lower thermal resistance and also reduces
the effects of the parasitic inductance of the anode bond wires.
A cross-sectional view of the SMP1325-085LF PIN diode is shown
in Figure 3. The cathode of the die is soldered directly to the top
of the exposed paddle. This paddle is composed of copper, so its
thermal resistance is very low.
The copper ground paddle minimizes the total thermal resistance
between the I layer, which is the location where most heat is
generated under normal operation, and the surface to which the
package is mounted. Minimal thermal resistance between the I
layer and the external environment minimizes junction
temperature.
The electrically equivalent circuit of the SMP1325-085LF PIN
diode is shown in Figure 4. The inductances of pins 1 and 2, as
well as the inductances of the bond wires are in series with the
input and output transmission lines of the external circuit rather
than the portion of the circuit that contains the shunt PIN diode.
The effects of these parasitic series inductances are negligible,
since they add a very small insertion loss to the shunt PIN but
have no effect on the isolation that the diode produces when it is
forward biased.
A cross section of the suggested printed circuit board design is
shown in Figure 5. The via shown in this view is critical, both for
electrical performance and for thermal performance. It is
recommended that several vias should be placed under the entire
footprint of the exposed paddle (pin 2) to minimize both electrical
inductance to the system ground and thermal resistance to the
system heat sink.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
201648F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • March 13, 2015
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DATA SHEET • SMP1325-085LF: SURFACE-MOUNT PIN DIODE
Bond Wire
(2 Places)
Encapsulated
Epoxy
SMP1325-085LF Die
Anode
(Pin 1)
Cathode
(Pin 2)
Anode
(Pin 3)
Not to scale
S1628g
Figure 3. Cross-Sectional View of the SMP1325-085LF
LSERIES
LSERIES
Pin 3
Pin 1
CPKG
CPKG
SMP1325-085LF
Die
LPADDLE
Pin 2
S1629g
Figure 4. SMP1325-085LF Electrically Equivalent Circuit
SMP1325-085LF
Thermal Via
S1630g
Figure 5. Cross-Sectional View of Suggested Printed Circuit Board
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SMP1325-085LF: SURFACE-MOUNT PIN DIODE
Package Dimensions
Package and Handling Information
The PCB layout footprint for the SMP1325-085LF is shown in
Figure 6. Typical part markings are shown in Figure 7. Package
dimensions for the 3-pin QFN are provided in Figure 8, and
Figure 9 provides the tape and reel dimensions.
Instructions on the shipping container label regarding exposure to
moisture after the container seal is broken must be followed.
Otherwise, problems related to moisture absorption may occur
when the part is subjected to high temperature during solder
assembly.
The SMP1325-085LF is rated to Moisture Sensitivity Level 1
(MSL1) at 260 C. It can be used for lead or lead-free soldering.
For additional information, refer to the Skyworks Application Note,
Solder Reflow Information, document number 200164.
Care must be taken when attaching this product, whether it is
done manually or in a production solder reflow environment.
Production quantities of this product are shipped in a standard
tape and reel format.
2X 0.60
Part Outline
2X 0.55
Exposed Soldering
Area Typ.
2X 0.27
Pin 3
2X 0.85
Pin 1
Pin 2
R0.20
2X 0.25
S2923
Figure 6. SMP1325-085LF PCB Layout Footprint
RH
Skyworks Part #
3
3
1
Orientation
Indicator
1
Figure 7. Typical Part Markings
(Top View)
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SMP1325-085LF: SURFACE-MOUNT PIN DIODE
0.5 ± 0.15
2 ± 0.2
Exposed Pad
Detail B
2 ± 0.2
1.7 ± 0.15
1
3
2
0.90 ± 0.1
Orientation
Indicator
Top View
Side View
Bottom View
1
3
0.4 ± 0.1
2
0.27 ± 0.15
Detail B
All dimensions in millimeters
S1632
Figure 8. SMP1325-085LF QFN Package Dimension Drawing
∅1.50+ 0.10/–0.00
0.30 ± 0.05 (T)
Pin #1
4.00 ± 0.10
2.00 ± 0.05
4.00 (see Note 4)
1.75 ± 0.10
2.30 (Bo)
A
B
1.00 (Ko)
2.30 (Ao)
8.00 +0.30/–0.10
A
3.50 ± 0.05
B
∅1.00 Min.
R0.30 Typ.
B
Notes:
1. Carrier tape: black conductive polystyrene.
2. Cover tape material: transparent conductive HSA.
3. Cover tape size: 5.40 mm width.
4. Ten sprocket hole pitch cumulative tolerance = ±0.20 mm.
5. ESD surface resistivity is ≤1 x 108 Ohms/square per EIA, JEDEC
tape and reel specification.
6. Ao and Bo measurement point to be 0.30 mm from bottom pocket.
7. All measurements are in millimeters.
A
S1601
Figure 9. SMP1325-085LF Tape and Reel Dimensions
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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March 13, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201648F
DATA SHEET • SMP1325-085LF: SURFACE-MOUNT PIN DIODE
Ordering Information
Model Name
SMP1325-085LF: Surface-Mount PIN Diode
Manufacturing Part Number
SMP1325-085LF
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Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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