DCK12S0A0S30

DCK12S0A0S30NFA
FEATURES
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High efficiency:
92.8% @ 12Vin, 3.3V/30A out
89.5% @ 12Vin, 1.8V/30A out
85.5% @ 12Vin, 1.2V/30A out
80.5% @ 12Vin, 0.8V/30A out
Small size and low profile:
33.0mm x 13.5mm x 10.0mm
Surface mount packaging
Standard footprint
Voltage and resistor-based trim
Pre-bias startup
Output voltage tracking
No minimum load required
Output voltage programmable from
0.8Vdc to 3.3 Vdc via external resistor
Fixed frequency operation
Input UVLO, Output OCP
Remote on/off
Remote sense
Option- Parallel operation
ISO 9001, TL 9000, ISO 14001, QS9000,
OHSAS18001 certified manufacturing facility
UL/cUL 60950-1 (US & Canada)
CE mark meets 73/23/EEC and 93/68/EEC
directives
Delphi DCL, Non-Isolated Point of Load
DC/DC Power Modules: 6~14Vin,
0.8V-3.3V/30Aout
The Delphi Series DCK, 6-14V input, single output, non-isolated Point
OPTIONS

Negative/Positive on/off logic

Vo Tracking feature
of Load DC/DC converters are the latest offering from a world leader in
power systems technology and manufacturing -- Delta Electronics, Inc.
The DCK series provides a programmable output voltage from 0.8 V to
3.3 V using an external resistor and has flexible and programmable
tracking features to enable a variety of startup voltages as well as
APPLICATIONS

Telecom / DataCom
surface mount and provides up to 30A of output current in an industry

Distributed power architectures
standard footprint. With creative design technology and optimization of

Servers and workstations
component placement, these converters possess outstanding electrical

LAN / WAN applications
and thermal performance, as well as extremely high reliability under

Data processing applications
tracking between power modules. This product family is available in
highly stressful operating conditions.
DATASHEET
DS_DCK12S0A0S30NFA_03312016
E-mail: [email protected]
http://www.deltaww.com/dcdc
P1
TECHNICAL SPECIFICATIONS
(TA = 25°C, airflow rate = 300 LFM, Vin = 6Vdc and 14.0Vdc, nominal Vout unless otherwise noted.)
PARAMETER
NOTES and CONDITIONS
DCK12S0A0S30NFA
Min.
ABSOLUTE MAXIMUM RATINGS
Input Voltage (Continuous)
Sequencing Voltage
Operating Ambient Temperature
Storage Temperature
INPUT CHARACTERISTICS
Operating Input Voltage
Operating Input Voltage
Input Under-Voltage Lockout
Turn-On Voltage Threshold
Turn-Off Voltage Threshold
Lockout Hysteresis Voltage
Maximum Input Current
No-Load Input Current (Io = 0, module
enabled)
Off Converter Input Current
Inrush Transient
Input Reflected Ripple Current, peak-to-peak
Output Voltage is 0.8V~2.0V
Output Voltage is 2.0V~3.3V
Max.
Units
-0.3
-0.3
15
Vin max
V
V
-40
-55
85
125
℃
℃
14
14
V
6
10
Typ.
12
12
5.4
5.0
0.4
Vin=6V to14V, Io=Io,max
Vin= 12V, Vo,set = 0.8 Vdc
Vin= 12V, Vo,set = 3.3 Vdc
(VIN = 12.0Vdc, module disabled)
180
280
19
(5Hz to 20MHz, 1μH source impedance; Vin = 0 to 14V,
Io=Iomax ;
100
30
1
V
V
V
A
mA
mA
mA
A2S
mAp-p
OUTPUT CHARACTERISTICS
Output Voltage Set Point
Output Voltage Adjustable Range
Output Voltage Regulation
Line(VIN=VIN, min to VIN, max)
Load(Io=Io, min to Io, max)
Temperature(Tref=TA, min to TA, max)
Total Output Voltage Range
Output Voltage Ripple and Noise
Peak-to-Peak
RMS
Output Current Range
Output Voltage Over-shoot at Start-up
Output DC Current-Limit Inception
DYNAMIC CHARACTERISTICS
Dynamic Load Response
Positive Step Change in Output Current
Negative Step Change in Output Current
Settling Time(within 1.5%Vout normal)
Turn-On Transient
Start-Up Time, From On/Off Control
Start-Up Time, From Input
Output Voltage Rise Time
Output Capacitive Load
EFFICIENCY
Vo=3.3V
Vo=1.8V
Vo=1.2V
Vo=0.8V
FEATURE CHARACTERISTICS
Switching Frequency
ON/OFF Control, (Logic High, Module off)
Input High Current
Input High Voltage
ON/OFF Control, (Logic Low,
Module on)
Input Low Current
Input Low Voltage
Tracking Slew Rate Capability
Tracking Delay Time
Tracking Accuracy
Forced Load Share Accuracy
Number of units in Parallel
GENERAL SPECIFICATIONS
MTBF
Weight
DS_DCK12S0A0S30NFA_03312016
with 0.5% tolerance for external resistor used to set
output voltage)
(selected by an external resistor)
-1.5
+1.5
%Vo,set
0.8
Vo,set
3.3
V
-2.5
+/-10
+/-10
1
+2.5
mV
mV
%Vo,set
%Vo,set
Vo,set
0.5
Over sample load, line and temperature
5Hz to 20MHz bandwidth
Vin= Vin nominal, Io=Io,min to Io,max, Co= 1µF+10uF
ceramic,
Vin= Vin nominal, Io=Io,min to Io,max, Co= 1µF+10uF
ceramic,
75
mV
25
mV
30
5
200
A
% Vo,set
% Io
300
300
50
mV
mV
µs
2
2
1
ms
ms
ms
µF
0
10µF Tan & 1µF Ceramic load cap, 2.5A/µs
50% Io, max to 100% Io, max
100% Io, max to 50% Io, max
Io=Io.max
Time for Von/off to Vo=10% of Vo,set
Time for Vin=Vin,min to Vo=10% of Vo,set
Time for Vo to rise from 10% to 90% of Vo,set
Full load; ESR ≧0.15mΩ
1000
Vin=12V, 100% Load
Vin=12V, 100% Load
Vin=12V, 100% Load
Vin=12V, 100% Load
92.8
89.5
85.5
80.5
%
%
%
%
370
kHz
3
-0.3
Delay from Vin.min to application of tracking voltage
Power-up
2V/mS
Power-down 1V/mS
*Option for code B (current sharing)
*Option for code B (current sharing)
10
Io=80% of Io, max; Ta=25°C
2
-
100
200
10
300
Vin,max
uA
V
20
0.7
0.5
uA
V
V/msec
ms
mV
mV
% Io
unit
200
400
2
M hours
6.9
grams
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P2
ELECTRICAL CHARACTERISTICS CURVES
Figure 1: Converter efficiency vs. output current (Vout= 0.8V)
Figure 2: Converter efficiency vs. output current (1.2V out)
Figure 3: Converter efficiency vs. output current (1.8V out)
Figure 4: Converter efficiency vs. output current (2.5V out)
Figure 5: Converter efficiency vs. output current 3.3V out)
DS_DCK12S0A0S30NFA_03312016
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P3
ELECTRICAL CHARACTERISTICS CURVES (CON.)
Figure 6: Output ripple & noise at 12Vin, 0.8V/30A out
CH1:VOUT, 20mV/div, 2uS/div
Figure 7: Output ripple & noise at 12Vin, 1.2V/30A out
CH1:VOUT, 20mV/div, 2uS/div
Figure 8: Output ripple & noise at 12Vin, 1.8V/30A out
CH1:VOUT, 20mV/div, 2uS/div
Figure 9: Output ripple & noise at 12Vin, 2.5V/30A out
CH1:VOUT, 20mV/div, 2uS/div
Figure 10: Output ripple & noise at 12Vin, 3.3V/30A out
CH1:VOUT, 20mV/div, 2uS/div
DS_DCK12S0A0S30NFA_03312016
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P4
ELECTRICAL CHARACTERISTICS CURVES (CON.)
Figure 11: Turn on delay time at 12Vin, 0.8V/30A out.
(Green : VOUT, 0.5V/div, Yellow: VIN, 5V/div. 1mS/div)
Figure 12: Turn on delay time at 12Vin, 1.2V/30A out.
(Green : VOUT, 0.5V/div, Yellow: VIN, 5V/div. 1mS/div)
Figure 13: Turn on delay time at 12Vin, 1.8V/30A out.
(Green : VOUT, 0.5V/div, Yellow: VIN, 5V/div. 1mS/div)
Figure 14: Turn on delay time at 12Vin, 2.5V/30A out.
(Green : VOUT, 0.5V/div, Yellow: VIN, 5V/div. 1mS/div)
(Yellow : VOUT, 0.2V/div, Green: VIN, 5V/div. 2mS/div)
Figure 15: Turn on delay time at 12Vin, 3.3V/30A out.
(Green : VOUT, 1V/div, Yellow: VIN, 5V/div. 2mS/div)
DS_DCK12S0A0S30NFA_03312016
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P5
ELECTRICAL CHARACTERISTICS CURVES (CON.)
Figure 16: Turn on delay time at remote on 12Vin, 0.8V/30A out.
(Green: VOUT, 0.5V/div, Yellow: ON/OFF, 2V/div, 1mS/div)
Figure17: Turn on delay time at remote on 12Vin, 1.2V/30A out.
(Green: VOUT, 0.5V/div, Yellow: ON/OFF, 2V/div, 1mS/div)
Figure 18: Turn on delay time at remote on 12Vin, 1.8V/30A out.
(Green: VOUT, 0.5V/div, Yellow: ON/OFF, 2V/div, 1mS/div)
Figure 19: Turn on delay time at remote on 12Vin, 2.5V/30A
out. (Green: VOUT, 1V/div, Yellow: ON/OFF, 2V/div, 1mS/div)
Figure 20: Turn on delay time at remote on 12Vin, 3.3V/30A out.
(Green: VOUT, 1V/div, Yellow: ON/OFF, 2V/div, 1mS/div)
DS_DCK12S0A0S30NFA_03312016
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P6
ELECTRICAL CHARACTERISTICS CURVES
Figure 21: Transient response to dynamic load change at
2.5A/μS from 50%~ 100%~50% of Io, max at 12Vin, 0.8Vout
(Cout = 1uF ceramic, 47uF*2 +10μF ceramic)
Yellow : VOUT, 0.2V/div, 100uS/div
Figure 22: Transient response to dynamic load change at
2.5A/μS from 50%~ 100%~50% of Io, max at 12Vin, 1.2Vout
(Cout = 1uF ceramic, 47uF*2 +10μF ceramic)
Yellow : VOUT, 0.2V/div, 100uS/div
Figure 23: Transient response to dynamic load change at
2.5A/μS from 50%~ 100%~50% of Io, max at 12Vin, 1.8Vout
(Cout = 1uF ceramic, 47uF*2 +10μF ceramic)
Yellow : VOUT, 0.1V/div, 100uS/div
Figure 24: Transient response to dynamic load change at
2.5A/μS from 50%~ 100%~50% of Io, max at 12Vin, 2.5Vout
(Cout = 1uF ceramic, 47uF*2 +10μF ceramic)
Yellow : VOUT, 0.1V/div, 100uS/div
Figure 25: Transient response to dynamic load change at
2.5A/μS from 50%~ 100%~50% of Io, max at 12Vin, 3.3Vout
(Cout = 1uF ceramic, 47uF*2 +10μF ceramic)
Yellow : VOUT, 0.1V/div, 100uS/div
DS_DCK12S0A0S30NFA_03312016
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P7
ELECTRICAL CHARACTERISTICS CURVES (CON.)
Figure 26:Tracking function, Vtracking=1V, Vout= 0.8V, full load
Yellow : VOUT, (0.2V/div), Green: Tracking, (0.2V/div), 2mS/div
Figure 27:Tracking function, Vtracking=1V, Vout= 0.8V, full load
Yellow : VOUT, (0.2V/div), Green: Tracking, (0.2V/div), 20mS/div
Figure 28:Tracking function, Vtracking=4V, Vout= 3.3V, full load
Yellow: VOUT, 1V/div, Green : Tracking, 1V/div, 20mS/div
Figure 29:Tracking function, Vtracking=4V, Vout= 3.3V, full load
Yellow: VOUT, 1V/div, Green : Tracking, 1V/div, 20mS/div
DS_DCK12S0A0S30NFA_03312016
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P8
TEST CONFIGURATIONS
DESIGN CONSIDERATIONS
Input Source Impedance
To maintain low noise and ripple at the input voltage, it is
critical to use low ESR capacitors at the input to the module. A
highly inductive source can affect the stability of the module.
An input capacitance must be placed close to the modules
input pins to filter ripple current and ensure module stability in
the presence of inductive traces that supply the input voltage to
the module.
Safety Considerations
For safety-agency approval the power module must be
Figure 30: Input reflected-ripple current test setup
installed in compliance with the spacing and separation
requirements of the end-use safety agency standards.
For the converter output to be considered meeting the
requirements of safety extra-low voltage (SELV), the input
must meet SELV requirements. The power module has
extra-low voltage (ELV) outputs when all inputs are ELV.
The input to these units is to be provided with a fast acting fuse
Note: Use a 10μF and 1μF capacitor. Scope measurement should
be made using a BNC connector.
with a maximum rating of 30A in the positive input lead.
Figure 31: Peak-peak output noise and startup transient
measurement test setup.
CONTACT AND
DISTRIBUTION LOSSES
VI
Vo
II
Io
LOAD
SUPPLY
GND
CONTACT RESISTANCE
Figure 32: Output voltage and efficiency measurement test
setup
Note: All measurements are taken at the module terminals. When
the module is not soldered (via socket), place Kelvin
connections at module terminals to avoid measurement
errors due to contact resistance.
(
Vo  Io
)  100 %
Vi  Ii
DS_DCK12S0A0S30NFA_03312016
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P9
FEATURES DESCRIPTIONS
Input Under voltage Lockout
At input voltages below the input under voltage lockout limit, the
Remote On/Off
module operation is disabled. The module will begin to operate at
The DCK series power modules have an On/Off pin for remote
an input voltage above the under voltage lockout turn-on threshold.
On/Off operation. Both positive and negative On/Off logic
Over-Current Protection
options are available in the DCK series power modules.
To provide protection in an output over load fault condition, the unit
For positive logic module, connect an open collector (NPN)
transistor or open drain (N channel) MOSFET between the
On/Off pin and the GND pin (see figure 33). Positive logic On/Off
is equipped with internal over-current protection. When the
over-current protection is triggered, the unit enters hiccup mode.
The units operate normally once the fault condition is removed.
signal turns the module ON during the logic high and turns the
module OFF during the logic low. When the positive On/Off
Remote Sense
function is not used, leave the pin floating or tie to Vin (module
The DCK series provide Vo remote sensing to achieve proper
will be On).
regulation at the load points and reduce effects of distribution
For negative logic module, the On/Off pin is pulled high with an
losses on output line. In the event of an open remote sense line,
external pull-up 5kΩ resistor (see figure 34). Negative logic
the module shall maintain local sense regulation through an
On/Off signal turns the module OFF during logic high and turns
internal resistor. The module shall correct for a total of 0.5V of loss.
the module ON during logic low. If the negative On/Off function
The remote sense line impedance shall be < 10.
is not used, leave the pin floating or tie to GND. (module will be
Distribution Losses
on)
Vo
Vin
Vo
V in
Distribution Losses
Sense
RL
I O N /O F F
O n/O ff
RL
Q1
GND
GND
Distribution
Losses
Figure 33: Positive remote On/Off implementation
Distribution
Losses
Figure 35: Effective circuit configuration for remote sense
operation
Vo
V in
R pullup
I O N /O FF
O n/O ff
RL
Q1
GND
Figure 34: Negative remote On/Off implementation
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P10
FEATURES DESCRIPTIONS (CON.)
Table 1 provides Rtrim values required for some common
output voltages. By using a ±0.5% tolerance trim resistor with a
Output Voltage Programming
TC of ±100ppm, a set point tolerance of ±1.5% can be
achieved as specified in the electrical specification.
The output voltage of the DCK can be programmed to any
voltage between 0.8Vdc and 3.3Vdc by connecting one resistor
(shown as Rtrim in Figure 36) between the TRIM and GND pins
of the module. Without this external resistor, the output voltage of
the module is 0.8 Vdc. To calculate the value of the resistor Rtrim
for a particular output voltage Vo, please use the following
equation:
 8000 
Rtrim  

Vo  0.8 
Rtrim is the external resistor in Ω
Vo is the desired output voltage.
For example, to program the output voltage of the DCK module to
3.3Vdc, Rtrim is calculated as follows:
 8000 
Rtrim  
  3,200
 3.3  0.8 
Figure 36: Circuit configulation for programming output voltage
using an external resister.
DS_DCK12S0A0S30NFA_03312016
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P11
FEATURE DESCRIPTIONS (CON.)
Voltage Margining
When an analog voltage is applied to the SEQ pin, the output
voltage tracks this voltage until the output reaches the
set-point voltage. The final value of the SEQ voltage must be
Output voltage margining can be implemented in the DCK
set higher than the set-point voltage of the module. The output
modules by connecting a resistor, R margin-up, from the Trim pin
voltage follows the voltage on the SEQ pin on a one-to-one
to the ground pin for margining-up the output voltage and by
basis. By connecting multiple modules together, multiple
connecting a resistor, Rmargin-down, from the Trim pin to the
modules can track their output voltages to the voltage applied
output pin for margining-down. Figure 37 shows the circuit
on the SEQ pin.
configuration for output voltage margining. If unused, leave the
For proper voltage sequencing, first, input voltage is applied to
trim pin unconnected. A calculation tool is available from the
the module. The On/Off pin of the module is left unconnected
evaluation procedure which computes the values of Rmargin-up
(or tied to GND for negative logic modules or tied to VIN for
and Rmargin-down for a specific output voltage and margin
positive logic modules) so that the module is ON by default.
percentage.
After applying input voltage to the module, a minimum 10msec
delay is required before applying voltage on the SEQ pin. This
delay gives the module enough time to complete its internal
power-up soft-start cycle. During the delay time, the SEQ pin
should be held close to ground (nominally 50mV ± 20 mV).
This is required to keep the internal op-amp out of saturation
thus preventing output overshoot during the start of the
sequencing ramp. By selecting resistor R1 (see Figure. 39)
according to the following equation
 24950 
R1  

Vin  0.05 
Figure 37: Circuit configuration for output voltage margining
Output Voltage Sequencing
The DCK 12V 30A modules include a sequencing feature that
enables users to implement various types of output voltage
sequencing in their applications. This is accomplished via an
additional sequencing pin. When not using the sequencing
Figure 38: Sequential Start-up
feature, either tie the SEQ pin to VIN or leave it unconnected.
The voltage at the sequencing pin will be 50mV when the
sequencing signal is at zero.
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P12
FEATURE DESCRIPTIONS (CON.)
Monotonic Start-up and Shutdown
After the 10msec delay, an analog voltage is applied to the SEQ
The DCK 30A modules have monotonic start-up and shutdown
pin and the output voltage of the module will track this voltage on
behavior for any combination of rated input voltage, output
a one-to-one volt bases until the output reaches the set-point
current and operating temperature range.
voltage. To initiate simultaneous shutdomwn of the odules, the
SEQ pin voltage is lowered in a controlled manner. The output
Active Load Sharing (-P Option)
voltage of the modules tracks the voltages below their set-point
For additional power requirements, The DCK 12V 30A
voltages on a one-to-one basis. A valid input voltage must be
modules is also available with a parallel option. Up to two
maintained until the tracking and output voltages reach ground
modules can be configured, in parallel, with active load
potential.
sharing.
When using the sequencing feature to control start-up of the
Good layout techniques should be observed when using
module, pre-bias immunity during startup is disabled. The
multiple units in parallel. To implement forced load sharing, the
pre-bias immunity feature of the module relies on the module
following connections should be made:
being in the diode-mode during start-up. When using the
• The share pins of all units in parallel must be connected
sequencing feature, modules goes through an internal set-up
together. The path of these connections should be as direct as
time of 10msec, and will be in synchronous rectification mode
possible.
when the voltage at the SEQ pin is applied. This will result in the
• All remote-sense pins should be connected to the power
module sinking current if a pre-bias voltage is present at the
bus at the same point, i.e., connect all the SENSE(+) pins to
output of the module.
the (+) side of the bus. Close proximity and directness are
necessary for good noise immunity
Some special considerations apply for design of converters in
parallel operation:
• When sizing the number of modules required for parallel
operation, take note of the fact that current sharing has some
tolerance. In addition, under transient condtions such as a
dynamic load change and during startup, all converter output
currents will not be equal. To allow for such variation and
avoid the likelihood of a converter shutting off due to a current
overload,we suggest that the total capacity of the paralleled
system should be no more than 50% of the sum of the
Figure 39: Circuit showing connection of the sequencing signal
individual converters during startup. And we suggest
the
to the SEQ pin.
total capacity of the paralleled system should be no more than
90% of the sum of the individual converters after startup. As
an example, for a system of two DCK 30A modules in parallel,
the total current drawn should be less than 30A during
startup.And the total current drawn should be less than 54A
Simultaneous
DS_DCK12S0A0S30NFA_03312016
Simultaneous tracking (Figure 41) is implemented by
using the TRACK pin. The objective is to minimize the
voltage difference between the power supply outputs
after startup.
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P13
• All modules should be turned on and off together. This is so
that all modules come up at the same time avoiding the
problem of one converter sourcing current into the other
leading to an overcurrent trip condition. To ensure that all
modules come up simultaneously, the on/off pins of all
paralleled converters should be tied together and the
converters enabled and disabled using the
on/off pin.
• The share bus is not designed for redundant operation and
the system will be non-functional upon failure of one of the unit
when multiple units are in parallel. In particular, if one of the
converters shuts down during operation, the other converters
may also shut down due to their outputs hitting current limit. In
such a situation, unless a coordinated restart is ensured, the
system may never properly restart since different converters
will try to restart at different times causing an overload
condition and subsequent shutdown. This situation can be
avoided by having an external output voltage monitor circuit
that detects a shutdown condition and forces all converters to
shut down and restart together.
• When not using the active load sharing feature, share pins
should be left unconnected.
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P14
THERMAL CONSIDERATIONS
THERMAL CURVES
Thermal management is an important part of the system
design. To ensure proper, reliable operation, sufficient cooling
of the power module is needed over the entire temperature
range of the module. Convection cooling is usually the
dominant mode of heat transfer.
Hence, the choice of equipment to characterize the thermal
performance of the power module is a wind tunnel.
Thermal Testing Setup
AIRFLOW
Delta’s DC/DC power modules are characterized in heated
vertical wind tunnels that simulate the thermal environments
encountered in most electronics equipment. This type of
equipment commonly uses vertically mounted circuit cards in
cabinet racks in which the power modules are mounted.
Figure 41: Temperature measurement location
The allowed maximum hot spot temperature is defined at 110℃
Output Current(A)
The following figure 40 shows the wind tunnel characterization
DCK12S0A0S30NFA Output Current vs. Ambient Temperature and Air Velocity
@Vin = 12V, Vout=0.8V (Airflow From Pin2 To Pin3)
30
setup. The power module is mounted on a test PWB and is
Natural
Convection
25
vertically positioned within the wind tunnel.
100LFM
20
200LFM
Thermal Derating
15
Heat can be removed by increasing airflow over the module.
To enhance system reliability, the power module should
always
be
operated
below
the
maximum
operating
10
5
temperature. If the temperature exceeds the maximum module
temperature, reliability of the unit may be affected.
PWB
FANCING PWB
0
25
30
35
40
45
50
55
60
65
70
75
80
85
Ambient Temperature (℃)
Figure 42: Output current vs. ambient temperature and air
[email protected]=12V, Vout=0.8V(Airflow direction refer to figure 41)
MODULE
Output Current(A)
DCK12S0A0S30NFA Output Current vs. Ambient Temperature and Air Velocity
@Vin = 12V, Vout=1.2V (Airflow From Pin2 To Pin3)
30
Natural
Convection
25
AIR VELOCITY
AND AMBIENT
TEMPERATURE
SURED BELOW
THE MODULE
20
50.8(2.00")
100LFM
AIR FLOW
15
200LFM
10
5
Note: Wind Tunnel Test Setup Figure Dimensions are in millimeters and (Inches)
0
25
Figure 40: Wind tunnel test setup
DS_DCK12S0A0S30NFA_03312016
30
35
40
45
50
55
60
65
70
75
80
85
Ambient Temperature (℃)
Figure 43: Output current vs. ambient temperature and air
[email protected]=12V, Vout=1.2V(Airflow direction refer to figure 41)
E-mail: [email protected]
http://www.deltaww.com/dcdc
P15
THERMAL CURVES
Output Current(A)
DCK12S0A0S30NFA Output Current vs. Ambient Temperature and Air Velocity
@Vin = 12V, Vout=1.8V (Airflow From Pin2 To Pin3)
30
25
Natural
Convection
20
100LFM
15
200LFM
10
300LFM
400LFM
5
0
25
30
35
40
45
50
55
60
65
70
75
80
85
Ambient Temperature (℃)
Figure 44: Output current vs. ambient temperature and air
[email protected]=12V, Vout=1.8V(Airflow direction refer to figure 41)
Output Current(A)
DCK12S0A0S30NFA Output Current vs. Ambient Temperature and Air Velocity
@Vin = 12V, Vout=2.5V (Airflow From Pin2To Pin3)
30
25
Natural
Convection
100LFM
20
200LFM
15
300LFM
400LFM
10
500LFM
600LFM
5
0
25
30
35
40
45
50
55
60
65
70
75
80
85
Ambient Temperature (℃)
Figure 45: Output current vs. ambient temperature and air
[email protected]=12V, Vout=2.5V(Airflow direction refer to figure 41)
Output Current(A)
DCK12S0A0S30NFA Output Current vs. Ambient Temperature and Air Velocity
@Vin = 12V, Vout=3.3V (Airflow From Pin2 To Pin3)
30
Natural
Convection
25
100LFM
20
200LFM
300LFM
15
400LFM
10
500LFM
600LFM
5
0
25
30
35
40
45
50
55
60
65
70
75
80
85
Ambient Temperature (℃)
Figure 46: Output current vs. ambient temperature and air
[email protected]=12V, Vout=3.3V(Airflow direction refer to figure 41)
DS_DCK12S0A0S30NFA_03312016
E-mail: [email protected]
http://www.deltaww.com/dcdc
P16
PICK AND PLACE LOCATION
RECOMMENDED PAD LAYOUT
SURFACE-MOUNT TAPE & REEL
DS_DCK12S0A0S30NFA_03312016
E-mail: [email protected]
http://www.deltaww.com/dcdc
P17
LEAD (Sn/Pb) PROCESS RECOMMEND TEMP. PROFILE
Note: The temperature refers to the pin of DCK, measured on the pin Vout joint.
LEAD FREE (SAC) PROCESS RECOMMEND TEMP. PROFILE
Temp.
Peak Temp. 240 ~ 245 ℃
220℃
Ramp down
max. 4℃ /sec.
200℃
150℃
Preheat time
90~120 sec.
Time Limited 75 sec.
above 220℃
Ramp up
max. 3℃ /sec.
25℃
Time
Note: The temperature refers to the pin of DCK, measured on the pin Vout joint.
DS_DCK12S0A0S30NFA_03312016
E-mail: [email protected]
http://www.deltaww.com/dcdc
P18
MECHANICAL DRAWING
All pins are copper alloy with matte-tin(Pb free) plated over Nickel underplating.
DS_DCK12S0A0S30NFA_03312016
E-mail: [email protected]
http://www.deltaww.com/dcdc
P19
PART NUMBERING SYSTEM
DCK
12
S
0A0
S
30
N
F
Product
Series
Input
Voltage
Numbers
of Outputs
Output
Voltage
Package
Type
Output
Current
On/Off
logic
DCK – 30A
12 – 6V~14V
S - Single
0A0 Programmabl
e
S - SMD
30 – 30A
N- negative
P- positive
A
Option Code
F- RoHS 6/6
(Lead Free)
A = extra ground pin,
without current sharing
(without pin9)
C = extra ground pin,
without current sharing
(without pin9)
D = extra ground pin, with
current sharing(with all
pins)
MODEL LIST
Model Name
Packaging
Input Voltage
Output Voltage
Output Current
Efficiency
12Vin, 3.3Vdc @ 30A
DCK12S0A0S30NFA
SMD
6V ~ 14Vdc
0.8V~ 3.3Vdc
30A
92.8%
CONTACT: www.deltaww.com/dcdc
Email: [email protected]
USA:
Telephone:
East Coast: 978-656-3993
West Coast: 510-668-5100
Fax: (978) 656 3964
Europe:
Telephone: +31-20-655-0967
Fax: +31-20-655-0999
Asia & the rest of world:
Telephone: +886 3 4526107 x6220~6224
Fax: +886 3 4513485
WARRANTY
Delta offers a two (2) year limited warranty. Complete warranty information is listed on our web site or is
available upon request from Delta.
Information furnished by Delta is believed to be accurate and reliable. However, no responsibility is assumed by
Delta for its use, nor for any infringements of patents or other rights of third parties, which may result from its
use. No license is granted by implication or otherwise under any patent or patent rights of Delta. Delta reserves
the right to revise these specifications at any time, without notice .
DS_DCK12S0A0S30NFA_03312016
E-mail: [email protected]
http://www.deltaww.com/dcdc
P20