IDT7014S HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • True Dual-Ported memory cells which allow simultaneous access of the same memory location • High-speed access — Military: 20/25/35ns (max.) — Commercial: 12/15/20/25ns (max.) • Low-power operation — IDT7014S Active: 900mW (typ.) • Fully asynchronous operation from either port • TTL-compatible; single 5V (±10%) power supply • Available in 52-pin PLCC and a 64-pin TQFP • Industrial temperature range (–40°C to +85°C) is available, tested to military electrical specifications The IDT7014 is an extremely high-speed 4K x 9 Dual-Port Static RAM designed to be used in systems where on-chip hardware port arbitration is not needed. This part lends itself to high-speed applications which do not need on-chip arbitration to manage simultaneous access. The IDT7014 provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. See functional description. The IDT7014 utilitizes a 9-bit wide data path to allow for parity at the user's option. This feature is especially useful in data communication applications where it is necessary to use a parity bit for transmission/reception error checking. Fabricated using IDT’s high-performance technology, the IDT7014 Dual-Ports typically operate on only 900mW of power at maximum access times as fast as 12ns. The IDT7014 is packaged in a 52-pin PLCC and a 64-pin thin plastic quad flatpack (TQFP). FUNCTIONAL BLOCK DIAGRAM WL WR R/ R/ OEL OER COLUMN CONTROL I/O0L- I/O8L A0L- A11L LEFT SIDE ADDRESS DECODE LOGIC COLUMN CONTROL MEMORY ARRAY I/O0R- I/O8R RIGHT SIDE ADDRESS DECODE LOGIC A0R- A11R 2528 drw 01 The IDT logo is a registereed trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES ©1996 Integrated Device Technology, Inc. For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391. 6.11 OCTOBER 1996 DSC-2528/6 1 IDT7014S HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS(1,2) ABSOLUTE MAXIMUM RATINGS (1) A5L A4L A3L A2L A1L A0L A0R A1R A2R A3R A4R A5R A6R Symbol INDEX 7 6 5 4 3 2 52 51 50 49 48 47 1 8 46 45 9 10 44 11 43 12 42 IDT 7014 13 41 J52-1 PLCC 14 40 15 39 Top View (3) 16 38 17 37 18 36 19 35 20 34 21 22 23 24 25 26 27 28 29 30 31 32 33 A6L A7L A8L A9L A10L A11L OEL VCC R/ L GND I/O8L I/O7L I/O6L OER GND R/ R GND I/O8R I/O7R I/O6R I/O5R W I/O5L VCC I/O4L I/O3L I/O2L I/O1L I/O0L I/O0R I/O1R I/O2R I/O3R VCC I/O4R W A7R A8R A9R A10R A11R N/C VCC N/C R/ L N/C GND I/O8L I/O7L I/O6L 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 Top View (3) 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 I/O5L VCC I/O4L I/O3L I/O2L I/O1L I/O0L GND GND I/O0R I/O1R I/O2R I/O3R VCC I/O4R I/O5R W IDT7014 PN64-1 TQFP 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 OEL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Military Unit –0.5 to +7.0 –0.5 to +7.0 V VTERM(3) Terminal Voltage –0.5 to Vcc –0.5 to Vcc V TA Operating Temperature 0 to +70 TBIAS Temperature Under Bias –55 to +125 –65 to +135 TSTG Storage Temperature –55 to +125 –65 to +150 °C IOUT DC Output Current 50 –55 to +125 °C 50 °C mA RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE INDEX A6L A7L A8L A9L A10L A11L Rating NOTES: 2528 tbl 01 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed Vcc + 0.5V for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of VTERM > Vcc + 0.5V. A5L A4L A3L A2L A1L A0L N/C N/C N/C N/C A0R A1R A2R A3R A4R A5R 2528 drw 02 Commercial VTERM(2) Terminal Voltage with Respect to GND A6R A7R A8R A9R A10R A11R Grade Ambient Temperature GND VCC Military –55°C to +125°C 0V 5.0V ± 10% Commercial 0°C to +70°C 0V 5.0V ± 10% 2528 tbl 02 OER N/C GND N/C R/ R N/C GND I/O8R I/O7R I/O6R W 2528 drw 03 RECOMMENDED DC OPERATING CONDTIONS Symbol Parameter Min. Typ. Max. Unit VCC Supply Voltage 4.5 5.0 5.5 V GND Supply Voltage 0 0 0 V VIH Input High Voltage 2.2 — 6.0(2) V –0.5(1) — 0.8 VIL Input Low Voltage NOTES: 1. VIL > -1.5V for pulse width less than 10ns. 2. VTERM must not exceed Vcc + 0.5V. V 2528 tbl 03 NOTES: 1. All VCC pins must be connected to power supply. 2. All ground pins must be connected to ground supply. 3. This text does not indicate the orientation of the actual part-marking 6.11 2 IDT7014S HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE (VCC = 5.0V ± 10%) IDT7014S Symbol Parameter Test Condition Min. Max. Unit |ILI| Input Leakage Current VCC = 5.5V, VIN = 0V to VCC — 10 µA |ILO| Output Leakage Current VOUT = 0V to VCC — 10 µA VOL Output Low Voltage IOL = 4mA — 0.4 V VOH Output High Voltage IOH = –4mA 2.4 — V 2528 tbl 04 DC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE (VCC = 5V ± 10%) IDT7014S12 Com'l. Only Test Symbol ICC IDT7014S15 Com'l. Only IDT7014S20 IDT7014S25 IDT7014S35 Mil. Only Parameter Condition Version Typ. Max. Typ. Max. Typ. Max. Typ. Max. Typ. Max. Unit Dynamic Operating Current (Both Ports Active) Outputs Open f = fMAX(1) Mil. — — 160 260 155 260 150 255 150 250 mA 160 250 160 250 155 245 150 240 — — Com’l. NOTE: 1. At f = fmax, address inputs are cycling at the maximum read cycle of 1/tRC using the "AC Test Conditions" input levels of GND to 3V. 5V 5V AC TEST CONDITIONS Input Pulse Levels Input Rise/Fall Times 3ns Input Timing Reference Levels 1.5V Output Reference Levels Output Load 893Ω 893Ω GND to 3.0V 2528 tbl 05 DATAOUT BUSY INT DATAOUT 347Ω 30pF 1.5V 347Ω 5pF 2528 drw 05 2528 drw 04 Figures 1, 2, and 3 2528 tbl 06 Figure 1. AC Output Test Load. CAPACITANCE (1) Including scope and jig. (TA = +25°C, f = 1.0MHz) TQFP Package Only Symbol Parameter Condition(2) Figure 2. Output Test Load (for tHZ, tWZ, and tOW) Max. Unit CIN Input Capacitance VIN = 3dV 9 COUT Output Capacitance VOUT = 3dV 10 pF pF 8 2528 tbl 07 NOTES: 1. This parameter is determined by device characteristics but is not tested. 2. 3dv references the interperlated capacitance when the input and output signals swith from 0V to 3V or from 3V to 0V. 7 - 10pF is the I/O capacitance of this device, and 3 pF is the AC Test Load Capacitance 6 ∆t AA (Typical, ns) 5 4 3 2 1 0 -1 20 40 60 80 100 120 140 160 180 200 Capacitance (pF) 2528 drw 06 Figure 3. Typical Output Derating (Lumped Capacitive Load). 6.11 3 IDT7014S HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES AC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE 7014S12 Symbol Parameter 7014S15 7014S20 7014S25 7014S35 Com'l. Only Com'l. Only Mil. Only Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit READ CYCLE tRC Read Cycle Time 12 — 15 — 20 — 25 — 35 — ns tAA Address Access Time — 12 — 15 — 20 — 25 — 35 ns tAOE Output Enable Access Time — 8 — 8 — 10 — 12 — 20 ns tOH Output Hold from Address Change 3 — 3 — 3 — 3 — 3 — ns (1, 2) 3 — 3 — 3 — 3 — 3 — ns (1, 2) — 7 — 7 — 9 — 11 — 15 ns tLZ Output Low-Z Time Output High-Z Time tHZ NOTES: 1. Transition is measured ±200mV from Low or High-impedance voltage with Output Test Load (Figure 2). 2. This parameter is determined by device characterization, but is not production tested. 2528 tbl 08 TIMING WAVEFORM OF READ CYCLE NO. 1, EITHER SIDE(1,2) tRC ADDRESS tAA tOH DATAOUT tOH PREVIOUS DATA VALID DATA VALID 2528 drw 07 TIMING WAVEFORM OF READ CYCLE NO. 2, EITHER SIDE(1, 3) tAOE OE tHZ tLZ VALID DATA DATAOUT 2528 drw 08 NOTES: 1. R/W = VIH for Read Cycles. 2. OE = VIL. 3. Addresses valid prior to OE transition LOW. 6.11 4 IDT7014S HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES AC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE Symbol Parameter 7014S12 7014S15 Com'l. Only Min. Max. Com'l. Only Min. Max. 7014S20 7014S25 Min. Max. Min. Max. 7014S35 Mil. Only Min. Max. Unit WRITE CYCLE tWC Write Cycle Time 12 — 15 — 20 — 25 — 35 — ns tAW Address Valid to End-of-Write 10 — 14 — 15 — 20 — 30 — ns tAS Address Set-up Time 0 — 0 — 0 — 0 — 0 — ns tWP Write Pulse Width 10 — 12 — 15 — 20 — 30 — ns tWR Write Recovery Time 1 — 1 — 2 — 2 — 2 — ns tDW Data Valid to End-of-Write 8 — 10 — 12 — 15 — 25 — ns — 7 — 7 — 9 — 11 — 15 ns tHZ Output High-Z Time Data Hold Time tDH (1, 2) (3) 0 — 0 — 0 — 0 — 0 — ns (1, 2) — 7 — 7 — 9 — 11 — 15 ns (1, 2, 3) 0 — 0 — 0 — 0 — 0 — ns — 25 — 30 — 40 — 45 — 55 ns — 22 — 25 — 30 — 35 — 45 ns Write Enabled to Output in High-Z tWZ tOW Output Active from End-of-Write tWDD tDDD (4) Write Pulse to Data Delay Write Data Valid to Read Data Delay (4) NOTES: 2528 tbl 09 1. Transition is measured ±200mV from Low or High-impedance voltage with Output Test Load (Figure 2). 2. This parameter is guaranteed by device characterization, but is not production tested. 3. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW. 4. Port-to-port delay through RAM cells from writing port to reading port, refer to “Timing Waveform of Write With Port-to-Port Read”. TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT READ (1,2) tWC ADDR"A" R/ MATCH tWP W"A" tDW DATAIN "A" tDH VALID ADDR"B" MATCH tWDD DATAOUT "B" VALID tDDD NOTES: 1. R/W"B" = VIH, Read cycle pass through. 2. All timing is the same for left and right ports. Port "A" may be either left or right port. Port "B" is opposite from port "A". 6.11 2528 drw 09 5 IDT7014S HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES TIMING WAVEFORM OF WRITE CYCLE(1, 2, 3, 4, 5) tWC ADDRESS OE tAW tAS tWP (5) tWR W R/ tWZ DATAOUT (4) tOW (3) tHZ (4) (3) tDW tDH DATAIN 2528 drw 10 NOTES: 1. R/W must be HIGH during all address transitions. 2. tWR is measured from R/W going HIGH to the end of write cycle. 3. During this period, the I/O pins are in the output state, and input signals must not be applied. 4. Transition is measured ±200mV from the Low or High-impedance voltage with the Output Test Load (Figure 2). 5. If OE is LOW during a R/W controlled write cycle, the write pulse width must be the larger of tWP or (tWZ + tDW) to allow the I/O drivers to turn off data to be placed on the bus for the required tDW. If OE is HIGH during an R/W controlled write cycle, this requirement does not apply and the write pulse can be as short as the specified tWP. FUNCTIONAL DESCRIPTION TABLE I – READ/WRITE CONTROL The IDT7014 provides two ports with separate control, address, and I/O pins that permit independent access for reads or writes to any location in memory. It lacks the chip enable feature of most Dual-Ports, thus it operates in active mode as soon as power is applied. Each port has its own Output Enable control (OE). In the read mode, the port’s OE turns on the output drivers when set LOW. The user application should avoid simultaneous write operations to the same memory location. There is no on-chip arbitration circuitry to resolve write priority and partial data from both ports may be written. READ/WRITE conditions are illustrated in Table 1. Left or Right Port(1) R/W OE D0-8 Function L H X L DATAIN DATAOUT Data written into memory Data in memory output on port X H Z High-impedance outputs NOTE: 2528 tbl 10 1. AOL - A11L is not equal to AOR - A11R. 'H' = HIGH,'L' = LOW, 'X' = Don’t Care, and 'Z' = High-impedance. 6.11 6 IDT7014S HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION IDT XXXX Device Type A Power 999 Speed A Package A Process/ Temperature Range Blank Commercial (0°C to +70°C) PF J 64-pin TQFP (PN64-1) 52-pin PLCC (J52-1) 12 15 20 25 35 Commercial Only Commercial Only S Standard Power 7014 36K (4K x 9-Bit) Dual-Port RAM Speed in nanoseconds Military Only 2528 drw 11 6.11 7