AN005 EN

Application Note
Davis Wen
AN005 – March 2014
Analysis of Buck Converter Efficiency
Abstract
The synchronous buck circuit is wildly used to provide non-isolated power for low voltage and high current supply to
system chip. To realize the power loss of synchronous buck converter and to improve efficiency is important for
power designer. The application note introduces the analysis of buck converter efficiency and realizes major power
component loss in synchronous buck converter.
1.
Buck converter power loss analysis
To realize the power loss in converters is important for converter design optimization. Figure1 shows the general
single phase synchronous buck converter circuit. The major power losses in synchronous buck converter circuit are
listed as bellow :
A : Power semiconductor loss
B : Inductor loss
C : Driver loss
D : PCB trace loss
Figure 1. Synchronous buck converter
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Analysis of Buck Converter Efficiency
2.
Power loss calculation
Low-power loss and highly efficient synchronous buck converters are in great demand for advanced
micro-processors. The application note introduces and provides how to calculate the majority of power losses in a
typical synchronous buck converter occur in the following components based on that the converter works in
continuous conduction mode (CCM) fixed switching frequency, fixed input voltage and fixed output voltage.
A : Power semiconductor loss :
HMOS (High-Side MOSFET) summarizes to include : switching on & off and conduction loss.
LMOS (Low-Side MOSFET) summarizes to include : conduction, dead-time and reverse recovery charge loss.
HMOS switching on loss :
VDS
Drain
VDriver
Cgd
RHI
Gate
RG1
Cds
RGATE
RLO
Cgs
Source
Figure 2. HMOS Driver switching on
VGS
VDriver
VDS
IDS
VGS
VPL
VTH
t1
QTH
QGS
t2
QSW
t
QGD
QG
Figure 3. HMOS switching on loss area
PHS-ON  Fsw  VDS  IDS  t1  t 2  Fsw  VIN  Io 
2
THS-ON 
IG-ON 
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THS-ON
2
QSW
IG,ON
VDriver  VPL
RHI  RGATE  RG1
© 2014 Richtek Technology Corporation
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Analysis of Buck Converter Efficiency
HMOS conduction loss :
The conduction loss of high-side MOSFET is determined by the on-resistances of the MOSFET and the transistor
RMS current.
HS
IHG
IOUT
L
+
+
ILG
Gate
Signal
VIN
RLoad
COUT
LS
_
_
Figure 4. HMOS conduction on
HG
LG
IL
IHG
ILG
DT
TD1
TD2
DT
TD1
TD2
Figure 5. HMOS conduction on period
2
PCON_HS  Irms,HG
 Rds(on),HS
2


Iripple
2


Where Irms,HG  D  IOUT 
12 



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Analysis of Buck Converter Efficiency
LMOS conduction loss :
HS
IHG
IOUT
L
+
+
ILG
Gate
Signal
VIN
RLoad
COUT
_
_
Figure 6. LMOS conduction on
HG
LG
IL
IHG
ILG
DT
TD1
TD2
DT
TD1
TD2
Figure 7. LMOS conduction on period
2
PCON_LS  Irms,LG
 Rds(on),LS
2

Iripple
2

Where Irms,LG  (1-D)   IOUT
12


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



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Analysis of Buck Converter Efficiency
LMOS dead time body diode loss :
Dead-time loss is induced by LMOS body diode conduction during dead-times.
HS
IHG
IOUT
L
+
+
ILG
Gate
Signal
VIN
RLoad
COUT
_
_
Figure 8. LMOS body diode conduction on
HG
LG
IL
IHG
ILG
DT
TD1
TD2
DT
TD1
TD2
:
Figure 9. LMOS body diode conduction on period
PDeadtime  VSD  IL  TD2  IL  TD1  Fsw


Iripple 
Iripple 

 VSD   IOUT 
  TD2   IOUT  2   TD1   Fsw
2





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Analysis of Buck Converter Efficiency
LMOS reverse recovery charge loss :
Figure 10. LMOS body diode reverse recovery period
Prr  Qrr  VDD  Fsw  Qrr  VIN  Fsw
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Analysis of Buck Converter Efficiency
B : Inductor DC & AC loss
Inductor DC loss :
HS
IL
IHG
+
IOUT
+
L RL_DCR
ILG
Gate
Signal
VIN
LS
RLoad
COUT
_
_
Figure 11. Current through inductor path
HG
LG
IL
IHG
ILG
DT
TD1
TD2
D
TD1
TD2
Figure 12. Inductor current path period
2
Pcopper  Irms,L
 RL_DCR
2

Where Irms,L  IOUT
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2
Iripple
12
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Analysis of Buck Converter Efficiency
Inductor core loss :
Inductor core losses are major caused by an alternating magnetic field in the core material. The losses are a
function of the operating frequency and the total magnetic flux swing. The core loss may vary from one magnetic
material to another.
HG
LG
ΔI
IL
IHG
ILG
DT
T
D1
T D2
DT
T
D1
T D2
Figure 13. Inductor ripple current
Figure 14. Core loss curve
The calculated and/or measured core loss is often directly provided by the inductor supplier. If not, a formula can be
used to calculate the core loss as bellow :
X
Y
PL  C  FSW
 Bmax
 Ve
Bmax  L  ΔI
N  Ae
The PL is the power loss (mW),
Fsw : operating frequency
B : peak flux desity in Gauss
Ve : effective core volume
The specific value of C, X and Y are core loss parameters for each material
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Analysis of Buck Converter Efficiency
C: Gate driver loss :
The gate driver loss is straightforward given by MOSFET driver to charge /discharge total HMOS and LMOS Qg.
The gate driver loss is depending on MOSFET total gate charge, driver voltage and Fsw.
VDS
Drain
VDriver
Cgd
RHI
Gate
RG1
Cds
RGATE
RLO
Cgs
Source
Figure 15. Driver turns on and off path
VGS
t3
VDriver
VGS
t4
VDS
VDriver
VDS
IDS
IDS
VPL
VGS
VGS
VPL
VTH
VTH
t1
t2
QSW
QTH
QGS
t
QSW
QGD
QGD
QG
QG
Figure 16. MOSFET driver on
QTH
t
QGS
Figure 17. MOSFET driver off
PDriver  PGate(HS)  PGate(LS)
  QG(HS)  QG(LS)   VDriver  Fsw
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Analysis of Buck Converter Efficiency
D : PCB loss :
Figure 18 could be illustrated as Figure 19 and Figure 20 with Rtr1~Rtr7 with loop1 (HMOS conduction) and loop2
(LMOS conduction) in detail.
Figure 18. PCB trace diagram
Rtr1
HS
L
Rtr2
RL Rtr3 IOUT
+
+
Rtr4
Gate
Signal
VIN
RLoad
CESR
Rtr5
Rtr7
_
COUT
LS
Rtr6
_
Figure 19. PCB loop1 trace
Rtr1
HS
L
Rtr2
RL Rtr3 IOUT
+
+
Rtr4
Gate
Signal
VIN
Rtr7
_
COUT
LS
Rtr5
RLoad
CESR
Rtr6
_
Figure 20. PCB loop2 trace
PCB loss  PCB loop1 loss + PCB loop2 loss
 ILoop12  Rtr1  Rtr2  Rtr3  Rtr6  Rtr7   ILoop22  Rtr3  Rtr4  Rtr5  Rtr6 
2

Iripple
2

Where ILoop1  D  IOUT 
12


ILoop2 

2

1 D    IOUT

AN005




2

Iripple

12 

© 2014 Richtek Technology Corporation
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Analysis of Buck Converter Efficiency
3.
Power loss measurement and calculation comparison
Although the buck converter power loss calculated equations are well introduced and documented. In order to check
the accuracy of these power loss equations, Table1 shows the typical buck converter application parameter and
Figure 21 illustrates the efficiency comparison between measurement and calculation.
Table 1. Buck converter application parameter
IC
RT8120
VIN
12V
Vout
1.2V
FSW
300kHz
VDD
12V
L
1H
DCR
1.2m
HMOS
BSC090N03LS
LMOS
BSC090N03LS*2
EFFICIENCY vs. LOAD C URR ENT
100
100
97.5
95
EFFICIEN CY (%)
92.5


90
CalculateEFF I.OUT

Measure I.LOAD

87.5
85
82.5
80
77.5
75
75
0
0
2.5
5
7.5
10
12.5
15
17.5
20
22.5
I.OUT I.LOAD
25
25
LOA D CURRENT (A)
Figure 21. Measurement and calculation of efficiency comparison
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Analysis of Buck Converter Efficiency
Figure 22 shows the key component loss in buck converter including HMOS, LMOS, inductor, driver and PCB trace
loss. Readers can check what the major loss contributed in each system loading.
POW ER LOSS vs. LOAD C URR ENT
3
3
2.7
TOTA L POWER LOSS (W)
2.4
 
P.LMOS  I.OUT
1.8
P.L  I.OUT
1.5
P.DRV I.OUT
1.2
PD.PCB I.OUT
P.HMOS I.OUT 2.1
0.9
0.6
0.3
0
0
0
2.5
5
7.5
10
0
12.5
15
17.5
20
22.5
I.OUT
25
25
LOA D CURRENT (A)
Figure 22. Key component loss in buck converter
Figure 23 shows detail component loss in buck converter and illustrates the loss v.s Iout in the curve.
HMOS : PHSW (Switching loss) and PHCOD (Conduction loss)
LMOS : PLCOD (Conduction loss), PL_DIODE (Dead-time body diode loss) and PRR (Reverse recovery loss)
Inductor : PL (Inductor DC & core loss)
Driver : PDRV (Gate driver charge loss)
PCB : PPCB (PCB trace loss)
POW ER LOSS vs. LOAD C URR ENT
2.5
2.5

2.25

P.HSW I.OUT
2
 
1.75
P.LCOD I.OUT
P.L_DIODE  I.OUT 1.5
P.RR I.OUT
1.25
P.L  I.OUT
1
P.DRV I.OUT
0.75
P.PCB I.OUT
TOTA L POWER LOSS (W)
P.HCOD I.OUT
0.5
0.25
0
0
0
0
2.5
5
7.5
10
12.5
15
17.5
20
22.5
I.OUT
25
25
LOA D CURRENT (A)
Figure 23. Detail power loss in buck converter
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Analysis of Buck Converter Efficiency
4.
Conclusion
This application document analyzes power loss in synchronous buck converters and presents the detailed
calculations for each part of the power loss. The loss calculation also compares with real buck converter
measurement and provides the key component loss data to consider how to improve the buck converter efficiency
for component and PCB plane consideration.
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Analysis of Buck Converter Efficiency
Reference
[1] Leon Chen, “Power Loss Analysis for Synchronous Buck Converter”, Application Engineer Dept data, 2013.
[2] Nelson Garcia, “Determining Inductor Power Losses”, Coil craft Document 486, 2005.
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