® RT8099/A 1.5MHz, 600mA, High Efficiency PWM Step-Down Converter General Description Features The RT8099/A is a Pulse-Width-Modulated (PWM) DC/ DC step-down converter, and is capable of delivering 0.6A output current over a wide input voltage range from 2.7V to 5.5V. The RT8099/A is ideally suited for portable electronic devices that are powered from 1-cell Li-ion battery such as cellular phones, PDAs and handyterminals. Internal synchronous rectifier with low RDS(ON) 2.7V to 5.5V Input Range dramatically reduces conduction loss at PWM mode. No external schottky barrier diode is required in practical application. Adjustable Output from 0.7V to 5V 0.6A Output Current 95% Efficiency No Schottky Barrier Diode Required 1.5MHz Spread Spectrum/Fixed Frequency PWM Operation Auto Discharge Function Over-Current Protection Overt-Temperature Protection Integrated Soft-Start Function Small 6-Lead UDFN Package RoHS Compliant and Halogen Free The RT8099/A enters low-dropout mode when normal PWM cannot provide regulated output voltage by continuously turning on the high-side P-MOSFET. The RT8099/A enters shut-down mode and consumes less than 0.1μA when the EN pin is pulled low. The switching ripple is easily smoothed-out by small package filtering elements due to 1.5MHz high switching frequency. Other features include soft-start, auto discharge, lower internal reference voltage, over-temperature protection, and overcurrent protection. Applications The RT8099/A is available in the small UDFN-6L 1.6x1.6 package for saving PCB space. Cellular Telephones Personal Information Appliances Wireless and DSL Modems MP3 Players Portable Instruments Marking Information RT8099GQU 0U : Product Code 0UW W : Date Code Simplified Application Circuit RT8099/A LX CIN Enable L VIN VBAT EN FB VOUT COUT GND PGND Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS8099/A-01 February 2015 AGND is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT8099/A Pin Configurations RT8099/A (TOP VIEW) Package Type QU : UDFN-6L 1.6x1.6 (U-Type) EN AGND PGND Lead Plating System G : Green (Halogen Free and Pb Free) RT8099 : Spread Spectrum RT8099A : Fixed Frequency 1 2 3 6 GND Ordering Information 7 5 4 FB VIN LX UDFN-6L 1.6x1.6 Note : Richtek products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. Functional Pin Description Pin No. Pin Name Pin Function 1 EN Enable Control Input (Active High). 2 AGND Analog Ground. 3 PGND Power Ground. 4 LX Switch Node. 5 VIN Power Input. 6 FB Feedback Voltage Input. GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. 7 (Exposed Pad) Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS8099/A-01 February 2015 RT8099/A Function Block Diagram EN UVLO Bias Supply Bandgap VIN Thermal Shutdown VREF FB PGND Soft-Start AGND Oscillator Current Limit Detect PWM Control Logic Gate Driver LX Negative Inductor Current Detect Operation The RT8099/A is a synchronous DC/DC step-down converter that can support the input voltage range from 2.7V to 5.5V. The output current is up to 600mA. While the power plugs in and EN = H, VOUT is soft-started to avoid the inrush current of VIN by the soft-start block. Normally, the high-side MOSFET is turned on by the PWM control logic block which drives the gate driver block when VFB is lower than the internal reference voltage. After VFB is higher than the internal reference voltage, the high-side MOSFET will be turned off. While the high-side MOSFET is turned off, the low-side MOSFET is turned on until the current of the inductor is around zero by the negative inductor current detection block. When the current of high- Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS8099/A-01 February 2015 side MOSFET is over the rating current, the high-side MOSFET is turned off. When the temperature is over the rating temperature, the high-side MOSFET is turned off until the temperature is dropped by the thermal shutdown block. After the thermal shutdown is released, VOUT will be soft-started again. When VIN is lower than 2.1V, the high-side MOSFET is turned off by the UVLO block. After VIN is higher than 2.2V, VOUT will be soft-started again. The reference voltage is provided by the bandgap block. The internal clock related to the switching frequency is provided by the oscillator block. is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT8099/A Absolute Maximum Ratings (Note 1) Supply Input Voltage, VIN -----------------------------------------------------------------------------------------------EN, FB Pin Voltage -------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C UDFN-6L 1.6x1.6 ----------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) UDFN-6L 1.6x1.6, θJA ----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------Junction Temperature -----------------------------------------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ----------------------------------------------------------------------------------------------MM (Machine Model) ------------------------------------------------------------------------------------------------------ Recommended Operating Conditions 6V −0.3V to VIN 2.15W 46.5°C/W 260°C 150°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage, VIN ----------------------------------------------------------------------------------------------- 2.3V to 5.5V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 3.6V, VOUT = 1.8V, VREF = 0.6V, L = 2.2μH, CIN = 4.7μF, COUT = 10μF, IMAX = 0.6A, TA = 25°C, unless otherwise specified) Parameter Symbol Input Voltage Start-Up VIN Input Voltage Range VIN Test Conditions IOUT = 600mA Min Typ Max Unit 2.3 -- 5.5 V 2.7 -- 5.5 V Quiescent Current for I Adjustable Output Voltage Q_adj IOUT = 0mA, VFB = VREF + 10%, without include EN pin current (Note 5) -- 20 35 A Shutdown Current ISHDN EN = GND -- 0.1 1 A Reference Voltage VREF For Adjustable Output Voltage 0.591 0.6 0.609 V Adjustable Output Range VOUT 0.7 -- VIN V Output Voltage Accuracy VOUT VIN = 2.7V to 5.5V, 0A < IOUT < 0.6A 3 -- 3 % FB Input Current IFB VFB = VIN 50 -- 50 nA High-Side MOSFET On-Resistance RDS(ON)_P IOUT = 200mA VIN = 3.6V -- 0.28 -- VIN = 2.5V -- 0.38 -- Low-Side MOSFET On-Resistance RDS(ON)_N IOUT = 200mA VIN = 3.6V -- 0.25 -- VIN = 2.5V -- 0.35 -- High-Side MOSFET Current Limit ILIM_P 1 1.5 2 Logic-High VEN_H 1.5 -- -- Logic-Low VEN_L -- -- 0.4 2.1 2.2 2.3 V -- 0.1 -- V EN Input Voltage Under Voltage Lock Out Threshold (Rising) UVLO_R UVLO Hysteresis UVLO_Hys VIN Falling VIN Rising Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 A V is a registered trademark of Richtek Technology Corporation. DS8099/A-01 February 2015 RT8099/A Parameter Symbol Oscillator Frequency fOSC Thermal Shutdown Temperature TSD Test Conditions VIN = 3.6V, IOUT = 600mA Maximum Duty Cycle Soft-Start Time tSS Discharge Time tDIS EN Pull-Low Resistor REN COUT = 10F Min Typ Max Unit -- 1.5 -- MHz -- 150 -- C 100 -- -- % -- 150 -- s -- 5 10 ms -- 300 -- k Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Supply 660mV in FB pin and record the VIN pin current. Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS8099/A-01 February 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT8099/A Typical Application Circuit RT8099/A 5 VBAT 2.7V to 5.5V CIN 4.7µF Enable VIN LX 4 L 2.2µH VOUT R1 1 EN FB 6 CFF COUT 10µF R2 7 (Exposed Pad) GND PGND 3 AGND 2 VOUT = VREF 1 R1 R2 with R2 = 60kΩ to 300kΩ so the IR2 = 10μA to 2μA, and (R1 x CFF) should be in the range between 22.4 x 10−6 and 88 x 10−6 for component selection. Figure 1. Adjustable Voltage Regulator Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS8099/A-01 February 2015 RT8099/A Typical Operating Characteristics Efficiency vs. Output Current Switching Frequency vs. Input Voltage 100 1.65 Switching Frequency (MHz)1 95 Efficiency (%) 90 VIN = 3.2V VIN = 4.2V 85 80 75 70 65 60 55 1.60 1.55 1.50 VOUT = 1.8V, CIN = 4.7μF, COUT = 10μF, L = 2.2μH, IOUT = 500mA VOUT = 1.8V, CIN = 4.7μF, COUT = 10μF, L = 2.2μH 50 1.45 0 100 200 300 400 500 600 2.5 3 3.5 Output Current (mA) 4.5 5 5.5 Input Voltage (V) Quiescent Current vs. Input Voltage Quiescent Current vs. Temperature 30 35 Quiescent Current (µA) Quiescent Current (µA) 4 28 26 24 22 30 25 20 15 10 5 VIN = 3.7V 20 0 2.5 3 3.5 4 4.5 5 5.5 -50 -25 0 Input Voltage (V) Reference Voltage vs. Input Voltage 50 75 100 125 Reference Voltage vs. Temperature 0.605 0.606 0.603 Reference Voltage (V) Reference Voltage (V) 25 Temperature (°C) 0.601 IOUT = IOUT = IOUT = IOUT = 0.599 100mA 200mA 300mA 600mA 0.597 0.604 0.602 0.600 0.598 0.596 VIN = 3.7V, VOUT = 1.8V, CIN = 4.7μF, COUT = 10μF, L = 2.2μH, IOUT = 300mA VOUT = 1.8V, CIN = 4.7μF, COUT = 10μF, L = 2.2μH 0.595 0.594 2.5 3 3.5 4 4.5 5 Input Voltage (V) Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS8099/A-01 February 2015 5.5 -50 -25 0 25 50 75 100 125 Temperature (°C) is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT8099/A P-Channel On-Resistance vs. Input Voltage EN Voltage vs. Input Voltage 0.40 EN Voltage (V) 0.95 0.90 EN_H 0.85 EN_L 0.80 0.75 0.70 0.65 VIN = 3.7V, VOUT = 1.8V, CIN = 4.7μF, COUT = 10μF, L = 2.2μH P-Channel On-Resistance1 1.00 0.35 0.30 0.25 0.20 0.15 0.10 0.05 CIN = 4.7μF, COUT = 10μF, L = 2.2μH, IOUT = 200mA 0.00 0.60 2.5 3 3.5 4 4.5 5 2.5 5.5 3.5 4 4.5 Input Voltage (V) Input Voltage (V) Power On from EN Power On from EN 5 5.5 VIN (2V/Div) VIN (2V/Div) VOUT (1V/Div) VOUT (1V/Div) EN (2V/Div) EN (2V/Div) I IN (500mA/Div) 3 VIN = 3.2V, VOUT = 1.8V, IOUT = 600mA, CIN = 4.7μF, COUT = 10μF, L =2.2μH I IN (500mA/Div) Time (40μs/Div) Time (40μs/Div) Power Off from EN Power Off from EN VIN (10V/Div) VIN (10V/Div) VOUT (2V/Div) VOUT (2V/Div) EN (2V/Div) EN (2V/Div) I IN (500mA/Div) VIN = 3.2V, VOUT = 1.8V, IOUT = 600mA, CIN = 4.7μF, COUT = 10μF, L =2.2μH Time (25μs/Div) Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 VIN = 4.2V, VOUT = 1.8V, IOUT = 600mA, CIN = 4.7μF, COUT = 10μF, L =2.2μH I IN (500mA/Div) VIN = 4.2V, VOUT = 1.8V, IOUT = 600mA, CIN = 4.7μF, COUT = 10μF, L =2.2μH Time (25μs/Div) is a registered trademark of Richtek Technology Corporation. DS8099/A-01 February 2015 RT8099/A Applications Information The basic RT8099/A application circuit is shown in Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. V V IL = OUT 1 OUT VIN f L Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is ΔIL = 0.4 (IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : VOUT VOUT L= 1 f I V L(MAX) IN(MAX) A 2.2μH inductor is recommended for L. Table 1. Suggested Inductors and Suppliers Model Vendor Dimensions L x W x H (mm) NR4018T2R2M Taiyo 4.0 x 4.0 x 1.8 VLS3010ET-2R2M TDK 3.0 x 3.0 x 1.0 NR3010T2R2M Taiyo 3.0 x 3.0 x 1.0 SWPA3010S2R2NT Sunlord 3.0 x 3.0 x 1.0 CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the Source of the high-side MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : V IRMS = IOUT(MAX) OUT VIN VIN 1 VOUT Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS8099/A-01 February 2015 This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT / 2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the Effective Series Resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT, is determined by : 1 VOUT IL ESR 8fC OUT The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT8099/A Output Voltage Programming The resistive divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 2. VOUT LX RT8099/A R1 FB R2 Figure 2. Setting the Output Voltage For adjustable voltage mode, the output voltage is set by an external resistive divider according to the following equation : VOUT VREF 1 R1 R2 where VREF is the internal reference voltage (0.6V typ.) For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For UDFN-6L 1.6x1.6 package, the thermal resistance, θJA, is 46.5°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (46.5°C/W) = 2.15W for UDFN-6L 1.6x1.6 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. 2.5 Maximum Power Dissipation (W)1 for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Four-Layer PCB 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 3. Derating Curve of Maximum Power Dissipation Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS8099/A-01 February 2015 RT8099/A Layout Considerations Follow the PCB layout guidelines for optimal performance of RT8099/A. Put the input capacitor as close as possible to the device pins (VIN and GND). LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX node to prevent stray capacitive noise pick-up. Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the RT8099/A. Connect all analog grounds to a common node and then connect the common node to the power ground behind the output capacitors. Input capacitor must be placed between GND and VIN to reduce noise. Put the input capacitor as close as possible to the device. GND 1 2 3 6 GND EN AGND PGND 7 5 4 FB VIN LX R2 CIN VIN VOUT R1 GND The exposed pad and GND should be connected to a strong ground plane for heat sinking and noise prevention. CFF COUT GND Output capacitor must be placed between GND and VOUT to reduce noise. Figure 4. PCB Layout Guide Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS8099/A-01 February 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT8099/A Outline Dimension 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A 0.500 0.600 0.020 0.024 A1 0.000 0.050 0.000 0.002 A3 0.100 0.175 0.004 0.007 b 0.200 0.300 0.008 0.012 D 1.500 1.700 0.059 0.067 D2 0.950 1.050 0.037 0.041 E 1.500 1.700 0.059 0.067 E2 0.550 0.650 0.022 0.026 e L 0.500 0.200 0.020 0.300 0.008 0.012 U-Type 6L DFN 1.6x1.6 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 12 DS8099/A-01 February 2015