APW7179C

APW7179C
Dual 1.5MHz, 1A Synchronous Step-Down Converter
Features
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General Description
The APW7179C consists of two independent 1.5MHz constant frequency, current mode, and PWM step-down
1A Output Current on Each Channel
3V to 5.5V Input Voltage Range
converters. Each converter integrates a main switch with
a synchronous rectifier for high efficiency without an ex-
1.5MHz Constant Frequency Operation
Low Dropout Operation at 100% Duty Cycle
ternal Schottky diode. The APW7179C is ideal for powering portable equipment that runs from a single cell
Synchronous Topology
0.6V Low Reference Voltage
Lithium-Ion (Li+) battery. Each converter can supply 1A of
load current from a 3V to 5.5V input voltage. The output
Current Mode Operation
Over-Temperature Protection
Over-Current Protection
voltage can be regulated as low as 0.6V. The APW7179C
can also run at 100% duty cycle for low dropout
High Efficiency
applications.
Pin Configuration
Internally Compensated
Lead Free and Green Devices Available
APW7179C
(RoHS Compliant)
Applications
•
•
IN2 1
12 EN2
SW2 2
11 NC
GND1 3
FB1 4
TV Tuner/Box
TDFN3x3-12
(Top View)
10 FB2
9 GND2
NC 5
8 SW1
EN1 6
7 IN1
Portable Instrument
Exposed pad
on backside
Ordering and Marking Information
Package Code
QB : TDFN3x3-12
Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
APW7179C
Assembly Material
Handling Code
Temperature Range
Package Code
APW7179C QB:
APW
7179C
XXXXX
XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
1
www.anpec.com.tw
APW7179C
Absolute Maximum Ratings
Symbol
(Note 1)
P arame ter
VIN1/IN2
In put S upply Voltage (IN1/IN2 to GND1/GND2)
Ra ting
Unit
-0.3 ~ 6
V
V FB1/FB2
Voltag e o n FB1 a nd FB2 (FB1 /FB2 to GND 1/GND2 )
-0 .3 ~ V IN 1/IN2 +0.3
V
V EN1/EN2
Voltag e o n EN1 an d EN2 (EN1/EN2 to GND1/GND2)
-0 .3 ~ V IN 1/IN2 +0.3
V
>20 ns
-0 .3 ~ V IN 1/IN2 +0.3
V
V SW1/SW2
SW1/SW2 to G ND1/GND2 Voltage
<20 ns
-5 ~ 9
V
I SW_PEAK
Peak SW Current
2.5
A
2
W
o
PD
Ma ximu m Powe r Dissipation (T A=25 C)
TJ
Maximum Junctio n Temp erature
T STG
Storage Tempe rature Range
T SDR
Ma ximu m Le ad Sold ering Tempera tur e, 10 Se conds
1 50
°C
-6 5 ~ 150
°C
2 60
°C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Thermal Characteristics
Symbol
P arame ter
Typical V alue
θJA
Ju nctio n-to-Ambie nt Resista nce in Free Air
θJC
Ju nctio n-to-Case Resistance in Fre e Air
Unit
(No te 2 )
50
TDFN3x3-12
°C/W
12
TDFN3x3-12
Note 2: θJA is measured on with the device mounted the PCB with top-layer pad of approximate 1” square of 1 oz copper.
Recommended Operating Conditions
Sym bol
VIN1/IN2
I OUT
P arame ter
Range
Unit
In put Supply Voltage (IN1/IN2 to GND1/GND2)
3 ~ 5.5
V
Output Current
0 ~ 1
A
TA
Oper ati ng Ambien t Temperatur e
-4 0 ~ 85
°C
TJ
Oper ati ng Junction Temp erature
-4 0 ~ 125
°C
Note 3: Please refer to the typical application circuit.
Electrical Characteristics
The denotes the specifications that apply over VIN=3.6V and TA =25°C, unless otherwise specifications.
S ym bol
Pa ra mete r
APW7 179C
Test Conditions
Min.
Unit
Typ.
Max.
VIN1/IN2
Ea ch Converter Input Voltage Range
3
-
5.5
V
I FB1 /FB2
FB1/FB2 In put Curr ent
V FB1/FB2=0 .6V
-30
-
30
nA
Ea ch Converter Reference Vo lta ge
I OUT=0mA~1A
0.58 8
0.6
0.612
V
Ea ch Converter Pe ak Inductor Current
V IN 1/IN2 =3.3V, VFB=0.5V or
V OUT =90%, Duty cycle < 35%
1 .4
1.6
-
A
VR EF1/REF2
IPK
Copyright  ANPEC Electronics Corp.
Rev. A.22- Nov., 2015
2
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APW7179C
Electrical Characteristics (Cont.)
The denotes the specifications that apply over VIN=3.6V and TA =25°C, unless otherwise specifications.
APW717 9C
Symbol
Parame ter
Te st Conditions
Unit
Min.
Typ.
Ma x.
I DD
Ea ch Converter Qu iesce nt Curren t
V FB=0.7V
-
30
50
µA
I SD
Ea ch Converter Qu iesce nt Curren t in
Sh utd own
V EN1/EN2=0V, V IN =4.2V
-
-
1
µA
f OSC
Ea ch Converter Oscillator Frequen cy
V FB=0.6V
1.2
1.5
1.8
MHz
fOSC_FFB
Ea ch Converter Freque ncy Foldb ack
V FB=0V
-
210
-
kHz
R DS-P
Ea ch Converter On Resista nce o f
PMOSFET
I SW =10 0mA
-
0 .2 8
-
Ω
R DS-N
Ea ch Converter On Resista nce o f
NMO SFET
I SW =-10 0mA
-
0 .2 5
-
Ω
VEN 1/EN2
Ea ch Converter En able Threshol d
0.4
-
1
V
-
150
-
o
-
o
TOTP
Thermal Sh utdown Thr eshold
Thermal Sh utdown Hyste resis
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
-
3
50
C
C
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APW7179C
Pin Description
P IN
FUNCTIO N
NO.
NAME
1
IN2
2
SW2
3
GND1
4
FB1
Chan nel 1 Feed back In put. Co nnect FB1 to the ce nter po int of th e external resistor divid er. Th e
feed back voltage is 0.6V.
5, 11
NC
No Inte rnal Conn ectio n.
6
EN1
Chan nel 1 En able Control Inpu t. Drive EN1 ab ove 1 V to turn o n the Cha nnel 1. Dr ive EN1 b elow 0.4V to
turn it off. In shutdown situ ation, a ll fun ction s are d isa bled to decrease the suppl y curren t be low 1µA.
Don’ t left this pin flo ating.
7
IN1
Chan nel 1 Su pply Inp ut. Bypass to th e GND1 with a 4.7µF or greater ceram ic capacitor.
8
SW1
9
GND2
10
FB2
12
EN2
Exposed
Pad
NC
Chan nel 2 Su pply Inp ut. Bypass to th e GND2 with a 4.7µF or greater ceram ic capacitor.
Chan nel 2 Po wer Switch Output. Indu ctor conn ectio n to dra ins o f th e i nternal PMO SFET and NMO SFET
switche s.
G round 1 . Conne cted the exposed pa d to the GND1.
Chan nel 1 Po wer Switch Output. Indu ctor conn ectio n to dra ins o f th e i nternal PMO SFET and NMO SFET
switche s.
G round 2 . Conne cted the exposed pa d to the GND2.
Chan nel 2 Feed back In put. Co nnect FB2 to the ce nter po int of th e external resistor divid er. Th e
feed back voltage is 0.6V.
Chan nel 2 En able Control Inpu t. Drive EN2 ab ove 1 V to turn o n the Cha nnel 2. Dr ive EN2 b elow 0.4V to
turn it off. In shutdown situ ation, a ll fun ction s are d isa bled to decrease the suppl y curren t be low 1µA.
Don’ t left this pin flo ating.
No Inte rnal Conn ectio n. Conn ecting this pad to GND1 and GND2.
Block Diagram
IN1/IN2
EN1/EN2
Shutdown
Control
Logic Control
SW1/SW2
Gate
Driver
OverTemperature
Protection
Current
Limit
∑
GND1/GND2
Oscillator
ICMP
FB1/FB2
COMP
EAMP
Softstart
VREF
0.6V
Diagram Represents 1/2 of the APW7179C
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
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APW7179C
Typical Application Circuit
VIN1/IN2
CIN1
4.7µF
R5
100kΩ
IN1
VOUT1
1.2V
1A
IN2
EN1
OFF ON
R6
100kΩ
EN2
L1
2.2µH
APW7179C
SW2
FB1
CFB1
22pF
VOUT2
3.3V
1A
R3
67.5kΩ
R1
20kΩ
COUT1
10µF
OFF ON
L2
2.2µH
SW1
CIN2
4.7µF
R2
20kΩ
COUT2
10µF
FB2
GND1 GND2
R4
15kΩ CFB2
22pF
CFB1, CFB2 = 22pF is recommended
R1, R3 < 1MΩ is recommended
R2, R4 < 60KΩ is recommended
CIN1, CIN2 closed to IC. Less than 2mm is recommended
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
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APW7179C
Function Description
Main Control Loop
Junction Temperature (TJ ) during continuous thermal
overload conditions, increasing the lifetime of the device.
The APW 7179C has dual independent constant
frequency, current-mode PWM step-down converters.
Enable/Shutdown
During normal operation, the internal P-channel power
MOSFET is turned on each cycle when the oscillator sets
For each channel, driving EN to the ground places the
an internal RS latch and is turned off when an internal
comparator (ICMP) resets the latch. The peak inductor
channel in shutdown mode. When in shutdown, the internal power MOSFETs are turned off, all internal circuitry
current at which ICMP resets the RS latch is controlled by
the voltage on the COMP, which is the output of the error
shuts down, and the quiescent supply current reduces to
1µA maximally.
amplifier (EAMP). An external resistive divider connected
between VOUT and ground allows the EAMP to receive an
Automoatic PFM/PWM mode Switch
The APW7179C is a fixed frequency PWM peak current
output feedback voltage VFB at FB pin. When the load current increases, it causes a slightly decrease in VFB asso-
modulation control step-down converter. At light loads,
the APW7179C will automatically enter in pulse frequency
ciated with the 0.6V reference, which in turn causes the
COMP voltage to increase until the average inductor current matches the new load current.
modulation operation to reduce the dominant switching
losses. In PFM operation, the inductor current may reach
Soft-Start
zero or reverse on each pulse. A zero current comparator
turns off the N-channel synchronous MOSFET, forcing
DCM (Discontinuous Current Mode) operation at light
load. These controls get very low quiescent, help to main-
Each channel in the APW7179C has a built-in soft-start to
control the output voltage rise during start-up. During softstart, an internal ramp, connected to the one of the posi-
tain high efficiency over the complete load range.
tive inputs of the error amplifier, raise up to replace the
reference voltage (0.6V typical) until the ramp voltage
reaches the reference voltage.
Short Circuit Protection
For each channel, when the output is shortened to the
ground, the frequency of the oscillator will be reduced to
210kHz. This lower frequency allows the inductor current
to safely discharge, thereby preventing current runaway.
The oscillator’s frequency will gradually increase to its
designed rate when the feedback voltage on the FB again
approaches 0.6V.
Over-Temperature Protection (OTP)
For each channel, the over-temperature circuit limits the
junction temperature of the APW7179C. When the junction temperature exceeds 150oC, a thermal sensor turns
off the power MOSFETs, allowing the channels to cool
down. The thermal sensor allows the converter to start a
soft-start process and to regulate the output voltage again
after the junction temperature cools by 40οC. The OTP is
designed with a 40οC hysteresis to lower the average
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
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APW7179C
Application Information
IL
Inductor Selection
IOUT
Due to the high switching frequency as 1.5MHz, the inductor value of the application of the APW7179C is usually in the range from 1µH to 4.7µH. The criterion of se-
IIN
0A
lecting a suitable inductor depends on its maximum current ripple. The maximum current ripple defines as 40%
I(CIN)
IIN
0A
of the fully load current. In the APW7179C applications,
the maximum value of current ripple is 400mA, the 40%
of 1A. Calculate L by the equation (1):
L=
(VIN − VOUT ) ⋅ VOUT ⋅
VIN
1
.......... .....(1)
∆IL ⋅ fOSC
0A
I(COUT)
where fOSC is the switching frequency of APW7179C and
∆IL is the value of the maximum current ripple. It can be
I(Q1)
any value of current ripple that smaller than the maximum
value you can accept. In order to perform high efficiency,
selecting a low DC resistance inductor is a helpful way.
Another important parameter is the DC current rating of
IOUT
0A
the inductor. The minimum value of DC current rating
equals the full load value of 1A, and then plus the half of
D*TS
the current ripple. Choose inductors with suitable DC cur-
PWM
(1-D)*TS
rent rating to ensure the inductors don’t operate in the
saturation.
0A
Figure-2
Input Capacitor Selection
By observing the waveform of I(CIN), the RMS value of I(CIN)
is
The input capacitor must be able to support the maximum input operating voltage and maximum RMS input
I(CIN ) =
current. The Buck converter absorbs pulse current from
input power source.
[(I
OUT
] (
− IIN ) ⋅ D + IIN ⋅ 1 − D
2
2
)
2
.....( 2)
Replace D and IIN by following relation:
I(Q1)
D=
I(CIN)
IIN
Q1
L
VIN
CIN
IIN = D ⋅ IOUT .......... .......... .....( 4 )
I(L)
Q2
VOUT
.......... .......... .......... (3)
VIN
I(COUT)
COUT
The RMS value of input capacitor current equal:
IOUT
I(CIN ) = IOUT ⋅ D(1 − D) ............(5)
PWM
When D=0.5, the RMS current of input capacitor will be
maximum value. Use this value to choose the input capacitor with suitable current rating.
Figure-1
Figure-1 shows a schematic of a Buck converter. The
waveforms are shown as Figure-2.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
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APW7179C
Application Information (Cont.)

TS 
.......... .......( 8)
∆VOUT = ∆IL ⋅  ESR +

⋅
8
C
OUT 

Output Capacitor Selection
The output voltage ripple is a significant parameter to
estimate the performance of a convertor. There are two
Thermal Consideration
discrete components that affect the output voltage ripple
to be bigger or smaller. It is recommended to use the
APW7179C is a high efficiency switching converter, it
criterion mentioned in the "Inductor Selection" to choose
a suitable inductor. Then, based on this known inductor
means less power loss transferred into heat. Due to the
on resistance difference between internal power
current ripple, the value and equivalent-series-resistance
(ESR) of output capacitor will affect the output voltage ripple
PMOSFET and NMOSFET, the power dissipation at high
duty cycle is greater than the low duty cycle. The worst
to be smaller or larger. The output voltage ripple consists
of two portions, one is the product of ESR and inductor
case in the dropout operation is the conduction loss dissipate mainly on the internal power PMOSFET. The power
current ripple, the other portion is the function of the inductor current ripple and the output capacitance. Figure-3
dissipation is nearly defined as:
PD = (IOUT ) [RDS−P ⋅ D + RDS−N ⋅ (1 − D)].......(9)
2
illustrates the waveform of the ripple voltage which is
generated when the inductor ripple current charges or
The APW7179C provides internal over-temperature
protection. When the junction temperature reaches 150
discharges the pure capacitor without the ESR.
degrees centigrade, the APW7179C will turn off both internal power PMOSFET and NMOSFET. The estimation
of the junction temperature, TJ, is defined as:
∆IL
0A
I(COUT )
TJ = PD ⋅ θJA .......... .......... .......... .......... ....(10 )
where the θJA is the thermal resistance of the package
utilized by the APW7179C.
0.5TS
∆VOUT1
Output Voltage Setting
V OUT
Then APW7179C has the adjustable version for output
voltage setting by the users. A suggestion of maximum
value of R2 is 60kΩ to keep the minimum current that
Figure-3
Evaluate the ∆VOUT1 by the ideal of energy equalization.
provides enough noise rejection ability through the resistor divider. The output voltage is programmed by the
According to the definition of Q,
Q=
equation as below:
11
1 
 ∆IL ⋅ TS  = COUT ⋅ ∆VOUT1 ....( 6 )
2 
22

R 
VOUT = 0.6 ⋅ 1 + 1 .......... .................... .(11)
R
2

where TS is the inverse of switching frequency and the ∆IL
is the inductor current ripple. Move the COUT to the left side
to estimate the value of ∆VOUT1 as equation (7).
∆VOUT1 =
VOUT
∆IL ⋅ TS
.......... .......... .......... ..( 7)
8 ⋅ COUT
APW7179C
As mentioned above, one part of output voltage ripple is
R1
FB
the product of the inductor current ripple and ESR of output capacitor. The equation (8) explains the output volt-
R2
age ripple estimation.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
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APW7179C
Application Information (Cont.)
Layout Consideration
For all switching power supplies, the layout is an important step in the design; especially at high peak currents
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
1. The input capacitor should be placed close to the VIN
and GND. Connecting the capacitor and VIN/GND with
short and wide trace without any via holes for good
input voltage filtering. The distance between VIN/GND
t o c a p a c i t or l e s s t h a n 2m m r e s pe c t i ve ly i s
recommended.
2. The high current paths (GND1/GND2, IN1/IN2, and SW1/
SW2) should be placed very close to the device with
short, direct and wide traces.
3. To minimize copper trace connections that can inject
noise into the system, the inductor should be placed as
close as possible to the SW pin to minimize the noise
coupling into other circuits.
4. Since the feedback pin and network is a high impedance circuit, the feedback network should be routed
away from the inductor. The feedback pin and feedback
network should be shielded with a ground plane or
trace to minimize noise coupling into this circuit.
5. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
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APW7179C
Package Information
TDFN3x3-12
D
b
E
A
Pin 1
A1
D2
A3
L
K
E2
Pin 1 Corner
e
S
Y
M
B
O
L
TDFN3x3-12
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
0.70
0.80
0.028
0.031
A1
0.00
0.05
0.000
0.002
A3
0.20 REF
0.008 REF
0.30
0.007
0.012
2.90
3.10
0.114
0.122
D2
2.20
2.70
0.087
0.106
E
2.90
3.10
0.114
0.122
E2
1.40
1.75
0.055
0.069
0.50
0.012
b
D
0.18
e
0.45 BSC
L
0.30
K
0.20
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
0.018 BSC
0.020
0.008
10
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APW7179C
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
TDFN3x3-12
A
H
330±2.00
50 MIN.
P0
P1
T1
12.4+2.00
-0.00
P2
4.0±0.10
8.0±0.10
2.0±0.05
C
13.0+0.50
-0.20
D0
1.5+0.10
-0.00
d
D
W
E1
F
1.5 MIN.
20.2 MIN.
12.0±0.30
1.75±0.10
5.5±0.05
D1
T
0.6+0.00
-0.40
A0
B0
K0
3.30±0.20
3.30±0.20
1.30±0.20
1.5 MIN.
(mm)
Devices Per Unit
Package Type
Unit
Quantity
TDFN3x3-12
Tape & Reel
3000
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APW7179C
Taping Direction Information
TDFN3x3-12
USER DIRECTION OF FEED
Classification Profile
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
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APW7179C
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
13
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
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APW7179C
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
14
www.anpec.com.tw