GAL16V8/883

GAL16V8/883
High Performance E2CMOS PLD
Generic Array Logic™
Features
Functional Block Diagram
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
— 7.5 ns Maximum Propagation Delay
— Fmax = 100 MHz
— 6 ns Maximum from Clock Input to Data Output
— TTL Compatible 12 mA Outputs
— UltraMOS® Advanced CMOS Technology
I/CLK
CLK
8
OLMC
I/O/Q
8
OLMC
I/O/Q
8
OLMC
I/O/Q
8
OLMC
I/O/Q
8
OLMC
I/O/Q
8
OLMC
I/O/Q
8
OLMC
I/O/Q
8
OLMC
I/O/Q
I
I
2
• E CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
PROGRAMMABLE
AND-ARRAY
(64 X 32)
• ACTIVE PULL-UPS ON ALL PINS (GAL16V8D-7 and
GAL16V8D-10)
I
I
• EIGHT OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
— Programmable Output Polarity
— Also Emulates 20-pin PAL® Devices with Full Function/
Fuse Map/Parametric Compatibility
I
I
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
— 100% Functional Testability
I
• APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
I
OE
I/OE
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
Description
Pin Configuration
The GAL16V8/883 is a high performance E2CMOS programmable logic device processed in full compliance to MIL-STD-883.
This military grade device combines a high performance CMOS
process with Electrically Erasable (E2) floating gate technology to
provide the highest speed/power performance available in the
883 qualified PLD market. The GAL16V8D/883, at 7.5ns maximum propagation delay time, is the world's fastest military qualified CMOS PLD.
CERDIP
LCC
I/CLK
1
20
I/O/Q
I
The generic GAL architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user. The GAL16V8/883 is capable of emulating all
standard 20-pin PAL® devices with full function/fuse map/parametric compatibility.
I
I
I
I/CLK Vcc
3
2
20
I/O/Q
18
I
I
GAL16V8
6
Unique test circuitry and reprogrammable cells allow complete
AC, DC, and functional testing during manufacture. Therefore,
Lattice Semiconductor delivers 100% field programmability and
functionality of all GAL products. In addition, 100 erase/write
cycles and data retention in excess of 20 years are specified.
I
16
Top View
I
8
9
I
GND
I/O/Q
I
19
4
I/O/Q
I
I/O/Q
I
I/O/Q
I/O/Q
14
11
13
I/OE I/O/Q
I/O/Q
I/O/Q
Vcc
5
GAL
16V8
I/O/Q
I/O/Q
15
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
GND
10
11
I/OE
Copyright © 2010 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
16v8mil_04
1
April 2010
Devices have been discontinued.
• 50% REDUCTION IN POWER FROM BIPOLAR
— 75mA Typ Icc
Specifications GAL16V8D-7/10/883
Absolute Maximum Ratings(1)
Recommended Operating Conditions
Supply voltage VCC ...................................... –0.5 to +7V
Input voltage applied .......................... –2.5 to VCC +1.0V
Off-state output voltage applied ......... –2.5 to VCC +1.0V
Storage Temperature ................................ –65 to 150°C
Case Temperature with
Power Applied ........................................ –55 to 125°C
Case Temperature (TC) .............................. –55 to 125°C
Supply voltage (VCC)
with Respect to Ground ..................... +4.50 to +5.50V
DC Electrical Characteristics
Over Recommended Operating Conditions (Unless Otherwise Specified)
SYMBOL
VIL
VIH
IIL1
IIH
VOL
VOH
IOL
IOH
IOS2
ICC
MIN.
TYP.3
MAX.
UNITS
Input Low Voltage
Vss – 0.5
—
0.8
V
Input High Voltage
2.0
—
Vcc+1
V
PARAMETER
CONDITION
Input or I/O Low Leakage Current
0V ≤ VIN ≤ VIL (MAX.)
—
—
–100
μA
Input or I/O High Leakage Current
3.5V ≤ VIN ≤ VCC
—
—
10
μA
Output Low Voltage
IOL = MAX. Vin = VIL or VIH
—
—
0.5
V
Output High Voltage
IOH = MAX. Vin = VIL or VIH
2.4
—
—
V
Low Level Output Current
—
—
12
mA
High Level Output Current
—
—
–2
mA
–30
—
–150
mA
—
75
130
mA
Output Short Circuit Current
VCC = 5V VOUT = 0.5V TA= 25°C
Operating Power
VIL = 0.5V VIH = 3.0V
L-7/-10
Supply Current
ftoggle = 15MHz Outputs Open
1) The leakage current is due to the internal pull-up on all pins. See Input Buffer section for more information.
2) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester
ground degradation. Characterized but not 100% tested.
3) Typical values are at Vcc = 5V and TA = 25 °C
2
Devices have been discontinued.
1.Stresses above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress only ratings and functional operation of the device at these
or at any other conditions above those indicated in the operational
sections of this specification is not implied (while programming,
follow the programming specifications).
Specifications GAL16V8D-7/10/883
AC Switching Characteristics
Over Recommended Operating Conditions
PARAMETER
fmax3
twh
twl
ten
tdis
-7
-10
MIN. MAX.
MIN. MAX.
DESCRIPTION
UNITS
A
Input or I/O to Combinational Output
1
7.5
2
10
ns
A
Clock to Output Delay
1
6
1
7
ns
—
Clock to Feedback Delay
—
6
—
7
ns
—
Setup Time, Input or Feedback before Clock↑
7
—
10
—
ns
—
Hold Time, Input or Feedback after Clock↑
0
—
0
—
ns
A
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
76.9
—
58.8
—
MHz
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
76.9
—
58.8
—
MHz
A
Maximum Clock Frequency with
No Feedback
100
—
62.5
—
MHz
—
Clock Pulse Duration, High
5
—
8
—
ns
—
Clock Pulse Duration, Low
5
—
8
—
ns
B
Input or I/O to Output Enabled
1
9
—
10
ns
B
OE to Output Enabled
1
7
—
10
ns
C
Input or I/O to Output Disabled
1
9
—
10
ns
C
OE to Output Disabled
1
7
—
10
ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section.
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
MAXIMUM*
UNITS
TEST CONDITIONS
CI
Input Capacitance
10
pF
VCC = 5.0V, VI = 2.0V
CI/O
I/O Capacitance
10
pF
VCC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
3
Devices have been discontinued.
tpd
tco
tcf2
tsu
th
TEST
COND1.
Specifications GAL16V8D/883
Absolute Maximum Ratings(1)
Recommended Operating Conditions
Supply voltage VCC ...................................... –0.5 to +7V
Input voltage applied .......................... –2.5 to VCC +1.0V
Off-state output voltage applied ......... –2.5 to VCC +1.0V
Storage Temperature ................................ –65 to 150°C
Case Temperature with
Power Applied ........................................ –55 to 125°C
Case Temperature (TC) .............................. –55 to 125°C
Supply voltage (VCC)
with Respect to Ground ..................... +4.50 to +5.50V
DC Electrical Characteristics
Over Recommended Operating Conditions (Unless Otherwise Specified)
SYMBOL
VIL
VIH
IIL
IIH
VOL
VOH
IOL
IOH
IOS1
ICC
MIN.
TYP.2
MAX.
UNITS
Input Low Voltage
Vss – 0.5
—
0.8
V
Input High Voltage
2.0
—
Vcc+1
V
PARAMETER
CONDITION
Input or I/O Low Leakage Current
0V ≤ VIN ≤ VIL (MAX.)
—
—
–10
μA
Input or I/O High Leakage Current
3.5V ≤ VIN ≤ VCC
—
—
10
μA
Output Low Voltage
IOL = MAX. Vin = VIL or VIH
—
—
0.5
V
Output High Voltage
IOH = MAX. Vin = VIL or VIH
2.4
—
—
V
Low Level Output Current
—
—
12
mA
High Level Output Current
—
—
–2
mA
–30
—
–150
mA
—
75
130
mA
Output Short Circuit Current
VCC = 5V VOUT = 0.5V TA= 25°C
Operating Power
VIL = 0.5V VIH = 3.0V
L -15/ -20/-30
Supply Current
ftoggle = 15MHz Outputs Open
1) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester
ground degradation. Characterized but not 100% tested.
3) Typical values are at Vcc = 5V and TA = 25 °C
4
Devices have been discontinued.
1.Stresses above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress only ratings and functional operation of the device at these
or at any other conditions above those indicated in the operational
sections of this specification is not implied (while programming,
follow the programming specifications).
Specifications GAL16V8D/883
AC Switching Characteristics
Over Recommended Operating Conditions
PARAMETER
-15
TEST DESCRIPTION
COND1.
fmax3
twh
twl
ten
tdis
-30
MIN. MAX. MIN. MAX. MIN. MAX.
UNITS
A
Input or I/O to Combinational Output
3
15
3
20
3
30
ns
A
Clock to Output Delay
2
12
2
15
2
20
ns
—
Clock to Feedback Delay
—
12
—
15
—
20
ns
—
Setup Time, Input or Feedback before Clock↑
12
—
15
—
25
—
ns
—
Hold Time, Input or Feedback after Clock↑
0
—
0
—
0
—
ns
A
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
41.6
—
33.3
—
22.2
—
MHz
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
41.6
—
33.3
—
22.2
—
MHz
A
Maximum Clock Frequency with
No Feedback
50
—
41.6
—
33.3
—
MHz
—
Clock Pulse Duration, High
10
—
12
—
15
—
ns
—
Clock Pulse Duration, Low
10
—
12
—
15
—
ns
B
Input or I/O to Output Enabled
—
15
—
20
—
30
ns
B
OE to Output Enabled
—
15
—
18
—
25
ns
C
Input or I/O to Output Disabled
—
15
—
20
—
30
ns
C
OE to Output Disabled
—
15
—
18
—
25
ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section.
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
MAXIMUM*
UNITS
TEST CONDITIONS
CI
Input Capacitance
10
pF
VCC = 5.0V, VI = 2.0V
CI/O
I/O Capacitance
10
pF
VCC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
5
Devices have been discontinued.
tpd
tco
tcf2
tsu
th
-20
Specifications GAL16V8/883
Switching Waveforms
INPUT or
I/O FEEDBACK
VALID INPUT
tsu
th
CLK
VALID INPUT
tco
REGISTERED
OUTPUT
tpd
COMBINATIONAL
OUTPUT
1/fmax
(external fdbk)
Combinatorial Output
Registered Output
INPUT or
I/O FEEDBACK
OE
tdis
ten
tdis
COMBINATIONAL
OUTPUT
ten
REGISTERED
OUTPUT
Input or I/O to Output Enable/Disable
twh
OE to Output Enable/Disable
twl
CLK
1/ fmax (internal fdbk)
CLK
tcf
1/ fmax
(w/o fb)
REGISTERED
FEEDBACK
Clock Width
fmax with Feedback
6
tsu
Devices have been discontinued.
INPUT or
I/O FEEDBACK
Specifications GAL16V8/883
fmax Descriptions
CLK
LOGIC
ARRAY
REGISTER
CLK
LOGIC
ARRAY
tco
fmax with External Feedback 1/(tsu+tco)
REGISTER
Note: fmax with external feedback is calculated from measured
tsu and tco.
t cf
t pd
CLK
fmax with Internal Feedback 1/(tsu+tcf)
LOGIC
ARRAY
REGISTER
Note: tcf is a calculated value, derived by subtracting tsu from
the period of fmax w/internal feedback (tcf = 1/fmax - tsu). The
value of tcf is used primarily when calculating the delay from
clocking a register to a combinatorial output (through registered
feedback), as shown above. For example, the timing from clock
to a combinatorial output is equal to tcf + tpd.
tsu + th
fmax with No Feedback
Note: fmax with no feedback may be less than 1/(twh + twl). This
is to allow for a clock duty cycle of other than 50%.
Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
+5V
GND to 3.0V
3ns 10% – 90%
1.5V
1.5V
Output Load
R1
See Figure
3-state levels are measured 0.5V from steady-state active level.
FROM OUTPUT (O/Q)
UNDER TEST
TEST POINT
Output Load Conditions (see figure)
Test Condition
A
B
C
Active High
Active Low
Active High
Active Low
R1
R2
CL
390Ω
∞
390Ω
∞
390Ω
750Ω
750Ω
750Ω
750Ω
750Ω
50pF
50pF
50pF
5pF
5pF
R2
C L*
*C L INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
7
Devices have been discontinued.
tsu
Specifications GAL16V8/883
GAL16V8 Ordering Information (MIL-STD-883 and SMD)
Ordering #
Tpd
(ns)
Tsu
(ns)
Tco
(ns)
Icc
(mA)
7.5
7
6
130
20-Pin CERDIP
GAL16V8D-7LD/8832
130
20-Pin LCC
GAL16V8D-7LR/8831
10
10
7
130
15
20
30
12
15
25
12
15
20
130
MIL-STD-883
20-Pin CERDIP
20-Pin LCC
20-Pin CERDIP
SMD #
5962-8983907RA
5962-89839072A
GAL16V8D-10LD/883
2
5962-8983904RA
GAL16V8D-10LR/883
2
5962-89839042A
GAL16V8D-15LD/883
2
5962-8983903RA
2
5962-89839032A
130
20-Pin LCC
GAL16V8D-15LR/883
130
20-Pin CERDIP
GAL16V8D-20LD/8832
5962-8983902RA
130
20-Pin LCC
GAL16V8D-20LR/8832
5962-89839022A
2
5962-8983901RA
130
20-Pin CERDIP
GAL16V8D-30LD/883
Note: Lattice Semiconductor recognizes the trend in military device procurement
towards using SMD compliant devices, as such, ordering by this number is recommended.
1. Discontinued per PCN #06-07.
2. Discontinued per PCN #05A-10.
Part Number Description
XXXXXXXX _ XX
X X X
GAL16V8D Device Name
MIL Process /883 = 883 Process
Speed (ns)
Package D = CERDIP
R = LCC
L = Low Power Power
8
Devices have been discontinued.
130
Package