GAL22V10/883

GAL22V10/883
High Performance E2CMOS PLD
Generic Array Logic™
Features
Functional Block Diagram
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
— 10 ns Maximum Propagation Delay
— Fmax = 166 MHz
— 7ns Maximum from Clock Input to Data Output
— TTL Compatible 12 mA Outputs
— UltraMOS® Advanced CMOS Technology
RESET
I/CLK
8
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
I
10
• ACTIVE PULL-UPS ON ALL PINS
12
• COMPATIBLE WITH STANDARD 22V10 DEVICES
— Fully Function/Fuse-Map/Parametric Compatible
with Bipolar and UVCMOS 22V10 Devices
• 50% REDUCTION IN POWER VERSUS BIPOLAR
PROGRAMMABLE
AND-ARRAY
(132X44)
I
I
2
• E CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
I
I
• TEN OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
I
• PRELOAD AND POWER-ON RESET OF REGISTERS
— 100% Functional Testability
I
• APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
14
16
16
14
12
I
10
I
8
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
I
PRESET
Description
Pin Configuration
The GAL22V10/883 is a high performance E2CMOS programmable
logic device processed in full compliance to MIL-STD-883. This
military grade device combines a high performance CMOS process
with Electrically Erasable (E2) floating gate technology to provide
the highest speed performance available of any military qualified
22V10 device. CMOS circuitry allows the GAL22V10 to consume
much less power when compared to bipolar 22V10 devices. E2
technology offers high speed (<100ms) erase times, providing the
ability to reprogram or reconfigure the device quickly and efficiently.
CERDIP
4
I
2
I/CLK
28
25
I
I
The generic architecture provides maximum design flexibility by
allowing the Output Logic Macrocell (OLMC) to be configured by
the user. The GAL22V10 is fully function/fuse map/parametric compatible with standard bipolar and CMOS 22V10 devices.
GAL22V10
NC
I
Top View
9
23
I/O/Q
21
I/O/Q
NC
I
I/O/Q
I/O/Q
19
18
16
NC
I
14
I
11
12
I
Unique test circuitry and reprogrammable cells allow complete AC,
DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and
data retention in excess of 20 years are specified.
I/O/Q
GND
I
I/O/Q
I/O/Q
7
24
I/O/Q
GAL
22V10
I
I
I
Vcc
I/O/Q
I
26
5
1
I
I/O/Q
I/O/Q
Vcc
NC
I/CLK
I
I
LCC
I/O/Q
I/O/Q
6
I/O/Q
18
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I/O/Q
I/O/Q
I
GND
12
13
I
Copyright © 2010 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
22v10mil_05
1
May 2010
Devices have been discontinued.
I
Specifications GAL22V10D/883
Absolute Maximum Ratings(1)
Recommended Operating Conditions
Supply voltage VCC ....................................... -0.5 to +7V
Input voltage applied ........................... -2.5 to VCC +1.0V
Off-state output voltage applied .......... -2.5 to VCC +1.0V
Storage Temperature ................................. -65 to 150°C
Case Temperature with
Power Applied ......................................... -55 to 125°C
Case Temperature (TC) ............................... -55 to 125°C
Supply Voltage (VCC)
with Respect to Ground ..................... +4.50 to +5.50V
DC Electrical Characteristics
Over Recommended Operating Conditions (Unless Otherwise Specified)
SYMBOL
VIL
VIH
IIL1
IIH
VOL
VOH
IOL
IOH
IOS2
ICC
MIN.
TYP.3
MAX.
UNITS
Input Low Voltage
Vss - 0.5
—
0.8
V
Input High Voltage
2.0
—
Vcc+1
V
PARAMETER
CONDITION
Input or I/O Low Leakage Current
0V ≤ VIN ≤ VIL (MAX.)
—
—
-100
μA
Input or I/O High Leakage Current
3.5V ≤ VIN ≤ VCC
—
—
10
μA
Output Low Voltage
IOL = MAX. Vin = VIL or VIH
—
—
0.5
V
Output High Voltage
IOH = MAX. Vin = VIL or VIH
2.4
—
—
V
Low Level Output Current
—
—
12
mA
High Level Output Current
—
—
-2.0
mA
-50
—
-135
mA
—
90
150
mA
Output Short Circuit Current
VCC = 5V
VOUT = 0.5V TA = 25°C
Operating Power
VIL = 0.5V VIH = 3.0V
L -10/-15/-20/-25/-30
Supply Current
ftoggle = 15MHz Outputs Open
1) The leakage current is due to the internal pull-up on all pins. See Input Buffer section for more information.
2) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester
ground degradation. Characterized but not 100% tested.
3) Typical values are at Vcc = 5V and TA = 25 °C.
2
Devices have been discontinued.
1. Stresses above those listed under the “Absolute Maximum
Ratings” may cause permanent damage to the device. These
are stress only ratings and functional operation of the device
at these or at any other conditions above those indicated in
the operational sections of this specification is not implied
(while programming, follow the programming specifications).
Specifications GAL22V10D/883
AC Switching Characteristics
Over Recommended Operating Conditions
PARAMETER
fmax3
twh
twl
ten
tdis
tar
tarw
tarr
tspr
-10
DESCRIPTION
-15
MIN. MAX. MIN. MAX.
UNITS
A
Input or I/O to Combinatorial Output
—
10
—
15
ns
A
Clock to Output Delay
—
7
—
8
ns
—
Clock to Feedback Delay
—
7
—
8
ns
—
Setup Time, Input or Feedback before Clock↑
6
—
12
—
ns
—
Hold Time, Input or Feedback after Clock↑
0
—
0
—
ns
A
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
76.9
—
50
—
MHz
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
76.9
—
50
—
MHz
A
Maximum Clock Frequency with
No Feedback
166
—
62.5
—
MHz
—
Clock Pulse Duration, High
3
—
8
—
ns
—
Clock Pulse Duration, Low
3
—
8
—
ns
B
Input or I/O to Output Enabled
—
10
—
15
ns
C
Input or I/O to Output Disabled
—
12
—
15
ns
A
Input or I/O to Asynchronous Reset of Register
—
12
—
20
ns
—
Asynchronous Reset Pulse Duration
10
—
15
—
ns
—
Asynchronous Reset to Clock Recovery Time
6
—
15
—
ns
—
Synchronous Preset to Clock Recovery Time
10
—
12
—
ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section.
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
MAXIMUM*
UNITS
TEST CONDITIONS
CI
Input Capacitance
10
pF
VCC = 5.0V, VI = 2.0V
CI/O
I/O Capacitance
10
pF
VCC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
3
Devices have been discontinued.
tpd
tco
tcf2
tsu
th
TEST
COND.1
Specifications
Specifications
GAL22V10D/883
GAL22V10/883
AC Switching Characteristics
Over Recommended Operating Conditions
PARAMETER
fmax3
twh
twl
ten
tdis
tar
tarw
tarr
tspr
-20
DESCRIPTION
-25
-30
MIN. MAX. MIN. MAX. MIN. MAX.
UNITS
A
Input or I/O to Combinatorial Output
—
20
—
25
—
30
ns
A
Clock to Output Delay
—
15
—
20
—
20
ns
—
Clock to Feedback Delay
—
15
—
20
—
20
ns
—
Setup Time, Input or Feedback before Clock↑
17
—
20
—
25
—
ns
—
Hold Time, Input or Feedback after Clock↑
0
—
0
—
0
—
ns
A
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
31.2
—
25
—
22
—
MHz
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
31.2
—
25
—
22
—
MHz
A
Maximum Clock Frequency with
No Feedback
33
—
33
—
25
—
MHz
—
Clock Pulse Duration, High
15
—
15
—
20
—
ns
—
Clock Pulse Duration, Low
15
—
15
—
20
—
ns
B
Input or I/O to Output Enabled
—
20
—
25
—
25
ns
C
Input or I/O to Output Disabled
—
20
—
25
—
25
ns
A
Input or I/O to Asynchronous Reset of Register
—
25
—
30
—
30
ns
—
Asynchronous Reset Pulse Duration
20
—
25
—
30
—
ns
—
Asynchronous Reset to Clock Recovery Time
20
—
25
—
30
—
ns
—
Synchronous Preset to Clock Recovery Time
17
—
20
—
25
—
ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section.
Capacitance (TA = 25°C, f = 1/0 MHz)
SYMBOL
PARAMETER
MAXIMUM*
UNITS
TEST CONDITIONS
CI
Input Capacitance
10
pF
VCC = 5.0V, VI = 2.0V
CI/O
I/O Capacitance
10
pF
VCC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
4
Devices have been discontinued.
tpd
tco
tcf2
tsu
th
TEST
COND.1
Specifications GAL22V10/883
Switching Waveforms
INPUT or
I/O FEEDBACK
INPUT or
I/O FEEDBACK
VALID INPUT
VALID INPUT
ts u
th
t pd
CLK
COMBINATORIAL
OUTPUT
tc o
Combinatorial Output
1 / fm a x
(external fdbk)
Registered Output
INPUT or
I/O FEEDBACK
t dis
t en
OUTPUT
CLK
1 / fm ax (int ern al fd bk )
Input or I/O to Output Enable/Disable
t su
tc f
REGISTERED
FEEDBACK
fmax with Feedback
t wh
t wl
CLK
1/ fma x
(w/o fdbk)
Clock Width
INPUT or
I/O FEEDBACK
DRIVING SP
INPUT or
I/O FEEDBACK
DRIVING AR
tsu
t spr
th
tarw
CLK
CLK
tarr
tco
REGISTERED
OUTPUT
REGISTERED
OUTPUT
tar
Synchronous Preset
Asynchronous Reset
5
Devices have been discontinued.
REGISTERED
OUTPUT
Specifications GAL22V10/883
fmax Descriptions
CLK
LOGIC
ARRAY
CLK
LOGIC
ARRAY
REGISTER
REGISTER
tco
t cf
t pd
fmax with External Feedback 1/(tsu+tco)
fmax with Internal Feedback 1/(tsu+tcf)
Note: fmax with external feedback is calculated from measured tsu and tco.
Note: tcf is a calculated value, derived by subtracting tsu from the period of fmax w/internal
feedback (tcf = 1/fmax - tsu). The value of tcf is
used primarily when calculating the delay from
clocking a register to a combinatorial output
(through registered feedback), as shown above.
For example, the timing from clock to a combinatorial output is equal to tcf + tpd.
CLK
LOGIC
ARRAY
REGISTER
tsu + th
fmax with No Feedback
Note: fmax with no feedback may be less
than 1/(twh + twl). This is to allow for a
clock duty cycle of other than 50%.
Switching Test Conditions
Input Pulse Levels
+5V
GND to 3.0V
Input Rise and Fall Times
3ns 10% – 90%
Input Timing Reference Levels
1.5V
Output Timing Reference Levels
1.5V
Output Load
R1
See Figure
FROM OUTPUT (O/Q)
UNDER TEST
3-state levels are measured 0.5V from steady-state active
level.
Output Load Conditions (see figure)
Test Condition
B
C
R2
R1
R2
CL
390Ω
750Ω
50pF
Active High
∞
750Ω
50pF
Active Low
390Ω
750Ω
50pF
Active High
∞
750Ω
5pF
Active Low
390Ω
750Ω
5pF
A
TEST POINT
C L*
*C L INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
6
Devices have been discontinued.
tsu
Specifications GAL22V10/883
GAL22V10 Ordering Information (MIL-STD-883 and SMD)
Ordering #
Tpd
(ns)
Tsu
(ns)
Tco
(ns)
Icc
(mA)
Package
10
6
7
150
24-Pin CERDIP
150
15
17
8
15
28-Pin LCC
SMD #
GAL22V10D-10LD/8831
5962-8984106LA
GAL22V10D-10LR/883
1
5962-89841063A
1
5962-8984103LA
150
24-Pin CERDIP
GAL22V10D-15LD/883
150
28-Pin LCC
GAL22V10D-15LR/8831
5962-89841033A
GAL22V10D-20LD/883
1
5962-8984102LA
GAL22V10D-20LR/883
1
5962-89841023A
1
5962-8984104LA
5962-8984101LA
150
150
24-Pin CERDIP
28-Pin LCC
25
20
20
150
24-Pin CERDIP
GAL22V10D-25LD/883
30
25
20
150
24-Pin CERDIP
GAL22V10D-30LD/8831
Note: Lattice Semiconductor recognizes the trend in military device procurement towards
using SMD compliant devices, as such, ordering by this number is recommended.
1. Discontinued per PCN #05A-10.
Part Number Description
XXXXXXXX _ XX
X X X
GAL22V10D Device Name
Speed (ns)
MIL Process /883 = 883 Process
L = Low Power Power
Package D = CERDIP
R = LCC
7
Devices have been discontinued.
20
12
MIL-STD-883