PT4452 PLL-based OOK/ASK/FSK Transmitter IC DESCRIPTION FEATURES PT4452 is a high performance OOK/ASK/FSK transmitter for the Remote Keyless Entry (RKE) systems. It consists of a power amplifier, one-shot circuit and phase-locked loop with internal voltage controlled oscillator and loop filter. The one-shot circuit controls the phase-locked loop and power amplifier to have fast start-up time in operation. • • • • • Highly integrated OOK/ASK/FSK transmitter High output power, 3V/+11dBm/17mA Low supply voltage, 2.4V to 3.6V operation range Low external component cost. PLL-based transmitter with frequency range from 300MHz to 450MHz • On-chip one-shot circuit • 60 dB RF on-off ratio for OOK/ASK modulation • SOP8 package APPLICATIONS • • • • • • Keyless entry systems Remote control systems Garage door openers Alarm systems Security systems Wireless sensors BLOCK DIAGRAM PAOUT VSSPA DIN VDD 8 7 6 5 Vreg Oneshot PA PLL 1 MODSEL 2 3 4 XOUT XIN CE Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan PT4452 APPLICATION CIRCUIT VDD R3 C3 VDD ASK L1 FSK MODSEL PAOUT 8 2 XOUT VSSPA 7 3 XIN DIN 6 C2 4 CE VDD 5 R4 VDD 1 C1 X1 C4 C7 EN L2 C5 C6 R1 DIN R2 VDD BILL OF MATERIALS Part X1 R1 R2 R3 R4 C1 C2 C3 C4 C5 C6 C7 L1 L2 Value 315MHz 9.844M 10K 100K 0 0 22p 22p 1μ 220p 8.2p 18p 2.2μ 180n 33n 433.92MHz 13.56M 10K 100K 0 0 18p 18p 1u 220p 4.7p 10p 2.2μ 180n 27n Unit Hz Ohm Ohm Ohm Ohm F F F F F F F H H Notes: 1. C1/C2 can be used to trim the transmitted signal frequency for matching the specified value. 2. For FSK application to have adequate frequency deviation, and accurate carrier frequency, the crystal resonator frequency will be lower than the specified value. The recommended crystal resonator frequency is 9.8388MHz and 13.5545MHz for 315MHz and 433.92MHz band. The loading capacitor C1/C2 will put below 20pF to have ±50KHz pulling frequency deviation at least. 3. L2/C5/C6 value will depend on PCB layout. 4. The recommend maximum ESR value of X1 is 40Ω. V1.0 2 December 2012 PT4452 ORDER INFORMATION Valid Part Number PT4452-S Package Type 8-Pin, SOP, 150MIL Top Code PT4452-S PIN CONFIGURATION PIN DESCRIPTION Pin Name MODSEL XOUT XIN CE VDD DIN VSSPA PAOUT V1.0 I/O I O I I P I G O Description ASK/FSK modulation selection. “0”=ASK, “1”=FSK Oscillator output Oscillator input Chip enables. “1” to enable the chip Power supply Data input Power amplifier ground Power amplifier output 3 Pin No. 1 2 3 4 5 6 7 8 December 2012 PT4452 FUNCTION DESCRIPTION PA OUTPUT MATCHING The PA output is an open-drain structure. Its output connects a large choke inductor to supply voltage and follows by a DC block capacitor. After the DC block capacitor, a C-L-C π-type matching network is used to tune with the antenna impedance. The inductor and capacitor values may be different from the suggestion value depending on PCB material, PCB thickness, ground configuration, and the layout traces length. For the open-drain structure in PA, the HBM (Human Body Mode) and MM (Machine Mode) ESD strength is 4KV and 400V. REFERENCE OSCILLATOR For a quartz crystal to oscillate in the specified frequency, it should work with vendor provided load capacitor value, called CL. The load capacitor is about 12pF to 18pF in general. In PT4452, the Pierce type crystal oscillator is used, and the shunt capacitor over XIN and XOUT is in series together equivalently. The shunt capacitor should be placed as 2x CL to oscillate with specified frequency. The temperature coefficient of quartz crystal will cause the VCO output frequency drift in high/low temperature range. In the FSK mode, the DIN signal will connect/disconnect the internal shunt capacitor over XIN and XOUT. The shunt capacitor connected inside the chip is about 7pF. With a fixed divided-by-32 PLL, the fREFOSC = fTX / 32. The following table list fREFOSC for some common transmit frequencies Transmit Frequency fTX Reference Oscillator Frequency fREFOSC 315MHz 9.844MHz 340MHz 10.625MHz 390MHz 12.188MHz 433.92MHz 13.56MHz The recommend maximum ESR value of reference oscillator is 40Ω. PHASE-LOCKED LOOP (PLL) The PT4452 own a fixed divided-by-32 PLL to generate the transmitter signal. The PLL consists of the voltage-controlled oscillator (VCO), crystal oscillator, asynchronous ÷ 32 divider, charge pump, loop filter and phase-frequency detector (PFD). All these circuits are integrated on-chip. The PFD compares two signals and produces an error signal which is proportional to the difference between the input phases. The error signal passes through a loop filter with an approximately 180KHz bandwidth, and is used to control the VCO. A frequency divider placed after the VCO and it will feedback the divided signal to PFD. In the final the VCO will get locked to reference signal as fVCO = fREFOSC × 32. The block diagram below shows the basic elements of the PLL. The PLL chain circuit is supplied by internal voltage regulator to ease the PA pulling and crystal spur issue V1.0 4 December 2012 PT4452 ONE-SHOT CIRCUIT AND POWER-DOWN CONTROL During the signal transmission, the crystal oscillator start-up time will limit its wake-up time to work. A one-shoot circuit is used to solve this problem by turning on/off the power amplifier and PLL circuit separately. In OOK/ASK mode, applied “HIGH” to DIN, will enable the PLL chain and PA. When applied “LOW” to DIN, the PA will be turn-off immediately, and the PLL chain will be turn-off after one-shot period about 50ms. In FSK mode, “HIGH” and “LOW” signal in DIN will pull the VCO to higher or lower frequency. To enter the power-down mode, CE needs to tie “LOW”. A summary table below to state the relationship between them, CE 1 1 1 1 0 0 0 0 MODSEL 0 0 1 1 X X X X DIN 0 1 0 1 X X X X MODE ASK ASK FSK FSK X X X X PLL Off, after one-shot delay On On, VCO to lower frequency On, VCO to higher frequency Off Off Off Off PA Off On On On Off Off Off Off To calculate the re-triggerable one-shot delay time, it can be counted as 688128 / fREFOSC . For fREFOSC = 9.844MHz and 13.56MHz, the delay time is about 70ms and 50ms. ANTENNA DESIGN AND PCB LAYOUT CONSIDERATION For a λ/4 dipole antenna and operating frequency, f (in MHz), the required antenna length, L (in cm), may be calculated by using the formula 7132 L= f For example, if the frequency is 315 MHz, then the length of a λ/4 antenna is 22.6cm. If the calculated antenna length is too long for the application, then it may be reduced to λ/8, λ/16, etc. without degrading the input return loss. Usually, when designing a λ/4 dipole antenna, it is better to use a single conductive wire (diameter about 0.8mm to 1.6mm) rather than a multiple core wire. If the antenna is printed on the PCB, ensure there is neither any component nor ground plane underneath the antenna on the backside of PCB. For an FR4 PCB (εr = 4.7) and a strip-width of 30 mil, the length of the antenna, L (in cm), is calculated by c where “c” is the speed of light (3 x1010 cm/s) L= 4× f × εr Proper PCB layout is extremely critical in achieving good RF performance. At the very least, using a two-layer PCB is strongly recommended, so that one layer may incorporate a continuous ground plane. A large number of via holes should connect the ground plane areas between the top and bottom layers. Careful consideration must also be paid to the supply power and ground at the board level. The larger ground area plane should be placed as close as possible to all the VSS pins. Grounding the metal case of quartz crystal and isolate the XIN/XOUT trace to other can suppress the crystal spur signal over PA output. V1.0 5 December 2012 PT4452 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Range I/O Voltage Operating Temperature Range Storage Temperature Range Symbol VDD5 – TOPR TSTG Min. -0.3 -0.3 -40 -55 Max. 5 5 +85 +125 Unit V V °C °C ELECTRICAL CHARACTERISTICS Nominal conditions: VDD=3.0V, VSS=0V, CE=“High”, TA=+27°C Parameter Symbol Conditions General Characteristics Supply Voltage VDD DIN=High(CW mode); POUT=11dBm, fRF=315MHz (Note) Operating Current IDD DIN=High(CW mode); POUT=10dBm, fRF=434MHz Standby Current Istandby DIN=Low; TDELAY>50ms RF Frequency Range fRF fRF=315MHz Power Amplifier Output Power (Note) Pout fRF=434MHz RF Power On / Off Ratio PEXT Phase Noise PNOISE 315MHz, 10KHz offset Harmonics (Note) PHARM 2x/3x fRF fRF=315MHz Crystal Spur PSPUR fRF=434MHz Data Input and One-Shot OOK/ASK mode Data Rate DRATE FSK mode Frequency Deviation FDEV FSK mode, CL not connected Crystal Oscillator Start-up Time TON CL not connected One-shot Delay Time TDELAY fRF=434MHz Min. Typ. Max. Unit 2.4 3.0 3.6 V - 17 - mA - 19 - mA - - 1 μA 300 - 11 10 60 -75 -40 -40 -40 450 - MHz dBm dBm dB dBc/Hz dBc dBc dBc 0.5 - 2 1 110 1 50 50 10 150 - Kbps Kbps KHz ms ms Note: Depend on power amplifier output matching V1.0 6 December 2012 PT4452 PACKAGE INFORMATION 8 Pins, SOP, 150MIL Symbol A A1 A2 b c e D E E1 L L1 θ Min. 1.35 0.10 1.25 0.33 0.170 Nom. 1.60 0.15 1.40 1.27 BSC. 4.90 6.00 3.90 0.60 1.04 REF. - 4.80 5.80 3.80 0.40 0º Max. 1.75 0.25 1.65 0.51 0.250 5.00 6.20 4.00 1.27 8º Notes: 1. Refer to JEDEC MS-012 AA 2. Unit: mm V1.0 7 December 2012 PT4452 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian Dist., New Taipei City 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw V1.0 8 December 2012