LV96/LV98 Series 3.3 V LVDS Clock Oscillators February 2016 • Pletronics LV96/LV98 Series is a quartz crystal controlled precision square wave generator with an LVDS output. • Solder pad com patible legacy LVDS oscillator solutions. • FR4 base using the LV93 or LV99 5x7 m m ceram ic packaged SMD device. • Tape and Reel packaging is available. • 10.9 to 670 MHZ • Enable/Disable Function: LV98 on pad 2 LV96 on pad 1 • Low Jitter This series, LV96 and LV98, is not recommended for new designs. * For new designs, pin-out on pad 1 is the only available option for LV99 series part. Pletronics Inc. certifies this device is in accordance with the RoHS 6/6 (2011/65/EC) and WEEE (2002/96/EC) directives. Pletronics Inc. guarantees the device does not contain the following: Cadm ium , Hexavalent Chrom ium , Lead, Mercury, PBB’s, PBDE’s W eight of the Device: 0.40 gram s Moisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e4 Absolute Maximum Ratings: Parameter Unit V CC Supply Voltage -0.5V to +6.5V Vi Input Voltage -0.5V to V CC + 0.5V Vo Output Voltage -0.5V to V CC + 0.5V Thermal Characteristics The m axim um die or junction tem perature is 155 oC The therm al resistance junction to board is 40 to 80 oC/W att depending on the solder pads, ground plane and construction of the PCB. P roduct inform ation is current as of publication date. T he product conform s to specifications per the term s of the P letronics standard warranty. Production processsing does not necessarily include testing of all param eters. Copyright © 2010, Pletronics Inc. LV96/LV98 Series 3.3 V LVDS Clock Oscillators February 2016 Part Number: LV9x 45 D E V -125.0M -XX Packaging code or blank T250 = 250 per Tape and Reel T500 = 500 per Tape and Reel T1K = 1000 per Tape and Reel Frequency in M HZ Supply Voltage V CC V = 3.3V _ + 10% Temperature blank = -10 C = -20 E = -40 Range to +70 oC to +70 oC to +85 oC Series M odel Frequency Stability 45 = + _ 50 ppm 44 = + _ 25 ppm 20 = + _ 20 ppm Series M odel (x is 6 or 8) Part M arking: PLE LV9x FF.FFF M C YMDXX Marking Legend: PLE = Pletronics X = 6 or 8 FF.FFF M = Frequency in MHZ YMD = Date of Manufacture (year-m onth-day) All other m arking is internal factory codes Codes for Date Code YM D Code 4 Code A 5 6 7 8 B C D E F G H J K L M Year 2014 2015 2016 2017 2018 Month JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC Code Day Code Day 1 1 H 17 2 2 J 18 www.pletronics.com 3 3 K 19 4 4 L 20 5 5 M 21 6 6 N 22 425-776-1880 7 7 P 23 8 8 R 24 9 9 T 25 A 10 U 26 B 11 V 27 C 12 W 28 D 13 X 29 E 14 Y 30 F 15 Z 31 2 G 16 LV96/LV98 Series 3.3 V LVDS Clock Oscillators February 2016 Electrical Specification for 3.30V + _10% over the specified temperature range and the frequency range of 10.9 MHz to 670 MHz Item Min Max Unit Condition Frequency Accuracy “45" -50 +50 ppm “44" -25 +25 For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures “20" -20 +20 Output Waveform LVDS Output High Level -- 1.60 Volts Output Low Level 0.90 -- Volts Differential Output (VOD) 250 450 mVolts 1.125 1.375 Volts Differential Output Error (dVOS) -- 50 mVolts Output Symmetry 47 53 % Referenced to 50% of amplitude or crossing point Output TRISE and TFALL 150 230 pS Vth is 20% and 80% of waveform - 0.6 pS RMS - 2.8 Output Short Circuit Current - -20 mA Vcc Supply Current - 80 mA 50 - Kohm To Vcc (equivalent resistance) V disable - 0.8 Volts Referenced to Ground V enable 2.0 - Volts Referenced to Ground VOUT = VCC -20 +20 uA VOUT = 0V -20 +20 uA Enable - 10 nS Time for output to reach a logic state Disable time - 10 nS Time for output to reach a high Z state Start up time - 5 mS Measured from the time Vcc = 3.0V -10 +70 o C Standard Temperature Range -20 +70 o C Extended Temperature Range “C” Option -40 +85 o C Extended Temperature Range “E” Option -55 +125 o C Output Offset Voltage (VOS) Jitter Enable/Disable Internal Pull-up Output leakage Operating Temperature Range Storage Temperature Range See load circuit R1 = 50 ohms Measured from 12KHz to 20MHz from Fnominal Measured from 10Hz to 20MHz from Fnominal Vout = 0.0V Pad 1 low, device disabled Specifications with E/D open circuit or connected to V CC www.pletronics.com 425-776-1880 3 LV96/LV98 Series 3.3 V LVDS Clock Oscillators February 2016 Typical Phase-Noise Response Load Circuit Test Waveform www.pletronics.com 425-776-1880 4 LV96/LV98 Series 3.3 V LVDS Clock Oscillators February 2016 Reliability: Environmental Com pliance Parameter Condition Mechanical Shock MIL-STD-883 Method 2002, Condition B Vibration MIL-STD-883 Method 2007, Condition A Solderability MIL-STD-883 Method 2003 Thermal Shock MIL-STD-883 Method 1011, Condition A ESD Rating Model Minimum Voltage Conditions Human Body Model 1500 MIL-STD-883 Method 3115 Charged Device Model 1000 JESD 22-C101 Package Labeling Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Courier New Bar code is 39-Full ASCII (The part number will show as LV96xx or LV98xx) Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Arial Layout and application information For • • • • Optim um Jitter Perform ance, Pletronics recom m ends: a ground plane under the device no large transient signals (both current and voltage) should be routed under the device do not layout near a large m agnetic field such as a high frequency switching power supply do not place near piezoelectric buzzers or m echanical fans. As m uch ground plane and therm al paths that can be realized under and to the side of the part is desired . www.pletronics.com 425-776-1880 5 LV96/LV98 Series 3.3 V LVDS Clock Oscillators February 2016 Mechanical: Inches mm B 0.356 + _0.005 9.04 + _0.13 C 0.126 + _0.005 3.21 + _0.13 D 0.324 + _0.005 8.23 + _0.13 1 0.050 1.27 G1 0.040 1.02 H1 0.059 1.50 I1 0.020 0.51 J1 0.040 1.02 K1 0.100 2.54 L1 0.062 1.57 F FR4 PCB Base: Solder masked Label: laser marked lettering All via holes tented on bottom Copper Clad 670 µinch (17 µm) Nickel plated 118 µinch (3 µm) Gold plated 0.8 µinch (0.02 µm) Typical thicknesses Pin 3 Ground plane is typical Not to scale LV98 Pad LV96 Pad Function Note 2 1 Output When this pad is not connected the oscillator shall operate. This is not a Enable/Disable recommended condition!!!!!! When this pad is <0.80 volts, the output will be inhibited (High impedance state) Recommend connecting this pad to VCC if the oscillator is to be always on. 1 2 No function Recommend connecting this pad to ground. The is internal connection. 3 Ground (GND) 4 Output 5 Output* 6 Supply Voltage Recommend connecting appropriate power supply bypass capacitors as close as (VCC) possible. www.pletronics.com The outputs must be terminated, 100 ohms between the outputs is the ideal termination. Capacitor coupled terminations can be used. 425-776-1880 6 LV96/LV98 Series 3.3 V LVDS Clock Oscillators February 2016 Reflow Cycle (typical for lead free processing) The part m ay be reflowed 3 tim es without degradation. Tape and Reel: available for quantities of 250 to 1000 per reel Constant Dimensions Table 1 Tape Size D0 8mm D1 Min E1 P0 1.0 S1 Min T Max T1 Max 0.6 0.6 0.1 2.0 +0.05 _ 12mm 1.5 1.5 1.75 4.0 16mm +0.1 -0.0 1.5 _ +0.1 _ +0.1 24mm P2 2.0 _ +0.1 1.5 Variable Dimensions Table 2 Tape Size B1 Max E2 Min F P1 T2 Max W Max Ao, Bo & Ko 24 mm 12.1 14.25 7.5 _ +0.1 16.0 _ +0.1 8.0 16.3 Note 1 Note 1: Embossed cavity to conform to EIA-481-B Dimensions in mm Not to scale REEL DIMENSIONS A B inches 7.0 10.0 13.0 mm 177.8 254.0 330.2 inches 2.50 4.00 3.75 mm 63.5 101.6 95.3 Tape Width 24.4 +2.0 -0.0 24.0 C mm D mm 13.0 +0.5 / -0.2 --- --- Reel dimensions may vary from the above www.pletronics.com 425-776-1880 7 LV96/LV98 Series 3.3 V LVDS Clock Oscillators February 2016 IM PORTANT NOTICE Pletronics Incorporated (PLE) reserves the right to m ake corrections, im provem ents, m odifications and other changes to this product at anytim e. PLE reserves the right to discontinue any product or service without notice. Custom ers are responsible for obtaining the latest relevant inform ation before placing orders and should verify that such inform ation is current and com plete. All products are sold subject to PLE’s term s and conditions of sale supplied at the tim e of order acknowledgm ent. PLE warrants perform ance of this product to the specifications applicable at the tim e of sale in accordance with PLE’s lim ited warranty. Testing and other quality control techniques are used to the extent PLE deem s necessary to support this warranty. Except where m andated by specific contractual docum ents, testing of all param eters of each product is not necessarily perform ed. PLE assum es no liability for application assistance or custom er product design. Custom ers are responsible for their products and applications using PLE com ponents. To m inim ize the risks associated with the custom er products and applications, custom ers should provide adequate design and operating safeguards. PLE products are not designed, intended, authorized or warranted to be suitable for use in life support applications, devices or system s or other critical applications that m ay involve potential risks of death, personal injury or severe property or environm ental dam age. Inclusion of PLE products in such applications is understood to be fully at the risk of the custom er. Use of PLE products in such applications requires the written approval of an appropriate PLE officer. Questions concerning potential risk applications should be directed to PLE. PLE does not warrant or represent that any license, either express or im plied, is granted under any PLE patent right, copyright, artwork or other intellectual property right relating to any com bination, m achine or process which PLE product or services are used. Inform ation published by PLE regarding third-party products or services does not constitute a license from PLE to use such products or services or a warranty or endorsem ent thereof. Use of such inform ation m ay require a license from a third party under the patents or other intellectual property of the third party, or a license from PLE under the patents or other intellectual property of PLE. Reproduction of inform ation in PLE data sheets or web site is perm issible only if the reproduction is without alteration and is accom panied by associated warranties, conditions, lim itations and notices. Reproduction of this inform ation with alteration is an unfair and deceptive business practice. PLE is not responsible or liable for such altered docum ents. Resale of PLE products or services with statem ents different from or beyond the param eters stated by PLE for that product or service voids all express and im plied warranties for the associated PLE product or service and is an unfair or deceptive business practice. PLE is not responsible for any such statem ents. Pletronics Inc. Contacting Pletronics Inc. Tel: 425-776-1880 19013 36 th Ave. W est Fax: 425-776-2760 Lynnwood, W A 98036-5761 USA E-m ail: ple-sales@ pletronics.com URL: www.pletronics.com Copyright © 2008, 2010, Pletronics Inc. www.pletronics.com 425-776-1880 8 LV96/LV98 Series 3.3 V LVDS Clock Oscillators February 2016 PLETRONICS INC. DOCUMENT CONTROL This is the document control page. This is not printed or part of the PDF that can be downloaded on the web site. This is to keep the history of the datasheet document and all revisions. Part Number Family: Document File Name: PDF File Name: Written By: Approved By: LVDS 99 Series LV96 LV98.wpd lv96 lv98.pdf R Gubser Revision History: January 2008 Initial Release April 26, 2010 Added the “C” temperature range, Added 3 reflows Rag February 3, 2016 Updated company logo, RoHS information and date code range. www.pletronics.com 425-776-1880 9