VISHAY SILICONIX www.vishay.com Power MOSFETs Application Note 841 Electro-Thermal Simulation of Vishay Siliconix Power MOSFETs on a PSpice Platform By Kandarp Pandya INTRODUCTION Currently, separate R-C thermal and PSpice circuit models are provided on the product information page for each power MOSFET on the Vishay website. Previously, designers were required to perform separate simulations for electrical and thermal circuits, but now Vishay Siliconix provides a combined electro-thermal model for total simulation. Application note AN838(1) describes a step-by-step procedure for downloading the PSpice model library (*_PS.LIB) file and schematic symbol (*_PS.OLB) file from the Vishay website, using OrCAD capture to build the schematic and running simulations to analyze the electrical design. The simulation also enables the extraction of a text file from the simulation results, which defines the “Power Profile” for the MOSFET. The analogy between electrical and thermal parameters facilitates the use of electrical simulation platforms like OrCAD for the thermal analysis of power MOSFETs. Application note AN609(2) defines the analogy of electrical parameters with thermal parameters, establishes tank and filter (Cauer and Foster(3)) R-C thermal model configurations, and outlines how to extract the corresponding parameters (*_RC.PDF) and use them on a PSpice platform. This simulation uses a suitable R-C thermal model tank and/or filter and the “Power Profile” for the MOSFET from the first simulation to study the thermal performance of the MOSFET in the electrical design also established in the first simulation. Electro-thermal simulation of a Vishay Siliconix power MOSFET uses the schematic symbol (*_PS_RC.OLB) and the corresponding PSpice model (*_PS_RC.LIB), which includes R-C thermal models' parameters. These models are available for download on the Vishay website. The application note AN838(1) provides basic guidelines for downloading and using files *.LIB and *.OLB. The simulation runs for electrical analysis using schematic symbol files Revision: 02-Apr-13 This application note will illustrate the validity of the combined model. PROOF OF CONCEPT We will use multiple electrical simulation runs using electro-thermal model files *_PS_RC.LIB / *_PS_RC.OLB to demonstrate the following: a. The results are comparable with the simulation results using standard PSpice library files *_PS.LIB / *_PS.OLB b. The runs with step input power of 1 W are comparable with the junction-to-ambient thermal transient characteristics in part datasheets and R-C thermal models - tank and filter configuration - provided in the file *_RC.PDF c. The runs with step input power of 1 W are comparable with the junction-to-case thermal transient characteristics in part datasheets and R-C thermal models - tank and filter configuration - provided in the file *_RC.PDF Application note AN838(1) is used throughout this document to guide designers in downloading, building, and running simulations. The Vishay Siliconix SQD40N06-14L power MOSFET is used in all simulation examples. CASE (a) Electrical simulation runs using electro-thermal model files *_PS_RC.LIB / *_PS_RC.OLB to compare with the simulation results using basic PSpice library files *_PS.LIB / *_PS.OLB. Circuit Description: Resistive load with square wave switching Separately build two schematics shown in the following figures 1 and 2. Figure 1 uses PS_RC part symbol file SQD40N06-14L_PS_RC.OLB, whereas figure 2 uses the basic part symbol file SQD40N06-14L_PS.OLB. Document Number: 63192 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 APPLICATION NOTE Vishay now offers an online PSpice model (*_PS_RC.LIB) and the corresponding schematic symbol (*_PS_RC.OLB) to facilitate electro-thermal simulation for Vishay Siliconix power MOSFETs on a PSpice platform. *_PS_RC.OLB and *.PS_RC.LIB, and also provides output parameters for MOSFET junction temperature (Tj), corresponding to the R-C thermal models' junction-to-ambient tank, junction-to-ambient filter, junction-to-case tank, and junction-to-case filter. Thus a single electrical simulation provides the output data to analyze the electrical as well as thermal behavior of Vishay Siliconix power MOSFETs in a design. Application Note 841 www.vishay.com Vishay Siliconix Electro-Thermal Simulation of Vishay Siliconix Power MOSFETs on a PSpice Platform R2 R2 I I 1.5E 1.5E V U1 1 D V1 = 0 VDC V2 = 4.5 VDC TD = 10 ns TR = 10 ns TF = 10 ns PW = 5 μs PER = 10 μs R1 + - V2 1E U1 1 V D V1 2 G V 15 S 3 + VDC 0 SQD40N06-14L_PS_RC Fig. 1 - Schematic for Electro-Thermal PSpice Model V1 = 0 VDC V2 = 4.5 VDC TD = 10 ns TR = 10 ns TF = 10 ns PW = 5 μs PER = 10 μs R1 + - V2 1E V1 2 G V + - S 3 15 VDC 0 SQD40N06-14L Fig. 2 - Schematic for Basic PSpice Model The results of the simulation runs are shown in the figures below. One cycle: figure 3 displays at least one complete cycle for the electro-thermal PSpice model, and figure 4 displays at least one complete cycle for the basic PSpice model. Fig. 3 - Simulation for Electro-Thermal PSpice Model Fig. 4 - Simulation for Basic PSpice Model APPLICATION NOTE Turn-On: The results display windows of figures 5 and 6 are adjusted from 0 μs to 50 ns to zoom in on the turn-on time for the respective models. Fig. 5 - Simulation for Electro-Thermal PSpice Model Revision: 02-Apr-13 Fig. 6 - Simulation for Basic PSpice Model Document Number: 63192 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Application Note 841 www.vishay.com Vishay Siliconix Electro-Thermal Simulation of Vishay Siliconix Power MOSFETs on a PSpice Platform Turn-Off: The results display windows for figures 7 and 8 are adjusted from 0 μs to 50 ns to zoom in on the turn-off time for the respective models. Fig. 7 - Simulation for Electro-Thermal PSpice Model Fig. 8 - Simulation for Basic PSpice Model We can observe from the above figures that both electrical simulations are identical. CASE (b) Electrical simulations with step input power of 1 W are comparable with the junction-to-ambient thermal transient characteristics in the part datasheet and R-C thermal models - tank and filter configuration - provided in the file *_RC.PDF. The schematic is modified with PS_RC part symbol file SQD40N06-14L_PS_RC.OLB, as shown below in figures 9 and 10. R2 1.77835E U1 1 D V1 = 0 VDC V2 = 4.5 VDC V2 + TD = 10 ns TR = 10 ns TF = 10 ns PW = 1000 s PER = 10001 s R1 1E V1 2 G + - S 3 W 15 VDC 0 SQD40N06-14L_PS_RC APPLICATION NOTE Fig. 9 - : Schematic for Electro-Thermal PSpice Model, Junction-to-Ambient Step Input, 1 W Profile Revision: 02-Apr-13 Fig. 10 - Simulation for Electro-Thermal PSpice Model, Junction-to-Ambient Step Input, 1 W Profile Document Number: 63192 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Application Note 841 www.vishay.com Vishay Siliconix Electro-Thermal Simulation of Vishay Siliconix Power MOSFETs on a PSpice Platform In figure 11, the modified simulation results window displays junction temperature excursions using junction-to-ambient tank and junction-to-ambient filter R-C thermal models, appended with junction-to-ambient thermal transient characteristics from the datasheet. Fig. 11 - Simulation for Electro-Thermal PSpice Model Junction-to-Ambient We can observe from figure 11 that junction temperature excursions using junction-to-ambient tank and junction-to-ambient filter R-C thermal models reasonably match the junction-to-ambient thermal characteristics from the datasheet. CASE (c) Electrical simulations with step input power of 1 W are comparable with the junction-to-case thermal transient characteristics in the part datasheet and R-C thermal models - tank and filter configuration - provided in the file *_RC.PDF. Modify the schematic with PS_RC part symbol file SQD40N06-14L_PS_RC.OLB, as shown in figures 12 and 13. R2 1.77835E U1 1 D APPLICATION NOTE V1 = 0 VDC V2 = 4.5 VDC TD = 10 ns TR = 10 ns TF = 10 ns PW = 1 s PER = 1.1 s R1 + - V2 1E V1 + 2 G S 3 W - 15VDC 0 SQD40N06-14L_PS_RC Fig. 12 - : Schematic for Electro-Thermal Model, Junction-to-Case Step Input, 1 W Profile Revision: 02-Apr-13 Fig. 13 - Simulation for Electro-Thermal Model, Junction-to-Case Step Input, 1 W Profile Document Number: 63192 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Application Note 841 www.vishay.com Vishay Siliconix Electro-Thermal Simulation of Vishay Siliconix Power MOSFETs on a PSpice Platform In figure 14, the modified simulation results window displays junction temperature excursions using junction-to-case tank and junction-to-case filter R-C thermal models, appended with junction-to-case thermal transient characteristics from the datasheet. Fig. 14 - Simulation for Electro-Thermal PSpice Model, Junction-to-Case We can observe from figure 14 that junction temperature excursions using junction-to-case tank and junction-to-case filter R-C thermal models reasonably match the junction-to-case thermal characteristics from the datasheet. OBSERVATIONS, CONCLUSIONS, AND NOTES IMPLEMENTATION • Electro-thermal model files *_PS_RC.LIB / *_PS_RC.OLB on the OrCAD platform, in a single simulation run, facilitate the combined design analysis covering both the electrical and thermal behavior of Vishay Siliconix power MOSFETs • At this time, electro-thermal models are available for power MOSFETs in single package configurations. APPLICATION NOTE • Case (a) electrical simulation runs using electro-thermal model files *_PS_RC.LIB / *_PS_RC.OLB compare very well with the simulation results using standard PSpice library files *_PS.LIB / *_PS.OLB - The numerical values of voltage and current match one-to-one - Slope variation in the range of nano-seconds observed in turn-on is quite acceptable and it does not have any significant effect on results • Case (b) electrical simulations with step input power of 1 W compare very well with junction-to-ambient thermal transient characteristics in the part datasheet and R-C thermal models - tank and filter configuration - provided in the file *_RC.PDF - < 2 °C variation in junction temperature values is within practically acceptable limits for junction-to-ambient system-level analysis • Case (c) electrical simulations with step input power of 1 W are comparable with junction-to-case thermal transient characteristics in the part datasheet and R-C thermal models - tank and filter configuration - provided in the file *_RC.PDF - < 0.05 °C variation in junction temperature values is within practically acceptable limits for junction-to-case transient-level analysis Revision: 02-Apr-13 • Online product information pages for Vishay Siliconix power MOSFETs will be gradually updated with electro-thermal models. • In case the models you need are not available on the product information page corresponding to the part, please submit your request under the section “Technical Questions” on the same page. ACKNOWLEDGEMENTS The author would like to acknowledge Mr. Gianluca Engeler for his contributions in successfully developing various elements of the electro-thermal models. ADDITIONAL REFERENCES (1) Application note AN838 “Using PSpice Models for Vishay Siliconix Power MOSFETs,” URL: www.vishay.com/doc?65038 (2) Application note AN609, “Thermal Simulation of Power MOSFET on PSpice Platform,” URL: www.vishay.com/doc?73554 (3) M. Renzc, V. Szekely: “A Generic Method for Thermal Multiport Model Generation of IC Packages,” 17th IEEE SEMI-THERM Symposium. Document Number: 63192 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000