INTERSIL EL5127CYZ

EL5127, EL5227, EL5327, EL5427
®
Data Sheet
2.5MHz 4, 8, 10 & 12 Channel Rail-to-Rail
Buffers
The EL5127, EL5227, EL5327, and EL5427 are low power,
high voltage rail-to-rail input/output buffers designed for use
in reference voltage buffering applications in small LCD
displays. They are available in quad (EL5127), octal
(EL5227), 10-channel (EL5327), and 12-channel (EL5427)
topologies. All buffers feature a -3dB bandwidth of 2.5MHz
and operate from just 133µA per buffer. This family also
features a continuous output drive capability of 30mA (sink
and source).
The quad channel EL5127 is available in the 10-pin MSOP
package. The 8-channel EL5227 is available in both the 20pin TSSOP and 24-pin QFN packages, the 10-channel
EL5327 in the 24-pin TSSOP and 24-pin QFN packages,
and the 12-channel EL5427 in the 28-pin TSSOP and 32-pin
QFN packages. All buffers are specified for operation over
the full -40°C to +85°C temperature range.
September 9, 2005
FN7111.2
Features
• 2.5MHz -3dB bandwidth
• Supply voltage = 4.5V to 16.5V
• Low supply current (per buffer) = 133µA
• High slew rate = 2.2V/µs
• Rail-to-rail input/output swing
• Ultra-small packages
• Pb-free plus anneal available (RoHS compliant)
Applications
• TFT-LCD drive circuits
• Electronic games
• Touch-screen displays
• Personal communication devices
• Personal digital assistants (PDAs)
• Portable instrumentation
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
1
EL5127, EL5227, EL5327, EL5427
Ordering Information
PACKAGE
TAPE &
REEL
PKG. DWG. #
TAPE &
REEL
PKG. DWG. #
EL5127CY
10-Pin MSOP
-
24-Pin QFN
(Pb-Free)
-
MDP0046
EL5127CY-T7
10-Pin MSOP
EL5327CLZ-T7
(Note)
24-Pin QFN
(Pb-Free)
7”
MDP0046
EL5127CY-T13
MDP0043
EL5327CLZ-T13
(Note)
24-Pin QFN
(Pb-Free)
13”
MDP0046
-
MDP0043
EL5327CR-T7
24-Pin TSSOP
7”
MDP0044
10-Pin MSOP
(Pb-Free)
7”
MDP0043
EL5327CR-T13
24-Pin TSSOP
13”
MDP0044
10-Pin MSOP
(Pb-Free)
13”
MDP0043
EL5327CRZ
(Note)
24-Pin TSSOP
(Pb-Free)
-
MDP0044
EL5227CL
24-Pin QFN
-
MDP0046
EL5327CRZ-T7
(Note)
24-Pin TSSOP
(Pb-Free)
7”
MDP0044
EL5227CL-T7
24-Pin QFN
7”
MDP0046
EL5327CRZ-T13 24-Pin TSSOP
(Note)
(Pb-Free)
13”
MDP0044
EL5227CL-T13
24-Pin QFN
13”
MDP0046
EL5427CL
32-Pin QFN
-
MDP0046
EL5227CLZ
(Note)
24-Pin QFN
(Pb-Free)
-
MDP0046
EL5427CL-T7
32-Pin QFN
7”
MDP0046
EL5227CLZ-T7
(Note)
24-Pin QFN
(Pb-Free)
7”
MDP0046
EL5427CL-T13
32-Pin QFN
13”
MDP0046
EL5227CLZ-T13
(Note)
24-Pin QFN
(Pb-Free)
13”
MDP0046
EL5427CLZ
(Note)
32-Pin QFN
(Pb-Free)
-
MDP0046
EL5227CR
20-Pin TSSOP
-
MDP0044
EL5427CLZ-T7
(Note)
32-Pin QFN
(Pb-Free)
7”
MDP0046
EL5227CR-T7
20-Pin TSSOP
7”
MDP0044
EL5427CLZ-T13
(Note)
32-Pin QFN
(Pb-Free)
13”
MDP0046
EL5227CR-T13
20-Pin TSSOP
13”
MDP0044
EL5427CR
28-Pin TSSOP
-
MDP0044
EL5227CRZ
(Note)
20-Pin TSSOP
(Pb-Free)
-
MDP0044
EL5427CR-T7
28-Pin TSSOP
7”
MDP0044
EL5227CRZ-T7
(Note)
20-Pin TSSOP
(Pb-Free)
7”
MDP0044
EL5427CR-T13
28-Pin TSSOP
13”
MDP0044
EL5227CRZ-T13 20-Pin TSSOP
(Note)
(Pb-Free)
13”
MDP0044
EL5427CRZ
(Note)
28-Pin TSSOP
(Pb-Free)
-
MDP0044
PART NUMBER
PART NUMBER
PACKAGE
MDP0043
EL5327CLZ
(Note)
7”
MDP0043
10-Pin MSOP
13”
EL5127CYZ
(Note)
10-Pin MSOP
(Pb-Free)
EL5127CYZ-T7
(Note)
EL5127CYZ-T13
(Note)
EL5327CL
24-Pin QFN
-
MDP0046
EL5427CRZ-T7
(Note)
28-Pin TSSOP
(Pb-Free)
7”
MDP0044
EL5327CL-T7
24-Pin QFN
7”
MDP0046
EL5427CRZ-T13 28-Pin TSSOP
(Note)
(Pb-Free)
13”
MDP0044
EL5327CL-T13
24-Pin QFN
13”
MDP0046
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2
EL5127, EL5227, EL5327, EL5427
Pinouts
EL5127
(10-PIN MSOP)
TOP VIEW
EL5227
(20-PIN TSSOP)
TOP VIEW
EL5327
(24-PIN TSSOP)
TOP VIEW
EL5427
(28-PIN TSSOP)
TOP VIEW
VIN1 1
10 VOUT1
VIN1 1
20 VOUT1
VIN1 1
24 VOUT1
VIN1 1
28 VOUT1
VIN2 2
9 VOUT2
VIN2 2
19 VOUT2
VIN2 2
23 VOUT2
VIN2 2
27 VOUT2
8 VS-
VIN3 3
18 VOUT3
VIN3 3
22 VOUT3
VIN3 3
26 VOUT3
VIN3 4
7 VOUT3
VIN4 4
17 VOUT4
VIN4 4
21 VOUT4
VIN4 4
25 VOUT4
VIN4 5
6 VOUT4
VS+ 5
16 VS-
VIN5 5
20 VOUT5
VIN5 5
24 VOUT5
VS+ 6
15 VS-
VS+ 6
19 VS-
VIN6 6
23 VOUT6
VIN5 7
14 VOUT5
VS+ 7
18 VS-
VS+ 7
22 VS-
VIN6 8
13 VOUT6
VIN6 8
17 VOUT6
VS+ 8
21 VS-
VIN7 9
12 VOUT7
VIN7 9
16 VOUT7
VIN7 9
20 VOUT7
VIN8 10
11 VOUT8
VIN8 10
15 VOUT8
VIN8 10
19 VOUT8
VIN9 11
14 VOUT9
VIN9 11
18 VOUT9
VIN10 12
13 VOUT10
VIN10 12
17 VOUT10
VIN11 13
16 VOUT11
VIN12 14
15 VOUT12
26 VOUT2
27 VOUT1
28 NC
31 VIN1
32 VIN2
20 VOUT2
21 VOUT1*
22 NC
23 VIN1*
24 VIN2
29 NC
EL5427
(32-PIN QFN)
TOP VIEW
EL5227, EL5327
(24-PIN QFN)
TOP VIEW
30 NC
VS+ 3
VIN3 1
19 VOUT3
VIN3 1
25 VOUT3
VIN4 2
18 VOUT4
VIN4 2
24 VOUT4
17 VOUT5
VIN5 3
23 VOUT5
16 VS-
VIN6 4
VIN5 3
THERMAL
PAD
VS+ 4
22 VOUT6
THERMAL
PAD
19 VOUT8
VIN9 8
18 VOUT9
VIN10 9
17 VOUT10
3
VOUT11 16
21 VS-
VOUT12 15
* NOT AVAILABLE IN EL5227
NC 14
VIN8 7
NC 13
13 VOUT8
NC 12
VIN8 7
VIN12 11
20 VOUT7
VIN11 10
VIN7 6
VOUT9 12
14 VOUT7
VOUT10* 11
VIN7 6
NC 10
VS+ 5
CVIN10* 9
15 VOUT6
VIN9 8
VIN6 5
EL5127, EL5227, EL5327, EL5427
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage Between VS+ and VS-. . . . . . . . . . . . . . . . . . . .+18V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . VS- -0.5V, VS +0.5V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA
ESD Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
VS+ = +5V, VS- = -5V, RL = 10kΩ, CL = 10pF to 0V, TA = 25°C, unless otherwise specified.
Electrical Specifications
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
15
mV
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
VCM = 0V
1
TCVOS
Average Offset Voltage Drift
(Note 1)
5
IB
Input Bias Current
VCM = 0V
2
RIN
Input Impedance
CIN
Input Capacitance
AV
Voltage Gain
-4.5V ≤ VOUT ≤ 4.5V
µV/°C
50
nA
1
GΩ
1.35
pF
0.99
1.01
V/V
-4.85
V
OUTPUT CHARACTERISTICS
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = +5mA
4.85
4.95
IOUT (max)
Max Output Current (Note 2)
RL = 10Ω
100
±120
55
80
-4.95
V
30
mA
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
VS is moved from ±2.25V to ±7.75V
IS
Supply Current
No load (EL5127)
0.7
0.9
mA
No load (EL5227)
1.2
1.4
mA
No load (EL5327)
1.4
2
mA
No load (EL5427)
1.6
2.2
mA
dB
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 3)
-4.0V ≤ VOUT ≤ 4.0V, 20% to 80%
tS
Settling to +0.1% (AV = +1)
BW
CS
2.2
V/µs
(AV = +1), VO = 2V step
900
ns
-3dB Bandwidth
RL = 10kΩ, CL = 10pF
2.5
MHz
Channel Separation
f = 100kHz
75
dB
NOTES:
1. Measured over operating temperature range.
2. Instantaneous peak current.
3. Slew rate is measured on rising and falling edges.
4
0.9
EL5127, EL5227, EL5327, EL5427
VS+ = +5V, VS- = 0V, RL = 10kΩ, CL = 10pF to 2.5V, TA = 25°C, unless otherwise specified.
Electrical Specifications
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
15
mV
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
VCM = 2.5V
1
TCVOS
Average Offset Voltage Drift
(Note 1)
5
IB
Input Bias Current
VCM = 2.5V
2
RIN
Input Impedance
CIN
Input Capacitance
AV
Voltage Gain
0.5V ≤ VOUT ≤ 4.5V
µV/°C
50
nA
1
GΩ
1.35
pF
0.99
1.01
V/V
150
mV
OUTPUT CHARACTERISTICS
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = +5mA
4.85
4.95
V
IOUT (max)
Output Current (Note 2)
RL = 10Ω
100
±120
mA
55
80
dB
80
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
VS is moved from 4.5V to 15.5V
IS
Supply Current
No load (EL5127)
0.7
0.9
mA
No load (EL5227)
1.1
1.35
mA
No load (EL5327)
1.35
1.9
mA
No load (EL5427)
1.5
2.05
mA
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 3)
1V ≤ VOUT ≤ 4V, 20% to 80%
tS
Settling to +0.1% (AV = +1)
(AV = +1), VO = 2V step
BW
-3dB Bandwidth
CS
Channel Separation
NOTES:
1. Measured over operating temperature range.
2. Instantaneous peak current.
3. Slew rate is measured on rising and falling edges.
5
0.9
1.5
V/µs
1000
ns
RL = 10kΩ, CL = 10pF
2.5
MHz
f = 5MHz
75
dB
EL5127, EL5227, EL5327, EL5427
Electrical Specifications
PARAMETER
VS+ = +15V, VS- = 0V, RL = 10kΩ, CL = 10pF to 7.5V, TA = 25°C, unless otherwise specified.
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
18
mV
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
VCM = 7.5V
1
TCVOS
Average Offset Voltage Drift
(Note 1)
5
IB
Input Bias Current
VCM = 7.5V
2
RIN
Input Impedance
CIN
Input Capacitance
AV
Voltage Gain
0.5V ≤ VOUT ≤ 14.5V
µV/°C
50
nA
1
GΩ
1.35
pF
0.99
1.01
V/V
150
mV
OUTPUT CHARACTERISTICS
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = +5mA
14.85
14.95
V
IOUT (max)
Output Current (Note 2)
RL = 10Ω
100
±120
mA
55
80
dB
50
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
VS is moved from 4.5V to 15.5V
IS
Supply Current
No load (EL5127)
0.75
0.95
mA
No load (EL5227)
1.3
1.55
mA
No load (EL5327)
1.5
2.1
mA
No load (EL5427)
1.6
2.4
mA
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 3)
1V ≤ VOUT ≤ 14V, 20% to 80%
tS
Settling to +0.1% (AV = +1)
BW
CS
2.2
V/µs
(AV = +1), VO = 2V step
900
ns
-3dB Bandwidth
RL = 10kΩ, CL = 10pF
2.5
MHz
Channel Separation
f = 5MHz
75
dB
NOTES:
1. Measured over operating temperature range.
2. Instantaneous peak current.
3. Slew rate is measured on rising and falling edges.
6
0.9
EL5127, EL5227, EL5327, EL5427
Typical Performance Curves
20
CL=10pF
VS=±5V
10
10kΩ
NORMALIZED MAGNITUDE (dB)
NORMALIZED MAGNITUDE (dB)
20
1kΩ
0
562Ω
-10
150Ω
-20
-30
1K
10K
100K
1M
RL=10kΩ
VS=±5V
10
47pF
12pF
0
1nF
-10
100pF
-20
-30
1K
10M
FREQUENCY (Hz)
TA=25°C
VS=±5V
1200
800
400
0
1K
10K
10M
100K
1M
12
10
8
6
4
2
VS=±5V
RL=10kΩ
CL=12pF
TA=25°C
0
10K
100K
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 3. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 4. MAXIMUM OUTPUT SWING vs FREQUENCY
300
0.12
0.1
100
THD + NOISE (%)
VOLTAGE NOISE (nV/√Hz)
1M
FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS CL
MAXIMUM OUTPUT SWING (VP-P)
OUTPUT IMPEDANCE (Ω)
1600
100K
FREQUENCY (Hz)
FIGURE 1. FREQEUNCY RESPONSE FOR VARIOUS RL
2000
10K
0.06
0.04
0.02
10
1K
0.08
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 5. INPUT VOLTAGE NOISE SPECTRAL DENSITY vs
FREQUENCY
7
0
1K
10K
100K
FREQUENCY (Hz)
FIGURE 6. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
EL5127, EL5227, EL5327, EL5427
Typical Performance Curves
60
50
40
12
10
8
6
30
4
20
2
FIGURE 7. SMALL SIGNAL OVERSHOOT vs LOAD
CAPACITANCE
2.5
2
1.5
-35
-15
5
25
45
65
4.93
1.0045
-35
-15
5
25
45
65
85
VS=±5V
1.004
VOLTAGE GAIN (V/V)
OUTPUT LOW VOLTAGE (V)
10
4.935
FIGURE 10. OUTPUT HIGH VOLTAGE vs TEMPERATURE
VS=±5V
IOUT=-5mA
-4.946
-4.95
-4.954
-4.958
8
4.94
TEMPERATURE (°C)
FIGURE 9. INPUT BIAS CURRENT vs TEMPERATURE
-4.942
6
4.945
4.925
85
VS=±5V
IOUT=5mA
4.95
TEMPERATURE (°C)
-4.938
4
4.955
VS=±5V
OUTPUT HIGH VOLTAGE (V)
INPUT BIAS CURRENT (nA)
FIGURE 8. INPUT OFFSET VOLTAGE DISTRIBUTION
3
1
2
INPUT OFFSET VOLTAGE (mV)
CAPACITANCE (pF)
3.5
0
1K
-2
100
-4
0
0
10
-6
70
14
-10
OVERSHOOT (%)
80
16
-8
90
18
VS=±5V
RL=10kΩ
VIN=±50mV
TA=25°C
% OF BUFFERS
100
1.0035
1.003
1.0025
1.002
1.0015
-35
-15
5
25
45
65
85
TEMPERATURE (°C)
FIGURE 11. OUTPUT LOW VOLTAGE vs TEMPERATURE
8
1.001
-35
-15
5
25
45
65
85
TEMPERATURE (°C)
FIGURE 12. VOLTAGE GAIN vs TEMPERATURE
EL5127, EL5227, EL5327, EL5427
Typical Performance Curves
0.185
SUPPLY CURRENT (mA)
SLEW RATE (V/µs)
2.255
2.245
2.235
2.225
VS=±5V
2.215
-40
-20
0
20
40
0.18
0.175
0.17
0.165
0.16
80
60
VS=±5V
-35
-15
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
25
45
65
85
TEMPERATURE (°C)
FIGURE 13. SLEW RATE vs TEMPERATURE
0.195
5
FIGURE 14. SUPPLY CURRENT PER CHANNEL vs
TEMPERATURE
TA=25°C
0.19
0.185
0.18
1V/DIV
0.175
0.17
0.165
4
6
8
10
12
14
16
18
4µs/DIV
SUPPLY VOLTAGE (V)
FIGURE 15. SUPPLY CURRENT PER CHANNEL vs SUPPLY
VOLTAGE
FIGURE 16. LARGE SIGNAL TRANSIENT RESPONSE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
POWER DISSIPATION (W)
3
20mV/DIV
2.5 2.703W
QFN32
θJA=35°C/W
2
QFN24
θJA=37°C/W
1.5
1 870mW
0.5
0
1µs/DIV
2.857W
MSOP10
θJA=115°C/W
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 17. SMALL SIGNAL TRANSIENT RESPONSE
9
FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
EL5127, EL5227, EL5327, EL5427
Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.8
1.333W
1.2
1.176W
1 1.111W
POWER DISSIPATION (W)
POWER DISSIPATION (W)
1.4
TSSOP24
θJA=85°C/W
0.8
TSSOP28
θJA=75°C/W
0.6
TSSOP20
θJA=90°C/W
0.4
0.2
0
0
25
50
75 85
100
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
758mW
0.7
714mW
QFN32
θJA=132°C/W
0.6
0.5
486mW
0.4
0.3
MSOP10
θJA=206°C/W
0.2
0.1
0
125
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
0.9
POWER DISSIPATION (W)
QFN24
θJA=140°C/W
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
833mW
0.8
0.7
781mW
714mW
0.6
TSSOP28
θJA=120°C/W
0.5
TSSOP24
θJA=128°C/W
0.4
0.3
0.2
TSSOP20
θJA=140°C/W
0.1
0
0
25
50
75 85
100
125
AMBIENT TEMPERATURE (°C)
FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Applications Information
Product Description
The EL5127, EL5227, EL5327, and EL5427 unity gain
buffers are fabricated using a high voltage CMOS process. It
exhibits rail-to-rail input and output capability and has low
power consumption (120µA per buffer). These features
make the EL5127, EL5227, EL5327, and EL5427 ideal for a
wide range of general-purpose applications. When driving a
load of 10kΩ and 12pF, the EL5127, EL5227, EL5327, and
EL5427 have a -3dB bandwidth of 2.5MHz and exhibits
2.2V/µs slew rate.
Operating Voltage, Input, and Output
The EL5127, EL5227, EL5327, and EL5427 are specified
with a single nominal supply voltage from 5V to 15V or a split
supply with its total range from 5V to 15V. Correct operation
is guaranteed for a supply range of 4.5V to 16.5V. Most
EL5127, EL5227, EL5327, and EL5427 specifications are
stable over both the full supply range and operating
10
temperatures of -40°C to +85°C. Parameter variations with
operating voltage and/or temperature are shown in the
typical performance curves.
The output swings of the EL5127, EL5227, EL5327, and
EL5427 typically extend to within 80mV of positive and
negative supply rails with load currents of 5mA. Decreasing
load currents will extend the output voltage range even
closer to the supply rails. Figure 22 shows the input and
output waveforms for the device. Operation is from ±5V
supply with a 10kΩ load connected to GND. The input is a
10VP-P sinusoid. The output voltage is approximately
9.985VP-P.
EL5127, EL5227, EL5327, EL5427
5V
application to determine if load conditions need to be
modified for the buffer to remain in the safe operating area.
10µs
VS=±5V
TA=25°C
VIN=10VP-P
5V
OUTPUT
INPUT
The maximum power dissipation allowed in a package is
determined according to:
FIGURE 22. OPERATION WITH RAIL-TO-RAIL INPUT AND
OUTPUT
Short Circuit Current Limit
T JMAX - T AMAX
P DMAX = -------------------------------------------Θ JA
where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
The EL5127, EL5227, EL5327, and EL5427 will limit the
short circuit current to ±120mA if the output is directly
shorted to the positive or the negative supply. If an output is
shorted indefinitely, the power dissipation could easily
increase such that the device may be damaged. Maximum
reliability is maintained if the output continuous current never
exceeds ±30mA. This limit is set by the design of the internal
metal interconnects.
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
Output Phase Reversal
when sourcing, and:
The EL5127, EL5227, EL5327, and EL5427 are immune to
phase reversal as long as the input voltage is limited from
VS- -0.5V to VS+ +0.5V. Figure 23 shows a photo of the
output of the device with the input voltage driven beyond the
supply rails. Although the device's output will not change
phase, the input's overvoltage should be avoided. If an input
voltage exceeds supply voltage by more than 0.6V,
electrostatic protection diodes placed in the input stage of
the device begin to conduct and overvoltage damage could
occur.
P DMAX = Σi [ V S × I SMAX + ( V OUT i - V S - ) × I LOAD i ]
1V
10µs
PDMAX = Maximum power dissipation in the package
P DMAX = Σi [ V S × I SMAX + ( V S + - V OUT i ) × I LOAD i ]
when sinking.
where:
i = 1 to Total number of buffers
VS = Total supply voltage
ISMAX = Maximum quiescent current per channel
VOUTi = Maximum output voltage of the application
ILOADi = Load current
VS=±2.5V
TA=25°C
VIN=6VP-P
1V
FIGURE 23. OPERATION WITH BEYOND-THE-RAILS INPUT
If we set the two PDMAX equations equal to each other, we
can solve for RLOADi to avoid device overheat. The package
power dissipation curves provide a convenient way to see if
the device will overheat. The maximum safe power
dissipation can be found graphically, based on the package
type and the ambient temperature. By using the previous
equation, it is a simple matter to see if PDMAX exceeds the
device's power derating curves.
Power Dissipation
Unused Buffers
With the high-output drive capability of the EL5127, EL5227,
EL5327, and EL5427 buffer, it is possible to exceed the
125°C “absolute-maximum junction temperature” under
certain load current conditions. Therefore, it is important to
calculate the maximum junction temperature for the
It is recommended that any unused buffer have the input tied
to the ground plane.
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EL5127, EL5227, EL5327, EL5427
Driving Capacitive Loads
The EL5127, EL5227, EL5327, and EL5427 can drive a wide
range of capacitive loads. As load capacitance increases,
however, the -3dB bandwidth of the device will decrease and
the peaking increase. The buffers drive 10pF loads in
parallel with 10kΩ with just 1.5dB of peaking, and 100pF
with 6.4dB of peaking. If less peaking is desired in these
applications, a small series resistor (usually between 5Ω and
50Ω) can be placed in series with the output. However, this
will obviously reduce the gain slightly. Another method of
reducing peaking is to add a “snubber” circuit at the output.
A snubber is a shunt load consisting of a resistor in series
with a capacitor. Values of 150Ω and 10nF are typical. The
advantage of a snubber is that it does not draw any DC load
current or reduce the gain.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended, lead lengths
should be as short as possible, and the power supply pins
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the VS- pin is
connected to ground, a 0.1µF ceramic capacitor should be
placed from VS+ pin to VS- pin. A 4.7µF tantalum capacitor
should then be connected from VS+ pin to ground. One
4.7µF capacitor may be used for multiple devices. This same
capacitor combination should be placed at each supply pin
to ground if split supplies are to be used.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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