INTERSIL EL7516IY

EL7516
®
Data Sheet
March 4, 2005
600kHz/1.2MHz PWM Step-Up Regulator
Features
The EL7516 is a high frequency, high efficiency step-up
voltage regulator operated at constant frequency PWM
mode. With an internal 1.5A, 200mΩ MOSFET, it can deliver
up to 600mA output current at over 90% efficiency. The
selectable 600kHz and 1.2MHz allows smaller inductors and
faster transient response. An external compensation pin
gives the user greater flexibility in setting frequency
compensation allowing the use of low ESR Ceramic output
capacitors.
• >90% efficiency
When shut down, it draws < 10µA of current and can operate
down to 2.5V input supply. These features along with
1.2MHz switching frequency makes it an ideal device for
portable equipment and TFT-LCD displays.
The EL7516 is available in an 8-pin MSOP package with a
maximum height of 1.1mm. The device is specified for
operation over the full -40°C to +85°C temperature range.
FN7333.4
• 1.6A, 200mΩ power MOSFET
• VIN > 2.5V
• 600kHz/1.2MHz switching frequency selection
• Adjustable soft-start
• Internal thermal protection
• 1.1mm max height 8-pin MSOP package
• Pb-free available (RoHS compliant)
Applications
• TFT-LCD displays
• DSL modems
• PCMCIA cards
• Digital cameras
Pinout
• GSM/CDMA phones
EL7516
(8-PIN MSOP)
TOP VIEW
• Portable equipment
• Handheld devices
COMP 1
8 SS
FB 2
7 FSEL
SHDN 3
6 VDD
GND 4
5 LX
Ordering Information
PACKAGE
TAPE &
REEL
PKG. DWG. #
EL7516IY
8-Pin MSOP
-
MDP0043
EL7516IY-T7
8-Pin MSOP
7”
MDP0043
EL7516IY-T13
8-Pin MSOP
13”
MDP0043
EL7516IYZ
(See Note)
8-Pin MSOP
(Pb-Free)
-
MDP0043
EL7516IYZ-T7
(See Note)
8-Pin MSOP
(Pb-Free)
7”
MDP0043
EL7516IYZ-T13
(See Note)
8-Pin MSOP
(Pb-Free)
13”
MDP0043
PART NUMBER
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002, 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EL7516
Absolute Maximum Ratings (TA = 25°C)
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Ambient Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
LX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V
VDD to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6V
COMP, FB, SHDN, SS, FSEL to GND . . . . . . . -0.3V to (VDD +0.3V)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VIN = 3.3V, VOUT = 12V, IOUT = 0mA, FSEL = GND, TA = 25°C unless otherwise specified.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
10
µA
IQ1
Quiescent Current - Shut-down
SHDN = 0V
0.6
IQ2
Quiescent Current - Not Switching
SHDN = VDD, FB = 1.3V
0.7
IQ3
Quiescent Current - Switching
SHDN = VDD, FB = 1.0V
1.3
2
mA
VFB
Feedback Voltage
1.294
1.309
V
IB-FB
Feedback Input Bias Current
0.01
0.5
µA
VDD
Start-Up Input Voltage Range
5.5
V
1.272
2.6
mA
DMAX-600kHz
Maximum Duty Cycle
FSEL = 0V
84
90
%
DMAX-1.2MHz
Maximum Duty Cycle
FSEL = VDD
84
90
%
1.3
1.5
A
ILIM
ISHDN
Current Limit - Max Peak Input Current
Shut-down Input Bias Current
SHDN = 0V
0.01
0.1
µA
RDS-ON
Switch ON Resistance
VDD = 2.7V, ILX = 1A
0.2
ILX-LEAK
Switch Leakage Current
VSW = 18V
0.01
∆VOUT/∆VIN
Line Regulation
3V < VIN < 5.5V, VOUT = 12V
0.1
%
∆VOUT/∆IOUT
Load Regulation
VIN = 3.3V, VOUT = 12V, IO = 30mA to 200mA
6.7
mV/A
FOSC1
Switching Frequency Accuracy
FSEL = 0V
500
620
740
kHz
FOSC2
Switching Frequency Accuracy
FSEL = VDD
1000
1250
1500
kHz
VIL
SHDN, FSEL Input Low Level
0.5
V
VIH
SHDN, FSEL Input High Level
VIL
SHDN, Input Low Level
5V Input Supply
VIH
SHDN, Input High Level
5V Input Supply
4.5
GM
Error Amp Tranconductance
∆I = 5µA
90
AV
Voltage Gain
Ω
3
2.7
µA
V
1.25
V
V
130
170
350
1µ/Ω
V/V
VDD-ON
VDD UVLO On Threshold
2.40
2.51
2.60
V
VDD-OFF
VDD UVLO Off Threshold
2.20
2.30
2.40
V
ISS
Soft-start Charge Current
4
6
8
µA
RCS
Current Sense Transresistance
0.08
V/A
OTP
Over Temperature Protection
130
°C
2
FN7333.4
March 4, 2005
EL7516
Block Diagram
SHDN
FSEL
REFERENCE
GENERATOR
VDD
OSCILLATOR
SS
SHUTDOWN &
START-UP
CONTROL
LX
PWM LOGIC
CONTROLLER
FET
DRIVER
COMPARATOR
CURRENT
SENSE
GND
FB
GM
AMPLIFIER
COMP
Pin Descriptions
PIN NUMBER
PIN NAME
DESCRIPTION
1
COMP
Compensation pin. Output of the internal error amplifier. Capacitor and resistor from COMP pin to ground.
2
FB
Voltage feedback pin. Internal reference is 1.294V nominal. Connect a resistor divider from VOUT. VOUT =
1.294V (1 + R1 / R2). See Typical Application Circuit.
3
SHDN
4
GND
5
LX
6
VDD
Analog power supply input pin.
7
FSEL
Frequency select pin. When FSEL is set low, switching frequency is set to 620kHz. When connected to
high or VDD, switching frequency is set to 1.25MHz.
8
SS
Shutdown control pin. Pull SHDN low to turn off the device.
Analog and power ground.
Power switch pin. Connected to the drain of the internal power MOSFET.
Soft-start control pin. Connect a capacitor to control the converter start-up.
Typical Application Circuit
R3
3.9kΩ
1 COMP
R1
85.2kΩ
C5
R2
4.7nF
10kΩ
2 FB
3 SHDN
4 GND
S1
3
SS 8
FSEL 7
VDD 6
LX 5
C3
27nF
C4
2.7V TO 5.5V
+ C1
0.1µF
22µF
10µH
D1
+ C2
12V
22µF
FN7333.4
March 4, 2005
EL7516
Typical Performance Curves
95
0.6
LOAD REGULATION (%)
EFFICIENCY (%)
0.4
90
85
80
0.2
0
-0.2
-0.4
-0.6
-0.8
75
0
100
200
300
-1
400
0
50
100
IOUT (mA)
LOAD REGULATION (%)
EFFICIENCY (%)
300
350
1
85
80
0
100
200
300
0.5
0
-0.5
-1
400
0
50
100
150
200
250
300
350
IOUT (mA)
IOUT (mA)
FIGURE 3. EFFICIENCY - 3.3V VIN TO 12V VOUT @ 620kHz
FIGURE 4. LOAD REGULATION - 3.3V VIN TO 12V VOUT
@ 620kHz
1
LOAD REGULATION (%)
95
90
EFFICIENCY (%)
250
FIGURE 2. LOAD REGULATION - 3.3V VIN TO 12V VOUT
@ 1.3MHz
90
85
80
75
70
200
IOUT (mA)
FIGURE 1. EFFICIENCY - 3.3V VIN TO 12V VOUT @ 1.3MHz
75
150
0
100
300
200
400
500
IOUT (mA)
FIGURE 5. EFFICIENCY - 3.3V VIN TO 9V VOUT @ 1.2MHz
4
0.5
0
-0.5
-1
0
100
200
300
400
500
IOUT (mA)
FIGURE 6. LOAD REGULATION - 3.3V VIN TO 9V VOUT
@ 1.2MHz
FN7333.4
March 4, 2005
EL7516
Typical Performance Curves
(Continued)
1
LOAD REGULATION (%)
EFFICIENCY (%)
90
85
80
75
0
100
200
300
400
0.6
0.2
-0.2
-0.6
-1
500
0
100
200
IOUT (mA)
300
400
500
IOUT (mA)
FIGURE 7. EFFICIENCY - 3.3V VIN TO 9V VOUT @ 600kHz
FIGURE 8. LOAD REGULATION - 3.3V VIN TO 9V VOUT
@ 600kHz
0.8
95
LOAD REGULATION (%)
EFFICIENCY (%)
0.6
90
85
80
0.4
0.2
1
-0.2
-0.4
-0.6
-0.8
75
0
100
200
300
400
500
-1
600
0
100
200
IOUT (mA)
300
400
500
600
IOUT (mA)
FIGURE 9. EFFICIENCY - 5V VIN TO 12V VOUT @ 1.2MHz
FIGURE 10. LOAD REGULATION - 5V VIN TO 12V VOUT
@ 1.2MHz
0.8
92
LOAD REGULATION (%)
EFFICIENCY (%)
0.6
90
88
86
0.4
0.2
1
-0.2
-0.4
-0.6
-0.8
84
0
100
200
300
400
500
600
IOUT (mA)
FIGURE 11. EFFICIENCY - 5V VIN TO 12V VOUT @ 600kHz
5
-1
0
100
200
300
400
500
600
IOUT (mA)
FIGURE 12. LOAD REGULATION - 5V VIN TO 12V VOUT
@ 600kHz
FN7333.4
March 4, 2005
EL7516
Typical Performance Curves
(Continued)
0.6
95
LOAD REGULATION (%)
EFFICIENCY (%)
0.4
90
85
80
0.2
0
-0.2
-0.4
-0.6
-0.8
75
0
200
600
400
800
-1
1K
0
200
400
IOUT (mA)
FIGURE 13. EFFICIENCY - 5V VIN TO 9V VOUT @ 1.2MHz
0.1
VOUT=12V
IOUT=80mA
0.1
1.2MHz
0
600kHz
-0.1
-0.2
2
4
3
0.05
1.2MHz
0
600kHz
-0.05
-0.1
2.5
6
5
VOUT=8V
IOUT=80mA
4.5
3.5
FIGURE 15. LINE REGULATION
FIGURE 16. LINE REGULATION
95
0.5
1.2MHz
LOAD REGULATION (%)
600kHz
90
EFFICIENCY (%)
6.5
5.5
VIN (V)
VIN (V)
85
1.2MHz
80
75
70
10
1K
FIGURE 14. LOAD REGULATION - 5V VIN TO 9V VOUT
@ 1.2MHz
LINE REGULATION (%)
LINE REGULATION (%)
0.2
800
600
IOUT (mA)
110
210
310
410
510
610
IOUT (mA)
FIGURE 17. EFFICIENCY vs IOUT - 3.3V TO 8V
6
0.3
0.1
-0.1
600kHz
-0.3
-0.5
0
100
200
300
400
500
600
IOUT (mA)
FIGURE 18. LOAD REGULATION - 3.3V TO 8V
FN7333.4
March 4, 2005
EL7516
(Continued)
94
1.29
92
1.28
90
1.27
FREQUENCY (MHz)
EFFICIENCY (%)
Typical Performance Curves
88
1.2MHz
86
84
82
80
600kHz
78
76
0
200
600
400
800
1.26
1.25
1.24
1.23
1.22
1.21
1K
1.2
2.5
1.2K
3
IOUT (mA)
4.5
4
5
5.5
VIN (V)
FIGURE 19. EFFICIENCY vs IOUT
FIGURE 20. FREQUENCY (1.2MHz) vs VIN
670
93
660
91
EFFICIENCY (kHz)
FREQUENCY (kHz)
3.5
650
640
630
620
89
87
85
83
610
600
2.5
3
3.5
4.5
4
5
5.5
81
VIN (V)
0
200
400
600
800
1K
IOUT (mA)
FIGURE 21. FREQUENCY (600kHz) vs VIN
FIGURE 22. EFFICIENCY - 5V VIN TO 9V VOUT @ 600kHz
LOAD REGULATION (%)
0.4
VIN = 3.3V
VOUT = 12V
IOUT = 50mA TO 300mA
0.2
0
200mV/DIV
-0.2
-0.4
0
200
400
600
800
1K
0.1ms/DIV
IOUT (mA)
FIGURE 23. LOAD REGULATION - 5V VIN TO 9V VOUT
@ 600kHz
7
FIGURE 24. TRANSIENT REPONSE - 600kHz
FN7333.4
March 4, 2005
EL7516
Typical Performance Curves
(Continued)
5
VIN = 3.3V
VOUT = 12V
IOUT = 50mA TO 300mA
SHDN LEVEL (V)
4
200mV/DIV
SHDN TURN ON
SHDN TURN OFF
3
2
1
0
0.1ms/DIV
FIGURE 25. TRANSIENT RESPONSE - 1.2MHz
1
3
3.5
4
4.5
VIN (V)
5
5.5
6
FIGURE 26. TYPICAL SHDN INPUT LEVEL vs VIN
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.6
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
POWER DISSIPATION (W)
POWER DISSIPATION (W)
0.9
870mW
0.8
0.7
M
SO
JA
P
=1
15 8
°C
/W
θ
0.6
0.5
0.4
0.3
0.2
0.5
486mW
0.4
θ
JA
=
0.3
M
SO
P8
20
6°
C/
W
0.2
0.1
0.1
0
0
25
75 85
50
100
125
0
0
Applications Information
The EL7516 is a high frequency, high efficiency boost
regulator operated at constant frequency PWM mode. The
boost converter stores energy from an input voltage source
and deliver it to a higher output voltage. The input voltage
range is 2.5V to 5.5V and output voltage range is 5V to 18V.
The switching frequency is selectable between 600KHz and
1.2MHz allowing smaller inductors and faster transient
response. An external compensation pin gives the user
greater flexibility in setting output transient response and
tighter load regulation. The converter soft-start characteristic
can also be controlled by external CSS capacitor. The SHDN
pin allows the user to completely shut-down the device.
Boost Converter Operations
Figure 28 shows a boost converter with all the key
components. In steady state operating and continuous
conduction mode where the inductor current is continuous,
8
50
75 85
100
125
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
25
FIGURE 28. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
the boost converter operates in two cycles. During the first
cycle, as shown in Figure 29, the internal power FET turns
on and the Schottky diode is reverse biased and cuts off the
current flow to the output. The output current is supplied
from the output capacitor. The voltage across the inductor is
VIN and the inductor current ramps up in a rate of VIN / L, L
is the inductance. The inductance is magnetized and energy
is stored in the inductor. The change in inductor current is:
V IN
∆I L1 = ∆T1 × --------L
D
∆T1 = -----------F SW
D = Duty Cycle
I OUT
∆V O = ---------------- × ∆T 1
C OUT
FN7333.4
March 4, 2005
EL7516
During the second cycle, the power FET turns off and the
Schottky diode is forward biased, Figure 30. The energy
stored in the inductor is pumped to the output supplying
output current and charging the output capacitor. The
Schottky diode side of the inductor is clamp to a Schottky
diode above the output voltage. So the voltage drop across
the inductor is VIN - VOUT. The change in inductor current
during the second cycle is:
L
D
VOUT
VIN
COUT
CIN
EL7516
IL
∆IL2
∆T2
V IN – V OUT
∆I L = ∆T2 × -------------------------------L
∆VO
–D
∆T2 = 1
------------F SW
FIGURE 31. BOOST CONVERTER - CYCLE 2, POWER
SWITCH OPEN
For stable operation, the same amount of energy stored in
the inductor must be taken out. The change in inductor
current during the two cycles must be the same.
∆I1 + ∆I2 = 0
V IN 1 – D V IN – V OUT
D
------------ × --------+ ------------- × -------------------------------- = 0
L
F SW
F SW
L
V OUT
1 --------------- = -----------V IN
1–D
Output Voltage
An external feedback resistor divider is required to divide the
output voltage down to the nominal 1.294V reference
voltage. The current drawn by the resistor network should be
limited to maintain the overall converter efficiency. The
maximum value of the resistor network is limited by the
feedback input bias current and the potential for noise being
coupled into the feedback pin. A resistor network less than
100K is recommended. The boost converter output voltage
is determined by the relationship:
R 

V OUT = V FB ×  1 + ------1-
R 2

L
D
VOUT
VIN
COUT
CIN
Inductor Selection
EL7516
FIGURE 29. BOOST CONVERTER
L
VOUT
VIN
COUT
CIN
The nominal VFB voltage is 1.294V.
The inductor selection determines the output ripple voltage,
transient response, output current capability, and efficiency.
Its selection depends on the input voltage, output voltage,
switching frequency, and maximum output current. For most
applications, the inductance should be in the range of 2µH to
33µH. The inductor maximum DC current specification must
be greater than the peak inductor current required by the
regulator. The peak inductor current can be calculated:
V IN × ( V OUT – V IN )
I OUT × V OUT
- + 1 ⁄ 2 × ----------------------------------------------------I L ( PEAK ) = ----------------------------------L × V OUT × FREQ
V IN
EL7516
Output Capacitor
IL
∆IL1
∆T1
∆VO
FIGURE 30. BOOST CONVERTER - CYCLE 1, POWER
SWITCH CLOSED
Low ESR capacitors should be used to minimized the output
voltage ripple. Multilayer ceramic capacitors (X5R and X7R)
are preferred for the output capacitors because of their lower
ESR and small packages. Tantalum capacitors with higher
ESR can also be used. The output ripple can be calculated
as:
I OUT × D
× ESR
∆V O = --------------------------+I
F SW × C O OUT
For noise sensitive application, a 0.1µF placed in parallel
with the larger output capacitor is recommended to reduce
the switching noise coupled from the LX switching node.
9
FN7333.4
March 4, 2005
EL7516
In selecting the Schottky diode, the reverse break down
voltage, forward current and forward voltage drop must be
considered for optimum converter performance. The diode
must be rated to handle 1.5A, the current limit of the
EL7516. The breakdown voltage must exceed the maximum
output voltage. Low forward voltage drop, low leakage
current, and fast reverse recovery will help the converter to
achieve the maximum efficiency.
Input Capacitor
The value of the input capacitor depends the input and
output voltages, the maximum output current, the inductor
value and the noise allowed to put back on the input line. For
most applications, a minimum 10µF is required. For
applications that run close to the maximum output current
limit, input capacitor in the range of 22µF to 47µF is
recommended.
The EL7516 is powered from the VIN. To. High frequency
0.1µF by-pass cap is recommended to be close to the VIN
pin to reduce supply line noise and ensure stable operation.
Loop Compensation
EL7516 does not use a level translator or ground-referenced
threshold for the SHDN input. For different supply voltages,
please refer the Figure 32 to choose right input threshold
voltages for SHDN, where VTP is about 1V. It is recommend
that VIH = (VIN-VTP/2) and VIL = (VIN/4).
If the consistent SHDN threshold is desired in the
application, an external active level shifter must be used,
simplest circuit requires 1 NMOS and 1 resistor as shown in
Figure 33, where the gate of the NMOS is connected to
supply of PWRON logic circuit, and the source of the NMOS
goes to PWRON pin of the converter.
SHDN INPUT THRESHOLDS
Schottky Diode
VIH, UPPER
LOGIC THRESHOLD
VIN=3.3V
VIN=5.5V
(VIN-VTP)
VIL, LOWER
LOGIC THRESHOLD
KEEP OUT
0V
The EL7516 incorporates an transconductance amplifier in
its feedback path to allow the user some adjustment on the
transient response and better regulation. The EL7516 uses
current mode control architecture which has a fast current
sense loop and a slow voltage feedback loop. The fast
current feedback loop does not require any compensation.
The slow voltage loop must be compensated for stable
operation. The compensation network is a series RC
network from COMP pin to ground. The resistor sets the high
frequency integrator gain for fast transient response and the
capacitor sets the integrator zero to ensure loop stability. For
most applications, the compensation resistor in the range of
2K to 7.5K and the compensation capacitor in the range of
3nF to 10nF.
Soft-Start
The soft-start is provided by an internal 6µA current source
charges the external CSS, the peak MOSFET current is
limited by the voltage on the capacitor. This in turn controls
the rising rate of the output voltage. The regulator goes
through the start-up sequence as well after the SHDN pin is
pulled to HI.
Frequency Selection
The EL7516 switching frequency can be user selected to
operate at either at constant 620kHz or 1.25MHz.
Connecting FSEL pin to ground sets the PWM switching
frequency to 620kHz. When connect FSEL high or VDD,
switching frequency is set to 1.25MHz.
VIN
(VIN/2)
VIN
FIGURE 32. SHDN INPUT THRESHOLD vs INPUT SUPPLY
VOLTAGE
SUPPLY INPUT VOLTAGE
20K
TO EL7516
3VD
20K
PIN3 SHDN
PWRON
PIN OF THE
CONVERTER
FIGURE 33. LEVEL SHIFTER CIRCUIT
Maximum Output Current
The MOSFET current limit is nominally 1.5A and guaranteed
1.3A. This restricts the maximum output current IOMAX
based on the following formula:
I L = I L-AVG + ( 1 ⁄ 2 × ∆I L )
Shut-Down Control
When Shut-down pin is pulled down, the EL7516 is shutdown reducing the supply current to <3µA.
10
FN7333.4
March 4, 2005
EL7516
Thermal Performance
where:
The EL7516 uses a fused-lead package, which has a
reduced θJA of 100°C/W on a four-layer board and 115°C/W
on a two-layer board. Maximizing copper around the ground
pins will improve the thermal performance.
IL = MOSFET current limit
IL-AVG = average inductor current
∆IL = inductor ripple current
This device also has internal thermal shut-down set at
around 130°C to protect the component.
V IN × [ ( V O + V DIODE ) – V IN ]
∆I L = -----------------------------------------------------------------------------L × ( V O + V DIODE ) × F S
Layout Considerations
VDIODE = Schottky diode forward voltage, typically, 0.6V
FS = switching frequency, 600KHz or 1.2MHz
I OUT
I L-AVG = ------------1–D
D = MOSFET turn-on ratio:
To achieve highest efficiency, best regulation and most
stable operation, a good printed circuit board layout is
essential. It is strongly recommended that the demoboard
layout to be followed as closely as possible. Use the
following general guidelines when laying out the print circuit
board:
1. Place C4 as close to the VDD pin as possible. C4 is the
supply bypass capacitor of the device.
V IN
D = 1 – -------------------------------------------V OUT + V DIODE
The following table gives typical maximum Iout values for
1.2MHz switching frequency and 22µH inductor:
TABLE 1.
2. Keep the C1 ground, GND pin and C2 ground as close as
possible.
3. Keep the two high current paths a) from C1 through L1, to
the LX pin and GND and b) from C1 through L1, D1, and
C2 as short as possible.
4. High current traces should be short and as wide as
possible.
VIN (V)
VOUT (V)
IOMAX (mA)
2.5
5
570
2.5
9
325
5. Place feedback resistor close to the FB pin to avoid noise
pickup.
2.5
12
250
6. Place the compensation network close to the COMP pin.
3.3
5
750
3.3
9
435
The demo board is a good example of layout based on these
principles; it is available upon request.
3.3
12
330
5
9
650
5
12
490
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FN7333.4
March 4, 2005
EL7516
MSOP Package Information
NOTE: NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
<http://www.intersil.com/design/packages/index.asp>
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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12
FN7333.4
March 4, 2005