CT ENT ODU E PR PLACEM ter at T E L E n O R e S C D B O /tsc port NDE MME ical Sup tersil.com O C n E n h i R . c e w O N ww Data ur T Sheet IL or act o cont -INTERS 8 1-88 ® EL400 September 20, 2002 200MHz Current Feedback Amplifier Features The EL400 is a wide bandwidth, fast settling monolithic amplifier built using an advanced complementary bipolar process. This amplifier uses current-mode feedback to achieve more bandwidth at a given gain than conventional operational amplifiers. Designed for closed-loop gains of ±1 to ±8, the EL400 has a 200MHz -3dB bandwidth (AV = +2), and 12ns settling to 0.05% while consuming only 15mA of supply current. • 200MHz -3dB bandwidth, AV = 2 The EL400 is an obvious high-performance solution for video distribution and line-driving applications. With low 15mA supply current, differential gain/phase of 0.02%/0.01°, and a minimum 50mA output drive, performance in these areas is assured. The EL400's settling to 0.05% in 12ns, low distortion, and ability to drive capacitive loads make it an ideal flash A/D driver. The wide 200MHz bandwidth and extremely linear phase allow unmatched signal fidelity. D/A systems can also benefit from the EL400, especially if linearity and drive levels are important. • 12ns settling to 0.05% • VS = ±5V @ 15mA • Low distortion: HD2, HD3 @ -60dBc at 20MHz • Differential gain 0.02% at NTSC, PAL • Differential phase 0.01° at NTSC, PAL • Overload/short-circuit protected • ±1 to ±8 closed-loop gain range • Low cost • Direct replacement for CLC400 Applications • Video gain block • Video distribution • HDTV amplifier • High-speed A/D conversion Ordering Information PART NUMBER FN7156 • D/A I-V conversion TEMP. RANGE PACKAGE PKG. NO. • Photodiode, CCD preamps EL400CN -40°C to +85°C 8-Pin PDIP MDP0031 • IF processors EL400CS -40°C to +85°C 8-Pin SO MDP0027 • High-speed communications Pinout EL400 (8-PIN PDIP, SO) TOP VIEW Manufactured under U.S. Patent No. 4,893,091 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL400 Absolute Maximum Ratings (TA = 25°C) Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±7V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output is short-circuit protected to ground, however, maximum reliability is obtained if IOUT does not exceed 70mA. Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Pin Temperature (Soldering, 5 Seconds). . . . . . . . . . . . . . . . . 300°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-60°C to +150°C Thermal Resistance: . . . . . . . . . . . . . . . . . . . . . . . .θJA = 95°C/W PDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . θJA = 175°C/W SO-8 CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Open-Loop DC Electrical Specifications PARAMETER VOS DESCRIPTION VS = ±5V, RL = 100Ω unless otherwise specified. TEST CONDITIONS Input Offset Voltage d(VOS)/dT Average Offset Voltage Drift +IIN +Input Current TEMP MIN TYP MAX UNIT 2.0 5.5 mV TMIN 8.7 mV TMAX 9.5 mV 25°C (Note 1) All 10.0 40.0 µV/°C 25°C, TMAX 10.0 25.0 µA 41.0 µA TMIN d(+IIN)/dT Average +Input Current Drift -IIN -Input Current (Note 1) All 50.0 200.0 nA/°C 25°C 10.0 25.0 µA TMIN 41.0 µA TMAX 35.0 µA 200.0 nA/°C d(-IIN)/dT Average -Input Current Drift PSRR Power Supply Rejection Ratio All 40.0 50.0 dB CMRR Common-Mode Rejection Ratio All 40.0 50.0 dB IS Supply Current—Quiescent +RIN +Input Resistance (Note 1) No Load All 100.0 All 15.0 25°C, TMAX 100.0 TMIN 50.0 23.0 200.0 mA kΩ kΩ CIN Input Capacitance All 0.5 2.0 pF ROUT Output Impedance (DC) All 0.1 0.2 W CMIR Common-Mode Input Range IOUT (Note 2) Output Current VOUT Output Voltage Swing No Load VOUTL Output Voltage Swing 100Ω ROL Transimpedance NOTES: 1. Measured from TMIN to TMAX. 2. Common-Mode Input Range for Rated Performance. 2 25°C, TMAX 2.0 TMIN 1.2 25°C, TMAX 50.0 TMIN 35.0 All 3.2 3.5 V 25°C 3.0 3.4 V 25°C 30.0 125.0 V/mA TMIN 80.0 V/mA TMAX 140.0 V/mA 2.1 V V 70.0 mA mA EL400 Closed-Loop AC Electrical Specifications PARAMETER Frequency Response Gain Flatness SSBW TEST CONDITIONS -3dB Bandwidth (VOUT < 0.5VPP) LSBW -3dB Bandwidth (VOUT < 5.0VPP) AV = +5 GFPL Peaking VOUT < 0.5VPP < 40MHz Peaking VOUT < 0.5VPP > 40MHz Rolloff VOUT < 0.5VPP < 75MHz GFPH GFR LPD Time-Domain Response DESCRIPTION VS = ±5V, RF = 250Ω, AV = +2, RL = 100Ω unless otherwise specified. Linear Phase Deviation VOUT < 0.5VPP tR1, tF1 Rise Time, Fall Time TEMP MIN TYP 25°C 150.0 200.0 TMIN 150.0 TMAX 120.0 All 35.0 25°C MHz 0.0 TMIN, TMAX 0.7 dB dB TMAX 1.3 dB 1.0 ° 0.5V Step 25°C, TMIN 0.2 TMAX 1.6 All 6.5 1.2 ° 2.4 ns 2.9 ns 10.0 ns Settling Time to 0.1% 2.0V Step All 10.0 13.0 ns tS2 Settling Time to 0.05% 2.0V Step All 12.0 15.0 ns OS Overshoot 0.5V Step 25°C 0.0 10.0 % 15.0 % HD2 AV = +2 All 700.0 V/µs AV = - 2 All 1600.0 V/µs 2nd Harmonic Distortion at 20MHz 2VPP 25°C -60.0 3rd Harmonic Distortion at 20MHz 2VPP Slew Rate 430.0 TMIN NF INV Noise Floor > 100kHz Integrated Noise 100kHz to 200MHz (Note 1) dBc -40.0 dBc -45.0 dBc dBc -50.0 dBc -154.0 dBm (1Hz) TMIN -154.0 dBm (1Hz) TMAX -153.0 dBm (1Hz) 57.0 µV 57.0 µV 25°C -60.0 TMIN, TMAX (Note 1) -45.0 -50.0 TMAX HD3 25°C 25°C -157.0 40.0 TMIN 63.0 TMAX Video Performance dB tS1 SR Equivalent Input Noise 0.5 dB TMIN, TMAX Distortion dB dB 1.0 25°C, TMIN 5.0V Step 0.3 0.4 1.0 < 75MHz 0.6 MHz TMIN TMAX tR2, tF2 Rise Time, Fall Time MHz 50.0 0.0 25°C UNITS MHz TMIN, TMAX 25°C MAX µV dG Differential Gain (Note 2) NTSC/PAL 25°C 0.02 %PP dP Differential Phase (Note 2) NTSC/PAL 25°C 0.01 °PP dG Differential Gain (Note 2) 30MHz 25°C 0.05 %PP dP Differential Phase (Note 2) 30MHz VBW -0.1dB Bandwidth (Note 2) NOTES: 1. Noise Tests are Performed from 5MHz to 200MHz. 2. Differential Gain/Phase Tests are RL = 100Ω. For other values of RL, see curves. 3 25°C 0.05 °PP 25°C 60.0 MHz EL400 Typical Performance Curves Non-Inverting Frequency Response Inverting Frequency Response Frequency Response for Various RLs Open-Loop Transimpedance Gain and Phase 2nd and 3rd Harmonic Distortion 2-Tone 3rd Order Intermodulation Intercept Equivalent Input Noise Settling Time 4 Power-Supply Rejection Ratio Long-Term Settling Time Common-Mode Rejection Ratio Settling Time vs Load Capacitance EL400 Typical Performance Curves (Continued) Recommended RS vs Load Capacitance Pulse Response AV = +2 Pulse Response AV = +2 Differential Gain and Phase (3.58MHz) 5 Differential Gain and Phase (4.43MHz) Differential Gain and Phase (30MHz) EL400 Equivalent Circuit Burn-In Circuit All Packages Use The Same Schematic. Applications Information Theory of Operation The EL400 has a unity gain buffer from the non-inverting input to the inverting input. The error signal of the EL400 is a current flowing into (or out of) the inverting input. A very small change in current flowing through the inverting input will cause a large change in the output voltage. This current amplification is called the transimpedance (ROL) of the EL400 [VOUT = (ROL)*(-IIN)]. Since ROL is very large, the 6 current flowing into the inverting input in the steady-state (non-slewing) condition is very small. Therefore we can still use op-amp assumptions as a firstorder approximation for circuit analysis, namely that: 1. The voltage across the inputs is approximately 0V. 2. The current into the inputs is approximately 0mA. Resistor Value Selection and Optimization The value of the feedback resistor (and an internal capacitor) sets the AC dynamics of the EL400. The nominal value for EL400 the feedback resistor is 250Ω, which is the value used for production testing. This value guarantees stability. For a given closed-loop gain the bandwidth may be increased by decreasing the feedback resistor and, conversely, the bandwidth may be decreased by increasing the feedback resistor. Reducing the feedback resistor too much will result in overshoot and ringing, and eventually oscillations. Increasing the feedback resistor results in a lower -3dB frequency. Attenuation at high frequency is limited by a zero in the closed-loop transfer function which results from stray capacitance between the inverting input and ground. Consequently, it is very important to keep stray capacitance to a minimum at the inverting input. Differential Gain/Phase An industry-standard method of measuring the distortion of a video component is to measure the amount of differential gain and phase error it introduces. To measure these, a 40 IREPP reference signal is applied to the device with 0V DC offset (0IRE) at 3.58MHz for NTSC, 4.43MHz for PAL, and 30MHz for HDTV. A second measurement is then made with a 0.714V DC offset (100IRE). Differential Gain is a measure of the change in amplitude of the sine wave, and is measured in percent. Differential Phase is a measure of the change in phase, and is measured in degrees. Typically, the maximum positive and negative deviations are summed to give peak values. In general, a back terminated cable (75Ω in series at the drive end and 75Ω to ground at the receiving end) is preferred since the impedance match at both ends will absorb any reflections. However, when double-termination is used, the received signal is reduced by half; therefore a gain of 2 configuration is typically used to compensate for the attenuation. In a gain of 2 configuration, with output swing of 2VPP, with each back-terminated load at 150Ω. The EL400 is capable of driving up to 4 back-terminated loads with excellent video performance. Please refer to the typical curves for more information on video performance with respect to frequency, gain, and loading. Capacitive Feedback The EL400 relies on its feedback resistor for proper compensation. A reduction of the impedance of the feedback element results in less stability, eventually resulting in oscillation. Therefore, circuit implementations which have capacitive feedback should not be used because of the capacitor's impedance reduction with frequency. Similarly, oscillations can occur when using the technique of placing a capacitor in parallel with the feedback resistor to compensate for shunt capacitances from the inverting input to ground. 7 Offset Adjustment Pin Output offset voltage of the EL400 can be nulled by tying a 10k potentiometer between +VS and -VS with the slider attached to pin 1. A full-range variation of the voltage at pin 1 to ±5V results in an offset voltage adjustment of at least ±10mV. For best settling performance pin 1 should be bypassed to ground with a ceramic capacitor located near to the package, even if the offset voltage adjustment feature is not being used. Printed Circuit Layout As with any high frequency device, good PCB layout is necessary for optimum performance. Ground plane construction is a requirement, as is good power-supply and Offset Adjust bypassing close to the package. The inverting input is sensitive to stray capacitance, therefore connections at the inverting input should be minimal, close to the package, and constructed with as little coupling the ground plane as possible. Capacitance at the output node will reduce stability, eventually resulting in peaking, and finally oscillation if the capacitance is large enough. The design of the EL400 allows a larger capacitive load than comparable products, yet there are occasions when a series resistor before the capacitance may be needed. Please refer to the graphs to determine the proper resistor value needed. EL400 EL400 Macromodel * Revision A. March 1992 * Enhancements include PSRR, CMRR, and Slew Rate Limiting * Connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | | .subckt M400 3 2 7 4 6 * * Input Stage * e1 10 0 3 0 1.0 vis 10 9 0V h2 9 12 vxx 1.0 r1 2 11 50 l1 11 12 48nH iinp 3 0 8µA iinm 2 0 8µA * * Slew Rate Limiting * h1 13 0 vis 600 r2 13 14 1K d1 14 0 dclamp d2 0 14 dclamp * * High Frequency Pole * *e2 30 0 14 0 0.00166666666 l3 30 17 0.1µH c5 17 0 0.1pF r5 17 0 500 * * Transimpedance Stage * g1 0 18 17 0 1.0 rol 18 0 150K cdp 18 0 2.8pF * * Output Stage * q1 4 18 19 qp q2 7 18 20 qn q3 7 19 21 qn q4 4 20 22 qp r7 21 6 2 r8 22 6 2 ios1 7 19 2.5mA ios2 20 4 2.5mA * * Supply Current * ips 7 4 9mA * * Error Terms * ivos 0 23 5mA 8 EL400 EL400 Macromodel (Continued) vxx 23 0 0V e4 24 0 3 0 1.0 e5 25 0 7 0 1.0 e6 26 0 4 0 1.0 r9 24 23 3K r10 25 23 1K r11 26 23 1K * * Models * .model qn npn (is=5e-15 bf=200 tf=0.5nS) .model qp pnp (is=5e-15 bf=200 tf=0.5nS) .model dclamp d(is=1e-30 ibv=0.266 bv=1.3 n=4) .ends All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 9