Low Power, Precision Op Amp Simplifies Driving of MUXed ADCs Design Note 1034 Guy Hoover Introduction The high speed op amps required to buffer a modern 16‑/18-bit analog-to-digital converter (ADC) typically dissipate as much power as the ADC itself, often with a maximum offset spec of about 1mV, well beyond that of the ADC. If multiple multichannel ADCs are required, the power dissipation can quickly rise to unacceptable levels. The simple buffer presented here is capable of driving the LTC ®2372-18 8-channel ADC and achieving near data sheet SNR, THD and offset performance with very low power dissipation if the input signals involved are in the range of DC to 1kHz. Circuit Description The LTC2372-18 is a low noise, 500ksps, 8-channel 18‑bit successive approximation register (SAR)ADC. Operating from a single 5V supply, the LTC2372‑18 achieves –110dB THD (typical), 100dB (fully differential)/95dB (pseudo-differential) SNR (typical) with an offset of ±11LSB (maximum) while dissipating only 27mW (typical). The LT®6016 is a dual rail-to-rail input op amp with input offset voltage less than 50µV (maximum) that draws only 315µA per amplifier (typical). It is also available as a single and a quad (LT6015/LT6017). The circuit of Figure 1 shows the LT6016 op amp configured as a noninverting buffer driving the analog inputs of the LTC2372-18. Typical power dissipation of each op amp is only 3.7mW. For all eight channels this is a power dissipation of only 30mW, approximately the same power dissipation as the ADC. Running the LT6016 on a single 5.25V supply and enabling the ADC’s digital gain compression mode reduces the total op amp power consumption by more than half, to 13mW, at the expense of a slight decrease in the SNR. The RC filter at the buffer output minimizes the noise contribution of the LT6016 and reduces the effect of the sampling transient caused by the MUX and the input sampling capacitor. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 8V 0.1µF 4.096V 5V 1.8V TO 5V 0V + 4300pF 4.096V + 91Ω 0V 4.096V 0V 2.048V MUXOUT– LT6016 – CH0 CH1 CH2 CH3 MUX CH4 CH5 CH6 CH7 COM 4300pF –3.6V 0.1µF VDD 0.1µF VDDLBYP OVDD LTC2372-18 + 18-BIT SAMPLING ADC – ADCIN– 0V 91Ω 2.2µF ADCIN+ 4.096V – MUXOUT+ 0V 10µF REFBUF 47µF REFIN GND 0.1µF COM = GND OR REFBUF/2 Figure 1. LT6016 Buffer Driving the LTC2372-18 8-Channel SAR ADC 10/15/DN1034f RESET RDL SDO SCK SDI BUSY CNV DN1034 F01 SAMPLE CLOCK Circuit Performance Figure 2 shows a 32768-point FFT of the LTC2372‑18 driven fully differentially by the circuit of Figure 1. THD is –114dB and SNR is 98.5dBFS at 400ksps, which compares well with the typical specs of the LTC2372-18. 0 AIN = –1dBFS fS = 400ksps fIN = 1kHz THD = –114dB SNR = 98.5dB –20 AMPLITUDE (dBFS) –40 –60 Figure 4 shows THD vs sampling rate with digital gain compression off and on for both pseudo-differential and fully differential modes of the LTC2372-18. Here THD starts to rise above –110dB at 300ksps for pseudodifferential mode and rises above –115dB at 400ksps for fully differential mode. Digital gain compression has only a minimal effect on the THD performance. In fully differential mode, THD is never worse than –100dB up to the full 500ksps sampling rate of the LTC2372-18. –80 –80 –85 –100 –90 –120 –95 THD (dB) –140 –160 –180 0 –100 –105 –115 DN1034 F02 –120 Figure 2. 32768-Point FFT for the Circuit of Figure 1 –125 Figure 5 shows the combined offset error of the buffer and ADC vs sampling rate in pseudo-differential mode with digital gain compression off. Offset is initially less than 3LSB and does not degrade until the sampling rate reaches 400ksps. 20 18 96 16 94 14 92 OFFSET (LSB) SNR (dBFS) 50 100 150 200 250 300 350 400 450 500 SAMPLING RATE (ksps) DN1034 F04 98 90 88 86 fIN = 1kHz AIN = –1dBFS R = 91Ω C = 4300pF 84 82 0 100 PD FD FD GC PD GC 200 300 400 SAMPLING RATE (ksps) 500 DN1034 F03 Figure 3. SNR vs Sampling Rate for the Circuit of Figure 1 in Pseudo-Differential and Fully Differential Modes 10/15/DN1034f 0 Figure 4. Pseudo-Differential, Fully Differential THD vs Sampling Rate for the Circuit of Figure 1 with and without Gain Compression 100 80 PD FD FD GC PD GC –110 20 40 60 80 100 120 140 160 180 200 FIN (kHz) Figure 3 shows SNR vs sampling rate with digital gain compression off and on for both pseudo-differential and fully differential modes of the LTC2372-18. With digital gain compression off, the supply voltage for the LT6016 is +8V/–3.6V. With digital gain compression on, the LT6016 runs off a single 5V supply. SNR stays fairly flat at 94dBFS (pseudo-diff)/98.5dBFS (fully diff) with digital gain compression off, and 92.1dBFS(pseudodiff)/96.6dBFS(fully diff) with digital gain compression on, up to 500ksps for all modes. fIN = 1kHz AIN = –1dBFS R = 91Ω C = 4300pF 12 10 8 6 4 2 0 0 100 200 300 400 SAMPLING RATE (ksps) 500 DN1034 F05 Figure 5. Offset Error vs Sampling Rate for the Circuit of Figure 1 in Pseudo-Differential Mode Figure 6 shows distortion vs input frequency for a 400ksps sampling rate. Above 1kHz, distortion rises for all modes. –80 –85 THD (dB) –90 fSMPL = 400ksps AIN = –1dBFS R = 91Ω C = 4300pF PD FD FD GC PD GC –95 –100 –105 –110 –115 –120 100 1k INPUT FREQUENCY (Hz) 10k DN1034 F06 Figure 6. Distortion vs Input Frequency for the Circuit of Figure 1 Data Sheet Download www.linear.com/LTC2372-18 Linear Technology Corporation Conclusion A simple driver for the LTC2372-18 18-bit, 500ksps, 8-channel SAR ADC—consisting of the LT6016 low power precision dual op amp configured as noninvert‑ ing buffer is demonstrated. The driver dissipates only 3.7mW per op amp (typical), and can be reduced to 1.6mW by running off a single 5V supply with the ADC in digital gain compression mode. At sampling rates less than 300ksps, SNR is mea‑ sured at 94dB (pseudo-diff)/98.5dB (fully diff) with gain compression off and 92.1dBFS (pseudodiff)/96.6dBFS(fully diff) with digital gain compression on; THD is measured at –110dB (pseudo-diff)/–115dB (fully diff) with digital gain compression off or on. Offset measures less than 3LSB (pseudo-diff) with gain compression off. Above 300ksps, performance gradually declines up to the full 500ksps sampling rate of the LTC2372-18. For applications help, call (408) 432-1900, Ext. 3227 DN1034f LT 1015 • PRINTED IN THE USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2015

- Similar pages
- 2PB_sarinputtypesfb.pdf
- R478 - Reliability Data
- LTC2373-18 - SNRが100dBの18ビット、1Msps
- DN533 - Robust High Voltage Over-The-Top Op Amps Maintain High Input Impedance with Inputs Driven Apart or When Powered Down
- R515 Reliability Data
- Risk Assessment Advice for High Reliability Amplifiers
- LINER LT1496
- ETC HM6216255HCISERIES
- LTC2372-18 - 18-Bit, 500ksps, 8-Channel SAR ADC with 100dB SNR
- FUJITSU MB89W625C-SH
- LTC2373-18 - 18-Bit, 1Msps, 8-Channel SAR ADC with 100dB SNR
- AD EVAL-AD7944EBZ
- NTE 90030
- LTC2348-16 - Octal, 16-Bit, 200ksps Differential ±10.24V Input SoftSpan ADC with Wide Input Common Mode Range
- DN526 - Driver for 14-Bit, 4.5Msps ADC Operates Over a Wide Gain Range
- LTC2335-16 - 16-Bit, 1Msps 8-Channel Differential ±10.24V Input SoftSpan ADC with Wide Input Common Mode Range
- LTC2348-18 - Octal, 18-Bit, 200ksps Differential ±10.24V Input SoftSpan ADC with Wide Input Common Mode Range