LT8331 Low IQ Boost/SEPIC/ Flyback/Inverting Converter with 0.5A, 140V Switch DESCRIPTION FEATURES Wide Input Voltage Range: 4.5V to 100V nn Ultralow Quiescent Current and Low Ripple Burst Mode® Operation: IQ = 6µA nn 0.5A, 140V Power Switch nn Positive or Negative Output Voltage Programming with a Single Feedback Pin nn Programmable Frequency (100kHz to 500kHz) nn Synchronizable to an External Clock nn BIAS Pin for Higher Efficiency nn Programmable Undervoltage Lockout (UVLO) nn Thermally-Enhanced High Voltage MSOP Package The LT®8331 is a current mode DC/DC converter with a 140V, 0.5A switch operating from a 4.5V to 100V input. With a unique single feedback pin architecture, it is capable of boost, SEPIC, flyback or inverting configurations. Burst Mode operation consumes as low as 6μA quiescent current to maintain high efficiency at very low output currents, while keeping typical output ripple below 20mV. nn The internally-compensated current mode architecture results in stable operation over a wide range of input and output voltages and programmable switching frequencies between 100kHz to 500kHz. A SYNC/MODE pin allows synchronization to an external clock. It can also be used to select between burst or pulse-skipping modes of operation. For increased efficiency, a BIAS pin can accept a second input to supply the INTVCC regulator. Additional features include frequency foldback and programmable soft-start for controlling inductor current during start-up. APPLICATIONS Industrial and Automotive Telecom nn Medical Diagnostic Equipment nn Portable Electronics nn nn The LT8331 is available in a thermally-enhanced MSOP package with four pins removed for high voltage spacings. L, LT, LTC, LTM, Linear Technology, the Linear logo, and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 48V Output SEPIC Converter 2.2µF • 1µF ×2 1M VIN 220μH SW1-2 4.7µF ×4 EN/UVLO 1M SYNC/MODE BIAS GND 59k RT 63.4k 450kHz FBX SS VOUT 34.8k INTVCC 0.1µF 90 80 EFFICIENCY 70 60 POWER LOSS 50 30 20 0 8331 TA01a 1.0 40 VIN = 36V VIN = 48V VIN = 72V 10 1µF 1.5 0 50 100 150 LOAD CURRENT (mA) POWER LOSS (W) • LT8331 2.0 100 VOUT = 48V 150mA AT VIN = 36V 165mA AT VIN = 48V 190mA AT VIN = 72V EFFICIENCY (%) 220μH VIN 36V TO 72V Efficiency and Power Loss 0.5 0 200 8331 TA01b 8331f For more information www.linear.com/LT8331 1 LT8331 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) SW...........................................................................140V VIN, EN/UVLO...........................................................100V BIAS...........................................................................60V EN/UVLO Pin Above VIN Pin, SYNC.............................6V INTVCC (Note 2)...........................................................4V FBX............................................................................±4V Operating Junction Temperature (Note 3) LT8331E, LT8331I............................... –40°C to 125°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec).................... 300°C TOP VIEW EN/UVLO 1 VIN 3 INTVCC NC BIAS NC 5 6 7 8 16 SW1 14 SW2 17 PGND, GND 12 11 10 9 SYNC/MODE SS RT FBX MSE PACKAGE VARIATION: MSE16 (12) 16-LEAD PLASTIC MSOP θJA = 45°C/W, θJC = 10°C/W EXPOSED PAD (PIN 17) IS PGND AND GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT8331EMSE#PBF LT8331EMSE#TRPBF 8331 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C LT8331IMSE#PBF LT8331IMSE#TRPBF 8331 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C Consult LTC® Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted. PARAMETER CONDITIONS VIN Operating Voltage Range VIN Quiescent Current at Shutdown MIN RT = 100k Sleep Mode (Not Switching) SYNC = 0V Active Mode (Not Switching) V l 2 5 μA μA l 2.0 3.6 5 9.5 μA μA l 5.5 8.5 15 25 μA μA l 780 840 1420 1720 µA µA l 17 24 40 55 µA µA l 700 800 1080 1170 µA µA l 17 24 40 55 µA µA SYNC = 0V, BIAS = 0V SYNC = 0V, BIAS = 5V SYNC = INTVCC, BIAS = 0V SYNC = INTVCC, BIAS = 5V 2 UNITS 100 VEN/UVLO = 1.5V 4.5 MAX 1 2 l VEN/UVLO = 0.2V VIN Quiescent Current TYP 8331f For more information www.linear.com/LT8331 LT8331 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted. PARAMETER CONDITIONS BIAS Threshold Rising, BIAS Can Supply INTVCC Falling, BIAS Cannot Supply INTVCC VIN Falling Threshold to Supply INTVCC BIAS = 12V BIAS Falling Threshold to Supply INTVCC VIN = 12V l l MIN TYP MAX UNITS 4.10 3.725 4.4 4 4.65 4.275 V V BIAS – 1.6V V VIN – 0.4V V FBX Regulation 1.568 –0.820 FBX Regulation Voltage FBX > 0V FBX < 0V FBX Line Regulation FBX > 0V, 4.5V < VIN < 100V FBX < 0V, 4.5V < VIN < 100V FBX Pin Current FBX = 1.6V, –0.8V l –10 Switching Frequency (fOSC) RT = 301k RT = 100k RT = 56.2k l l l 92 279 465 Minimum On-Time SYNC = 0V SYNC = INTVCC l l 1.6 –0.80 1.632 –0.780 V V 0.005 0.005 0.015 0.015 %/V %/V 10 nA 100 300 500 107 321 535 kHz kHz kHz 165 160 290 290 ns ns 146 230 ns 2.4 V V Oscillator Minimum Off-Time SYNC/Mode, Mode Thresholds Rising to Select Pulse Skipping Mode Falling to Select Burst Mode Operation SYNC/Mode, Clock Thresholds Rising Falling 0.6 2.0 1.1 2.4 V V fSYNC/fOSC Allowed Ratio RT = 100k 0.95 1 1.25 kHz SYNC Pin Current SYNC = 2V –40 40 nA 0.7 A l l 0.6 Switch Maximum Switch Current Limit Threshold l 0.5 0.6 Switch Overcurrent Threshold Discharges SS Pin 1.15 Switch RDS(ON) ISW = 0.25A 1.7 Switch Leakage Current VSW = 140V 0.1 A Ω 1 µA EN/UVLO Logic EN/UVLO Pin Threshold (Rising) Start Switching l 1.576 1.74 1.90 V EN/UVLO Pin Threshold (Falling) Stop Switching l 1.556 1.6 1.644 V EN/UVLO Pin Current VEN/UVLO = 1.6V l –40 40 nA Soft-Start Soft-Start Charge Current SS = 1V Soft-Start Pull-Down Resistance Fault Condition, SS = 0.1V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: INTVCC cannot be externally driven. No external loading is allowed on this pin. Note 3: The LT8331E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, 2 µA 250 Ω characterization and correlation with statistical process controls. The LT8331I is guaranteed over the full –40°C to 125°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 4: The IC includes overtemperature protection that is intended to protect the device during overload conditions. Junction temperature will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature will reduce lifetime. 8331f For more information www.linear.com/LT8331 3 LT8331 TYPICAL PERFORMANCE CHARACTERISTICS FBX Positive Regulation Voltage vs Temperature –0.785 1.620 –0.790 1.610 –0.795 1.600 1.590 1.580 EN/UVLO Pin Thresholds vs Temperature 1.84 VIN = 12V 1.81 EN/UVLO PIN VOLTAGE (V) VIN = 12V FBX VOLTAGE (V) FBX VOLTAGE (V) 1.630 FBX Negative Regulation Voltage vs Temperature –0.800 –0.805 –0.810 VIN = 12V 1.78 1.75 EN/UVLO RISING (TURN-ON) 1.72 1.69 1.66 1.63 1.60 EN/UVLO FALLING (TURN-OFF) 1.57 1.570 –50 –25 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (°C) –0.815 –50 –25 8331 G01 NORMALIZED SWITCHING FREQUENCY (%) SWITCHING FREQUENCY (kHz) 510 505 500 495 490 485 515 510 505 500 495 490 485 480 475 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (°C) 8331 G04 10 20 30 40 50 60 70 80 90 100 VIN (V) VIN = 12V MINIMUM ON–TIME (ns) 0.60 0.55 20 40 60 DUTY CYCLE (%) 80 100 8331 G07 4 75 50 25 0 –0.8 –0.4 0.0 0.4 0.8 FBX VOLTAGE (V) 180 190 170 180 SYNC = 0V 160 150 130 –50 –25 1.6 8331 G06 200 170 1.2 Switch Minimum Off-Time vs Temperature SYNC = INTVCC 140 0 VIN = 12V 100 Switch Minimum On-Time vs Temperature 0.65 0.50 125 8331 G05 Switch Current Limit vs Duty Cycle 0.70 0 MINIMUM OFF–TIME (ns) SWITCHING FREQUENCY (kHz) 520 480 SWITCH CURRENT LIMIT (A) Normalized Switching Frequency vs FBX Voltage 525 515 475 –50 –25 8331 G03 Switching Frequency vs VIN VIN = 12V 520 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (°C) 8331 G02 Switching Frequency vs Temperature 525 1.54 –50 –25 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (°C) 160 150 140 130 120 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (°C) 8331 G08 110 –50 –25 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (°C) 8331 G09 8331f For more information www.linear.com/LT8331 LT8331 TYPICAL PERFORMANCE CHARACTERISTICS VIN Pin Current (Sleep Mode, Not Switching) vs Temperature 7.50 950 6.25 5.00 3.75 2.50 1.25 900 30 VIN = 12V VSYNC/MODE = 0V VBIAS = 0V 25 850 800 750 700 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (°C) 600 –50 –25 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (°C) 8331 G10 20 15 10 0 –50 –25 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (°C) 8331 G11 Switching Waveforms (in CCM) 8331 G12 Switching Waveforms (in DCM/Light Burst Mode) Switching Waveforms (in Deep Burst Mode) IL1+IL2 200mA/DIV IL1+IL2 200mA/DIV IL1+IL2 200mA/DIV VSW 50V/DIV VSW 50V/DIV VSW 50V/DIV 2µs/DIV VIN = 12V VSYNC/MODE = 0V VBIAS = 5V 5 650 0 –50 –25 VIN Pin Current (Active Mode, Not Switching) vs Temperature VIN PIN CURRENT (μA) VIN PIN CURRENT (μA) 8.75 1000 VIN = 12V VSYNC/MODE = 0V VBIAS = 0V VIN PIN CURRENT (μA) 10.00 VIN Pin Current (Active Mode, Not Switching) vs Temperature 8331 G13 2µs/DIV 8331 G14 5µs/DIV FRONT PAGE APPLICATION VIN = 48V, VOUT = 48V, ILOAD = 15mA FRONT PAGE APPLICATION VIN = 48V, VOUT = 48V, ILOAD = 165mA FRONT PAGE APPLICATION VIN = 48V, VOUT = 48V, ILOAD = 3mA VOUT Transient Response: Load Current Transients from 82.5mA to 165mA to 82.5mA Burst Frequency vs Load Current 8331 G15 VOUT Transient Response: Load Current Transients from 5mA to 165mA to 5mA SWITCHING FREQUENCY (kHz) 600 FRONT PAGE APPLICATION VIN = 48V, VOUT = 48V ILOAD 100mA/DIV 450 300 ILOAD 100mA/DIV VOUT 1V/DIV VOUT 500mV/DIV 150 200µs/DIV 0 0 20 40 60 80 LOAD CURRENT (mA) 100 8331 G17 FRONT PAGE APPLICATION VIN = 48V, VOUT = 48V 500µs/DIV 8331 G18 FRONT PAGE APPLICATION VIN = 48V, VOUT = 48V 8331 G16 8331f For more information www.linear.com/LT8331 5 LT8331 PIN FUNCTIONS EN/UVLO (Pin 1): Shutdown and Undervoltage Detect Pin. The LT8331 is shut down when this pin is low and active when this pin is high. Below an accurate 1.6V threshold, the part enters undervoltage lockout and stops switching. This allows an undervoltage lockout (UVLO) threshold to be programmed for system input voltage by resistively dividing down system input voltage to the EN/UVLO pin. A 140mV pin hysteresis ensures part switching resumes when the pin exceeds 1.74V. EN/UVLO pin voltage below 0.2V reduces VIN current below 1µA. If shutdown and UVLO features are not required, the pin can be tied directly to system input. VIN (Pin 3): Input Supply. This pin must be locally bypassed. Be sure to place the positive terminal of the input capacitor as close as possible to the VIN pin, and the negative terminal as close as possible to the exposed pad PGND copper (near Pin 1). INTVCC (Pin 5): Regulated 3.2V Supply for Internal Loads. The INTVCC pin must be bypassed with a minimum 1µF low ESR ceramic capacitor to GND. No additional components or loading is allowed on this pin. INTVCC draws power from the BIAS pin if 4.4V ≤ BIAS ≤ VIN – 0.4V, otherwise INTVCC is powered by the VIN pin. NC (Pins 6, 8): No Internal Connection. Leave these pins open. BIAS (Pin 7): Second Input Supply for Powering INTVCC. Removes the majority of INTVCC current from the VIN pin to improve efficiency when 4.4V ≤ BIAS ≤ VIN – 0.4V. If unused, tie the pin to GND copper. FBX (Pin 9): Voltage Regulation Feedback Pin for Positive or Negative Outputs. Connect this pin to a resistor divider 6 between the output and the exposed pad GND copper (near Pin 9). FBX reduces the switching frequency during startup and fault conditions when FBX is close to 0V. RT (Pin 10): A resistor from this pin to the exposed pad GND copper (near Pin 9) programs switching frequency. SS (Pin 11): Soft-Start Pin. Connect a capacitor from this pin to GND copper (near Pin 9) to control the ramp rate of inductor current during converter start-up. SS pin charging current is 2μA. An internal 250Ω MOSFET discharges this pin during shutdown or fault conditions. SYNC/MODE (Pin 12): This pin allows three selectable modes for optimization of performance. 1.GND: For Burst Mode operation (low IQ and low output voltage ripple at light loads). 2.External Clock : For synchronized switching frequency. 3.INTVCC: For pulse-skipping mode (at light load or low duty cycle). SW1, SW2 (Pins 14, 16): Outputs of the Internal Power Switch. Minimize the metal trace area connected to these pins to reduce EMI. PGND,GND (Pin 17): Power Ground and Signal Ground for the IC. The package has an exposed pad (Pin 17) underneath the IC which is the best path for heat out of the package. Pin 17 should be soldered to a continuous copper ground plane under the device to reduce die temperature and increase the power capability of the LT8331. Connect power ground components to the exposed pad copper exiting near Pins 1, 14 and 16. Connect signal ground components to the exposed pad copper exiting near Pins 8 and 9. 8331f For more information www.linear.com/LT8331 LT8331 BLOCK DIAGRAM C1 L1 D1 VOUT • VIN R3 OPT R4 OPT CIN L2 COUT • EN/UVLO VIN VBIAS + 0.4V(+) VBIAS – 1.6V(–) INTERNAL REFERENCE UVLO + + + – – SW2 BIAS 4.4V(+) 4.0V(–) 1.74V(+) 1.6V(–) A6 UVLO SW1 – TJ > 170°C 3.2V REGULATOR INTVCC INTVCC UVLO SYNC/MODE CVCC RT OSCILLATOR FREQUENCY FOLDBACK ERROR AMP SELECT FBX R1 ERROR AMP + VC A1 – – + R2 A7 A5 PWM COMPARATOR ERROR AMP OVERCURRENT – + M1 DRIVER BURST DETECT A2 – A3 ISS 2μA UVLO OVERCURRENT M2 MAX ILIMIT + –0.8V 1.9× MAX ILIMIT + VOUT 1.6V SWITCH LOGIC SLOPE – R5 Q1 + SLOPE RSENSE A4 – PGND/GND SS 8331 BD CSS 8331f For more information www.linear.com/LT8331 7 LT8331 OPERATION The LT8331 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation. Operation can be best understood by referring to the Block Diagram. An oscillator (with frequency programmed by a resistor at the RT pin) turns on the internal power switch at the beginning of each clock cycle. Current in the inductor then increases until the current comparator trips and turns off the power switch. The peak inductor current at which the switch turns off is controlled by the voltage on the internal VC node. The error amplifier servos the VC node by comparing the voltage on the FBX pin with an internal reference voltage (1.60V or –0.80V, depending on the chosen topology). When the load current increases it causes a reduction in the FBX pin voltage relative to the internal reference. This causes the error amplifier to increase the VC voltage until the new load current is satisfied. In this manner, the error amplifier sets the correct peak switch current level to keep the output in regulation. The LT8331 is capable of generating either a positive or negative output voltage with a single FBX pin. It can be configured as a boost, SEPIC or flyback converter to generate a positive output voltage, or as an inverting converter to generate a negative output voltage. When configured as a SEPIC converter, as shown in the Block Diagram, the FBX pin is pulled up to the internal bias voltage of 1.60V by a voltage divider (R1 and R2) connected from VOUT to GND. Amplifier A2 becomes inactive and amplifier A1 8 performs (inverting) amplification from FBX to VC. When the LT8331 is in an inverting configuration, the FBX pin is pulled down to –0.80V by a voltage divider from VOUT to GND. Amplifier A1 becomes inactive and amplifier A2 performs (non-inverting) amplification from FBX to VC. If the EN/UVLO pin voltage is below 1.6V, the LT8331 enters undervoltage lockout (UVLO), and stops switching. When the EN/UVLO pin voltage is above 1.74V (typical), the LT8331 resumes switching. If the EN/UVLO pin voltage is below 0.2V, the LT8331 draws less than 1µA from VIN. For the SYNC/MODE pin tied to ground, the LT8331 provides low output ripple Burst Mode operation with ultra low quiescent current at light loads. For the SYNC/MODE pin tied to INTVCC, the LT8331 uses pulse-skipping mode, at the expense of hundreds of microamps, to maintain output voltage regulation at light loads by skipping switch pulses. For the SYNC/MODE pin driven by an external clock, the converter switching frequency is synchronized to that clock and pulse-skipping mode is also enabled. The LT8331 includes a BIAS pin to improve efficiency across all loads. The INTVCC supply current can be drawn from the BIAS pin instead of the VIN pin for 4.4V ≤ BIAS ≤ VIN. Protection features ensure the immediate disable of switching and reset of the SS pin for any of the following faults: internal reference UVLO, INTVCC UVLO, switch current > 1.9× maximum limit, EN/UVLO < 1.6V or junction temperature > 170°C. 8331f For more information www.linear.com/LT8331 LT8331 APPLICATIONS INFORMATION ACHIEVING ULTRALOW QUIESCENT CURRENT To enhance efficiency at light loads the LT8331 uses a low ripple Burst Mode architecture. This keeps the output capacitor charged to the desired output voltage while minimizing the input quiescent current and output ripple. In Burst Mode operation, the LT8331 delivers single small pulses of current to the output capacitor followed by sleep periods where the output power is supplied by the output capacitor. While in sleep mode, the LT8331 consumes only 6µA. As the output load decreases, the frequency of single current pulses decreases (see Figure 1) and the percentage of time the LT8331 is in sleep mode increases, resulting in much higher light load efficiency than for typical converters. To optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as load current. In addition, all possible leakage currents from the output should also be minimized as they all add to the equivalent output load. The largest contributor to leakage current can be due to the reverse biased leakage of the Schottky diode (see Diode Selection in the Applications Information section). While in Burst Mode operation, the current limit of the switch is approximately 140mA resulting in the output voltage ripple shown in Figure 2. Increasing the output capacitance will decrease the output ripple proportionally. As the output load ramps upward from zero the switching frequency will increase but only up to the fixed frequency defined by the resistor at the RT pin as shown in Figure 1. The output load at which the LT8331 reaches the fixed SWITCHING FREQUENCY (kHz) 600 FRONT PAGE APPLICATION VIN = 48V, VOUT = 48V 450 300 frequency varies based on input voltage, output voltage, and inductor choice. PROGRAMMING INPUT TURN-ON AND TURN-OFF THRESHOLDS WITH EN/UVLO PIN The EN/UVLO pin voltage controls whether the LT8331 is enabled or is in a shutdown state. A 1.6V reference and a comparator A6 with built-in hysteresis (typical 140mV) allow the user to accurately program the system input voltage at which the IC turns on and off (see the Block Diagram). The typical input falling and rising threshold voltages can be calculated by the following equations: R3 + R4 R4 R3 + R4 = 1.74 • R4 VIN(FALLING,UVLO(– )) = 1.60 • VIN(RISING, UVLO(+)) VIN current is reduced below 1µA when the EN/UVLO pin voltage is less than 0.2V. The EN/UVLO pin can be connected directly to the input supply VIN for always-enabled operation. A logic input can also control the EN/UVLO pin. When operating in Burst Mode operation for light load currents, the current through the R3 and R4 network can easily be greater than the supply current consumed by the LT8331. Therefore, R3 and R4 should be large enough to minimize their effect on efficiency at light loads. INTVCC REGULATOR A low dropout (LDO) linear regulator, supplied from VIN, produces a 3.2V supply at the INTVCC pin. A minimum 1µF low ESR ceramic capacitor must be used to bypass the INTVCC pin to ground to supply the high transient currents required by the internal power MOSFET gate driver. IL1+IL2 100mA/DIV 150 VOUT 20mV/DIV 0 0 20 40 60 80 LOAD CURRENT (mA) 100 8331 F01 Figure 1. Burst Frequency vs Load Current 5µs/DIV 8331 F02 Figure 2. Burst Mode Operation 8331f For more information www.linear.com/LT8331 9 LT8331 APPLICATIONS INFORMATION No additional components or loading is allowed on this pin. The INTVCC rising threshold (to allow soft-start and switching) is typically 2.6V. The INTVCC falling threshold (to stop switching and reset soft-start) is typically 2.5V. To improve efficiency across all loads, the majority of INTVCC current can be drawn from the BIAS pin (4.4V ≤ BIAS ≤ VIN – 0.4V) instead of the VIN pin. For flyback or SEPIC applications with VIN often greater than VOUT, the BIAS pin can be directly connected to VOUT. If the BIAS pin is connected to a supply other than VOUT, be sure to bypass the pin with a local ceramic capacitor. Programming Switching Frequency The LT8331 uses a constant frequency PWM architecture that can be programmed to switch from 100kHz to 500kHz by using a resistor tied from the RT pin to ground. A table showing the necessary RT value for a desired switching frequency is in Table 1. The RT resistor required for a desired switching frequency can be calculated using: RT = 32.85 – 9.5 fSW where RT is in kΩ and fSW is the desired switching frequency in MHz. The LT8331 will not enter Burst Mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. The LT8331 may be synchronized over a 100kHz to 625kHz range. The RT resistor should be chosen to set the LT8331 switching frequency equal to or below the lowest synchronization input. For example, if the synchronization signal will be 500kHz and higher, the RT should be selected for 500kHz. For some applications it is desirable for the LT8331 to operate in pulse-skipping mode, offering two major differences from Burst Mode operation. Firstly, the clock stays awake at all times and all switching cycles are aligned to the clock. Secondly, the full switching frequency is reached at lower output load than in Burst Mode operation. These two differences come at the expense of increased quiescent current. To enable pulse-skipping mode, tie the SYNC pin above 2.4V (this can be INTVCC or a logic high output). DUTY CYCLE CONSIDERATION The LT8331 minimum on-time, minimum off-time and switching frequency (fOSC) define the allowable minimum and maximum duty cycles of the converter (see Minimum On-Time, Minimum Off-Time, and Switching Frequency in the Electrical Characteristics table). Minimum Allowable Duty Cycle = Minimum On-Time(MAX) • fOSC(MAX) Table 1. SW Frequency vs RT Value fSW (MHz) RT (kΩ) 0.1 324 0.2 154 0.3 100 0.4 73.2 0.45 63.4 0.5 56.2 Maximum Allowable Duty Cycle = The required switch duty cycle range for a Boost converter operating in continuous conduction mode (CCM) can be calculated as: DMIN = 1 – Synchronization and Mode Selection To select low ripple Burst Mode operation, tie the SYNC/ MODE pin below 0.6V (this can be ground or a logic low output). To synchronize the LT8331 oscillator to an external frequency connect a square wave (with 20% to 80% duty cycle) to the SYNC pin. The square wave amplitude should have valleys that are below 0.6V and peaks above 2.4V (up to 6V). 10 1 – Minimum Off-Time(MAX) • fOSC(MAX) DMAX = 1 – VIN(MAX) (VOUT + VD ) VIN(MIN) (VOUT + VD ) where VD is the diode forward voltage drop. If the above duty cycle calculations for a given application violate 8331f For more information www.linear.com/LT8331 LT8331 APPLICATIONS INFORMATION the minimum and/or maximum allowed duty cycles for the LT8331, operation in discontinuous conduction mode (DCM) might provide a solution. For the same VIN and VOUT levels, operation in DCM does not demand as low a duty cycle as in CCM. DCM also allows higher duty cycle operation than CCM. The additional advantage of DCM is the removal of the limitations to inductor value and duty cycle required to avoid sub-harmonic oscillations and the right half plane zero (RHPZ). While DCM provides these benefits, the trade-off is higher inductor peak current, lower available output power and reduced efficiency. SETTING THE OUTPUT VOLTAGE The output voltage is programmed with a resistor divider from the output to the FBX pin. Choose the resistor values for a positive output voltage according to: V R1 = R2 • OUT – 1 1.60V charge the output capacitor as quickly as possible, resulting in large peak currents. A large surge current may cause inductor saturation or power switch failure. The LT8331 addresses this mechanism with a programmable soft-start function. As shown in the Block Diagram, the soft-start function controls the ramp of the power switch current by controlling the ramp of VC through Q1. This allows the output capacitor to be charged gradually toward its final value while limiting the start-up peak currents. Figure 3 shows the output voltage and supply current for the first page Typical Application. It can be seen that both the output voltage and supply current come up gradually. IL1+IL2 100mA/DIV VOUT 20V/DIV Choose the resistor values for a negative output voltage according to: 2ms/DIV 8331 F03 Figure 3. Soft-Start Waveforms |V | R1 = R2 • OUT – 1 0.80V FAULT PROTECTION The locations of R1 and R2 are shown in the Block Diagram. 1% resistors are recommended to maintain output voltage accuracy. Higher-value FBX divider resistors result in the lowest input quiescent current and highest light-load efficiency. FBX divider resistors R1 and R2 are usually in the range from 25k to 1M. An inductor overcurrent fault (> 1.15A) and/or INTVCC undervoltage (INTVCC < 2.5V) and/or thermal lockout (TJ > 170°C) will immediately prevent switching, will reset the SS pin and will pull down VC. Once all faults are removed, the LT8331 will soft-start VC and hence inductor peak current. FREQUENCY FOLDBACK SOFT-START The LT8331 contains several features to limit peak switch currents and output voltage (VOUT) overshoot during start-up or recovery from a fault condition. The primary purpose of these features is to prevent damage to external components or the load. High peak switch currents during start-up may occur in switching regulators. Since VOUT is far from its final value, the feedback loop is saturated and the regulator tries to During start-up or fault conditions in which VOUT is very low, extremely small duty cycles may be required to maintain control of inductor peak current. The minimum on-time limitation of the power switch might prevent these low duty cycles from being achievable. In this scenario inductor current rise will exceed inductor current fall during each cycle, causing inductor current to “walk up” beyond the switch current limit. The LT8331 provides protection 8331f For more information www.linear.com/LT8331 11 LT8331 APPLICATIONS INFORMATION from this by folding back switching frequency whenever FBX pin is close to GND (low VOUT levels). This frequency foldback provides a larger switch-off time, allowing inductor current to fall enough each cycle (see Normalized Switching Frequency vs FBX Voltage in the Typical Performance Characteristics section). THERMAL LOCKOUT If the LT8331 die temperature reaches 170°C (typical), the part will stop switching and go into thermal lockout. When the die temperature has dropped by 5°C (nominal), the part will resume switching with a soft-started inductor peak current. COMPENSATION The LT8331 is internally compensated. The decision to use either low ESR (ceramic) capacitors or the higher ESR (tantalum or OS-CON) capacitors, for the output capacitor, can affect the stability of the overall system. The ESR of any capacitor, along with the capacitance itself, contributes a zero to the system. For the tantalum and OS-CON capacitors, this zero is located at a lower frequency due to the higher value of the ESR, while the zero of a ceramic capacitor is at a much higher frequency and can generally be ignored. A phase lead zero can be intentionally introduced by placing a capacitor in parallel with the resistor between VOUT and FBX. By choosing the appropriate values for the resistor and capacitor, the zero frequency can be designed to improve the phase margin of the overall converter. The typical target value for the zero frequency is between 5kHz to 20kHz. A practical approach to compensation is to start with one of the circuits in this data sheet that is similar to your application. Optimize performance by adjusting the output capacitor and/or the feed forward capacitor (connected across the feedback resistor from output to FBX pin). THERMAL CONSIDERATIONS Care should be taken in the layout of the PCB to ensure good heat sinking of the LT8331. The package has an exposed pad (Pin 17) underneath the IC which is the best path for 12 heat out of the package. Pin 17 should be soldered to a continuous copper ground plane under the device to reduce die temperature and increase the power capability of the LT8331. The ground plane should be connected to large copper layers to spread heat dissipated by the LT8331. Power dissipation within the LT8331 (PDISS_LT8331) can be estimated by subtracting the inductor and Schottky diode power losses from the total power losses calculated in an efficiency measurement. The junction temperature of LT8331 can then be estimated by: TJ (LT8331) = TA + θ J A • PDISS_LT8331 APPLICATION CIRCUITS The LT8331 can be configured for different topologies. The first topology to be analyzed will be the boost converter, followed by the flyback, SEPIC and inverting converters. Boost Converter: Switch Duty Cycle The LT8331 can be configured as a boost converter for the applications where the converter output voltage is higher than the input voltage. Remember that boost converters are not short-circuit protected. Under a shorted output condition, the inductor current is limited only by the input supply capability. For applications requiring a step-up converter that is short-circuit protected, please refer to the Applications Information section covering SEPIC converters. The conversion ratio as a function of duty cycle is: VOUT 1 = VIN 1− D in continuous conduction mode (CCM). For a boost converter operating in CCM, the duty cycle of the main switch can be calculated based on the output voltage (VOUT) and the input voltage (VIN). The maximum duty cycle (DMAX) occurs when the converter has the minimum input voltage: DMAX = VOUT − VIN(MIN) VOUT 8331f For more information www.linear.com/LT8331 LT8331 APPLICATIONS INFORMATION Discontinuous conduction mode (DCM) provides higher conversion ratios at a given frequency at the cost of reduced efficiencies, higher switching currents, and lower available output power. Boost Converter: Maximum Output Current Capability and Inductor Selection For the boost topology, the maximum average inductor current is: I L(MAX )(AVE) = IO(MAX ) • 1 1 • 1 − DMAX η where η (< 1.0) is the converter efficiency. Due to the current limit of its internal power switch, the LT8331 should be used in a boost converter whose maximum output current (IO(MAX)) is: I O(MAX ) ≤ VIN(MIN) VOUT • ( 0.5A − 0.5 • ∆ISW ) • η Minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ∆ISW. The inductor ripple current ∆ISW has a direct effect on the choice of the inductor value and the converter’s maximum output current capability. Choosing smaller values of ∆ISW increases output current capability, but requires large inductances and reduces the current loop gain (the converter will approach voltage mode). Accepting larger values of ∆ISW provides fast transient response and allows the use of low inductances, but results in higher input current ripple and greater core losses, and reduces output current capability. It is recommended to choose a ∆ISW of approximately 0.2A to 0.3A. Given an operating input voltage range, and having chosen the operating frequency and ripple current in the inductor, the inductor value of the boost converter can be determined using the following equation: L = VIN(MIN) ∆ISW • fOSC • DMAX The peak inductor current is the switch current limit (maximum 0.7A), and the RMS inductor current is approximately equal to IL(MAX)(AVE). Choose an inductor that can handle at least 0.7A without saturating, and ensure that the inductor has a low DCR (copper-wire resistance) to minimize I2R power losses. Note that in some applications, the current handling requirements of the inductor can be lower, such as in the SEPIC topology where each inductor only carries one-half of the total switch current. For better efficiency, use similar valued inductors with a larger volume. Many different sizes and shapes are available from various manufacturers (see Table 2). Choose a core material that has low losses at the programmed switching frequency, such as a ferrite core. The final value chosen for the inductor should not allow peak inductor currents to exceed 0.5A in steady state at maximum load. Due to tolerances, be sure to account for minimum possible inductance value, switching frequency and converter efficiency. Table 2. Inductor Manufacturers Sumida (847) 956-0666 www.sumida.com TDK (847) 803-6100 www.tdk.com Murata (714) 852-2001 www.murata.com Coilcraft (847) 639-6400 www.coilcraft.com Wurth (605) 886-4385 www.we-online.com BOOST CONVERTER: INPUT CAPACITOR SELECTION Bypass the input of the LT8331 circuit with a ceramic capacitor of X7R or X5R type placed as close as possible to the VIN and GND pins. Y5V types have poor performance over temperature and applied voltage, and should not be used. A 4.7µF to 10µF ceramic capacitor is adequate to bypass the LT8331 and will easily handle the ripple current. If the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. This can be provided with a low performance electrolytic capacitor. A precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT8331. A ceramic input capacitor combined with trace or cable 8331f For more information www.linear.com/LT8331 13 LT8331 APPLICATIONS INFORMATION inductance forms a high quality (under damped) tank circuit. If the LT8331 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8331’s voltage rating. This situation is easily avoided (see Application Note 88). between ∆VESR and ∆VCOUT. This percentage ripple will change, depending on the requirements of the application, and the following equations can easily be modified. For a 1% contribution to the total ripple voltage, the ESR of the output capacitor can be determined using the following equation: BOOST CONVERTER: OUTPUT CAPACITOR SELECTION Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multilayer ceramic capacitors are an excellent choice, as they are small and have extremely low ESR. Use X5R or X7R types. This choice will provide low output ripple and good transient response. A 10µF to 47µF output capacitor is sufficient for most applications, but systems with very low output currents may need only a 1µF or 2.2µF output capacitor. Solid tantalum or OS-CON capacitor can be used, but they will occupy more board area than a ceramic and will have a higher ESR. Always use a capacitor with a sufficient voltage rating. Contributions of ESR (equivalent series resistance), ESL (equivalent series inductance) and the bulk capacitance must be considered when choosing the correct output capacitors for a given output ripple voltage. The effect of these three parameters (ESR, ESL and bulk C) on the output voltage ripple waveform for a typical boost converter is illustrated in Figure 4. tON tOFF ∆VCOUT VOUT (AC) ∆VESR RINGING DUE TO TOTAL INDUCTANCE (BOARD + CAP) 8331 F04 Figure 4. The Output Ripple Waveform of a Boost Converter The choice of component(s) begins with the maximum acceptable ripple voltage (expressed as a percentage of the output voltage), and how this ripple should be divided between the ESR step ∆VESR and the charging/discharging ∆VCOUT. For the purpose of simplicity, we will choose 2% for the maximum output ripple, to be divided equally 14 ESRCOUT ≤ 0.01 • VOUT ID(PEAK ) For the bulk C component, which also contributes 1% to the total ripple: COUT ≥ IO(MAX ) 0.01 • VOUT • fOSC The output capacitor in a boost regulator experiences high RMS ripple currents, as shown in Figure 4. The RMS ripple current rating of the output capacitor can be determined using the following equation: IRMS(COUT) ≥ IO(MAX ) • DMAX 1 − DMAX Multiple capacitors are often paralleled to meet ESR requirements. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering and has the required RMS current rating. Additional ceramic capacitors in parallel are commonly used to reduce the effect of parasitic inductance in the output capacitor, which reduces high frequency switching noise on the converter output. CERAMIC CAPACITORS Ceramic capacitors are small, robust and have very low ESR. However, ceramic capacitors can cause problems when used with the LT8331 due to their piezoelectric nature. When in Burst Mode operation, the LT8331’s switching frequency depends on the load current, and at very light loads the LT8331 can excite the ceramic capacitor at audio frequencies, generating audible noise. Since the LT8331 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear. If this is unacceptable, use a high performance tantalum 8331f For more information www.linear.com/LT8331 LT8331 APPLICATIONS INFORMATION or electrolytic capacitor at the output. Low noise ceramic capacitors are also available. Table 3. Ceramic Capacitor Manufacturers Taiyo Yuden (408) 573-4150 www.t-yuden.com AVX (803) 448-9411 www.avxcorp.com Murata (714) 852-2001 www.murata.com BOOST CONVERTER: DIODE SELECTION A Schottky diode is recommended for use with the LT8331. Low leakage Schottky diodes are necessary when low quiescent current is desired at low loads. The diode leakage appears as an equivalent load at the output and should be minimized. Choose Schottky diodes with sufficient reverse voltage ratings for the target applications. Table 4. Recommended Schottky Diodes PART NUMBER AVERAGE FORWARD REVERSE REVERSE CURRENT VOLTAGE CURRENT (mA) (V) (µA) MANUFACTURER DFLS1100 1000 100 1.0 Diodes, Inc. RB558VA150TR 500 150 0.5 ROHM RB068L150TE25 2000 150 3.0 ROHM RF101L2STE25 1000 200 10 ROHM BAV21W 200 200 0.1 Vishay BOOST CONVERTER: LAYOUT HINTS The high speed operation of the LT8331 demands careful attention to board layout. Careless layout will result in performance degradation. Figure 5 shows the recommended component placement for a boost converter. Note the vias under the exposed pad. These should connect to a local ground plane for better thermal performance. FLYBACK CONVERTER APPLICATIONS The LT8331 can be configured as a flyback converter for the applications where the converters have multiple outputs, high output voltages or isolated outputs. Figure 6 shows a simplified flyback converter. The flyback converter has a very low parts count for multiple outputs, and with prudent selection of turns ratio, can have high output/input voltage conversion ratios with a desirable duty cycle. However, it has low efficiency due to the high peak currents, high peak voltages and consequent power loss. The flyback converter can be designed to operate either in continuous or discontinuous mode. Compared to continuous mode, discontinuous mode has the advantage of VIN VOUT PGND SW ° SW1 16 1 EN PGND SW2 14 SW 3 VIN 5 INTVCC SYNC 12 6 NC SS 11 7 BIAS GND 8 NC RT 10 FBX 9 VOUT ° 8331 F05 Figure 5. Suggested Boost Converter Layout 8331f For more information www.linear.com/LT8331 15 LT8331 APPLICATIONS INFORMATION SUGGESTED RCD SNUBBER VIN + CIN – VSN + CSN RSN LP According to Figure 6, the peak SW voltage is: D NP:NS LS ID COUT + DSN + VOUT – VSW(PEAK) = VIN(MAX) + VSN where VSN is the snubber capacitor voltage. A smaller VSN results in a larger snubber loss. A reasonable VSN is 1.5 to 2 times of the reflected output voltage: ISW VSN = k • SW LT8331 GND k = 1.5 ~ 2 8331 F06 Figure 6. A Simplified Flyback Converter smaller transformer inductances and easy loop compensation, and the disadvantage of higher peak-to-average current and lower efficiency. Flyback Converter: Switch Duty Cycle and Turns Ratio The flyback converter conversion ratio in the continuous mode operation is: VOUT • NP NS VOUT N D = S • VIN NP 1− D where NS/NP is the second to primary turns ratio. D is duty cycle. Figure 7 shows the waveforms of the flyback converter in discontinuous mode operation. During each switching period TS, three subintervals occur: DTS, D2TS, D3TS. During DTS, M is on, and D is reverse-biased. During D2TS, M is off, and LS is conducting current. Both LP and LS currents are zero during D3TS. According to the Absolute Maximum Ratings table, the SW voltage Absolute Maximum value is 140V. Therefore, the maximum primary to secondary turns ratio (for both the continuous and the discontinuous operation) should be: 140V − VIN(MAX ) NP ≤ NS k • VOUT According to the preceding equations, the user has relative freedom in selecting the switch duty cycle or turns ratio to suit a given application. The selections of the duty cycle and the turns ratio are somewhat iterative processes, due to the number of variables involved. The user can choose either a duty cycle or a turns ratio as the start point. The following trade-offs should be considered when selecting the switch duty cycle or turns ratio, to optimize the VSW ISW The flyback converter conversion ratio in the discontinuous mode operation is: VOUT N D = S • VIN NP D2 ID ID(MAX) DTS D2TS TS t D3TS 8331 F07 Figure 7. Waveforms of the Flyback Converter in Discontinuous Mode Operation 16 8331f For more information www.linear.com/LT8331 LT8331 APPLICATIONS INFORMATION converter performance. A higher duty cycle affects the flyback converter in the following aspects: n n n Lower switch RMS current ISW(RMS), but higher switch VSW peak voltage Lower diode peak reverse voltage, but higher diode RMS current ID(RMS) Higher transformer turns ratio (NP/NS) It is recommended to choose a duty cycle between 20% and 80%. Flyback Converter: Maximum Output Current Capability and Transformer Design The maximum output current capability and transformer design for continuous conduction mode (CCM) is chosen as presented here. The maximum duty cycle (DMAX) occurs when the converter has the minimum VIN: N VOUT • P NS DMAX = N VOUT • P + VIN(MIN) NS VIN(MIN) VOUT Given an operating input voltage range, and having chosen the operating frequency and ripple current in the primary winding, the primary winding inductance can be calculated using the following equation: L = VIN(MIN) ∆ISW • fOSC • DMAX The primary winding peak current is the switch current limit (maximum 0.7A). The primary and secondary maximum RMS currents are: I LP(RMS) ≈ I LS(RMS) ≈ POUT(MAX ) DMAX • VIN(MIN) • η I OUT(MAX ) 1 − DMAX Based on the preceding equations, the user should design/ choose the transformer having sufficient saturation and RMS current ratings. Flyback Converter: Snubber Design Due to the current limit of its internal power switch, the LT8331 should be used in a flyback converter whose maximum output current (IO(MAX)) is: IO(MAX ) ≤ primary and secondary inductances, but results in higher input current ripple, greater core losses, and reduces the output current capability. It is recommended to choose a ∆ISW of approximately 0.2A to 0.3A. • DMAX • ( 0.5A − 0.5 • ∆ISW ) • η where η (< 1.0) is the converter efficiency. Minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ∆ISW. The transformer ripple current ∆ISW has a direct effect on the design/choice of the transformer and the converter’s output current capability. Choosing smaller values of ∆ISW increases the output current capability, but requires large primary and secondary inductances and reduces the current loop gain (the converter will approach voltage mode). Accepting larger values of ∆ISW allows the use of low Transformer leakage inductance (on either the primary or secondary) causes a voltage spike to occur after the MOSFET turn-off. This is increasingly prominent at higher load currents, where more stored energy must be dissipated. In some cases a snubber circuit will be required to avoid overvoltage breakdown at the MOSFET’s drain node. There are different snubber circuits (such as RC snubber, RCD snubber, etc.) and Application Note 19 is a good reference on snubber design. An RCD snubber is shown in Figure 6. The snubber resistor value (RSN) can be calculated by the following equation: RSN = 2 • V 2 SN − VSN • VOUT • NP NS I2 SW(PEAK ) • L LK • fOSC 8331f For more information www.linear.com/LT8331 17 LT8331 APPLICATIONS INFORMATION LLK is the leakage inductance of the primary winding, which is usually specified in the transformer characteristics. LLK can be obtained by measuring the primary inductance with the secondary windings shorted. The snubber capacitor value (CSN) can be determined using the following equation: CSN = ∆VSN VSN • RSN • fOSC Flyback Converter: Output Diode Selection The output diode in a flyback converter is subject to large RMS current and peak reverse voltage stresses. A fast switching diode with a low forward drop and a low reverse leakage is desired. Schottky diodes are recommended if the output voltage is below 100V. Approximate the required peak repetitive reverse voltage rating VRRM using: NS • VIN(MAX ) + VOUT NP The power dissipated by the diode is: IRMS(COUT),CONTINUOUS ≈ IO(MAX ) • DMAX 1 − DMAX Flyback Converter: Input Capacitor Selection where ∆VSN is the voltage ripple across CSN. A reasonable ∆VSN is 5% to 10% of VSN. The reverse voltage rating of DSN should be higher than the sum of VSN and VIN(MAX). VRRM > The RMS ripple current rating of the output capacitors in continuous operation can be determined using the following equation: The input capacitor in a flyback converter is subject to a large RMS current due to the discontinuous primary current. To prevent large voltage transients, use a low ESR input capacitor sized for the maximum RMS current. The RMS ripple current rating of the input capacitors in continuous operation can be determined using the following equation: POUT(MAX ) VIN(MIN) • η • 1−DMAX DMAX SEPIC CONVERTER APPLICATIONS The LT8331 can be configured as a SEPIC (single-ended primary inductance converter), as shown in Figure 8. This topology allows for the input to be higher, equal, or lower than the desired output voltage. The conversion ratio as a function of duty cycle is: PD = IO(MAX) • VD and the diode junction temperature is: IRMS(CIN),CONTINUOUS ≈ VOUT + VD D = VIN 1− D in continuous conduction mode (CCM). TJ = TA + PD • Rθ J A The RθJA to be used in this equation normally includes the RθJC for the device, plus the thermal resistance from the board to the ambient temperature in the enclosure. TJ must not exceed the diode maximum junction temperature rating. CDC L1 D1 VIN VOUT CIN L2 VIN Flyback Converter: Output Capacitor Selection COUT SW LT8331 EN/UVLO The output capacitor of the flyback converter has a similar operation condition as that of the boost converter. Refer to the Boost Converter: Output Capacitor Selection section for the calculation of COUT and ESRCOUT. INTVCC FBX GND 8331 F08 Figure 8. LT8331 Configured in a SEPIC Topology 18 8331f For more information www.linear.com/LT8331 LT8331 APPLICATIONS INFORMATION In a SEPIC converter, no DC path exists between the input and output. This is an advantage over the boost converter for applications requiring the output to be disconnected from the input source when the circuit is in shutdown. SEPIC Converter: Switch Duty Cycle and Frequency For a SEPIC converter operating in CCM, the duty cycle of the main switch can be calculated based on the output voltage (VOUT), the input voltage (VIN) and the diode forward voltage (VD). output power is equal to the input power, the maximum average inductor currents of L1 and L2 are: IL1(MAX)(AVE) = IIN(MAX)(AVE) = IO(MAX) • VOUT + VD VIN(MIN) + VOUT + VD ISW(MAX)(AVE) = IL1(MAX)(AVE) + IL2(MAX)(AVE) VOUT + VD VIN(MAX) + VOUT + VD Be sure to check that DMAX and DMIN obey: DMAX < 1 – Minimum Off-Time(MAX) • fOSC(MAX) and = IO(MAX) • 1 1 − DMAX and the peak switch current is: Conversely, the minimum duty cycle (DMIN) occurs when the converter operates at the maximum input voltage: DMIN = IL2(MAX)(AVE) = IO(MAX) In a SEPIC converter, the switch current is equal to IL1 + IL2 when the power switch is on, therefore, the maximum average switch current is defined as: The maximum duty cycle (DMAX) occurs when the converter operates at the minimum input voltage: DMAX = DMAX 1 − DMAX DMIN > Minimum On-Time(MAX) • fOSC(MAX) where Minimum Off-Time, Minimum On-Time and fOSC are specified in the Electrical Characteristics table. SEPIC Converter: The Maximum Output Current Capability and Inductor Selection As shown in Figure 8, the SEPIC converter contains two inductors: L1 and L2. L1 and L2 can be independent, but can also be wound on the same core, since identical voltages are applied to L1 and L2 throughout the switching cycle. For the SEPIC topology, the current through L1 is the converter input current. Based on the fact that, ideally, the c 1 ISW(PEAK) = 1 + • IO(MAX) • 2 1 − DMAX The constant c in the preceding equations represents the percentage peak-to-peak ripple current in the switch, relative to ISW(MAX)(AVE), as shown in Figure 9. Then, the switch ripple current ∆ISW can be calculated by: ∆ISW = c • ISW(MAX)(AVE) The inductor ripple currents ∆IL1 and ∆IL2 are identical: ∆IL1 = ∆IL2 = 0.5 • ∆ISW ISW ∆ISW = χ • ISW(MAX)(AVE) ISW(MAX)(AVE) t DTS TS 8331 F09 Figure 9. The Switch Current Waveform of the SEPIC Converter 8331f For more information www.linear.com/LT8331 19 LT8331 APPLICATIONS INFORMATION The inductor ripple current has a direct effect on the choice of the inductor value. Choosing smaller values of ∆IL requires large inductances and reduces the current loop gain (the converter will approach voltage mode). Accepting larger values of ∆IL allows the use of low inductances, but results in higher input current ripple and greater core losses. It is recommended that c falls in the range of 0.5 to 0.8. Due to the current limit of its internal power switch, the LT8331 should be used in a SEPIC converter whose maximum output current (IO(MAX)) is: IO(MAX) < (1 – DMAX ) • (0.5A – 0.5 • ∆ISW ) • η where η (< 1.0) is the converter efficiency. Minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ∆ISW. Given an operating input voltage range, and having chosen ripple current in the inductor, the inductor value (L1 and L2 are independent) of the SEPIC converter can be determined using the following equation: L1 = L2 = VIN(MIN) 0.5 • ∆ISW • fOSC • DMAX Based on the preceding equations, the user should choose the inductors having sufficient saturation and RMS current ratings. SEPIC Converter: Output Diode Selection To maximize efficiency, a fast switching diode with a low forward drop and low reverse leakage is desirable. The average forward current in normal operation is equal to the output current. It is recommended that the peak repetitive reverse voltage rating VRRM is higher than VOUT + VIN(MAX) by a safety margin (a 10V safety margin is usually sufficient). The power dissipated by the diode is: PD = IO(MAX) • VD where VD is diode’s forward voltage drop, and the diode junction temperature is: TJ = TA + PD • Rθ J A The RθJA used in this equation normally includes the RθJC for the device, plus the thermal resistance from the board, to the ambient temperature in the enclosure. TJ must not exceed the diode maximum junction temperature rating. SEPIC Converter: Output and Input Capacitor Selection For most SEPIC applications, the equal inductor values will fall in the range of 4.7µH to 220µH. The selections of the output and input capacitors of the SEPIC converter are similar to those of the boost converter. By making L1 = L2, and winding them on the same core, the value of inductance in the preceding equation is replaced by 2L, due to mutual inductance: SEPIC Converter: Selecting the DC Coupling Capacitor L= VIN(MIN) ∆ISW • fOSC • DMAX This maintains the same ripple current and energy storage in the inductors. The peak inductor currents are: IL1(PEAK) = IL1(MAX) + 0.5 • ∆IL1 The DC voltage rating of the DC coupling capacitor (CDC, as shown in Figure 10) should be larger than the maximum input voltage: VCDC > VIN(MAX) CDC has nearly a rectangular current waveform. During the switch off-time, the current through CDC is IIN, while IL2(PEAK) = IL2(MAX) + 0.5 • ∆IL2 The maximum RMS inductor currents are approximately equal to the maximum average inductor currents. 20 8331f For more information www.linear.com/LT8331 LT8331 APPLICATIONS INFORMATION approximately –IO flows during the on-time. The RMS rating of the coupling capacitor is determined by the following equation: VOUT + VD VIN(MIN) IRMS(CDC) > IO(MAX) • INVERTING CONVERTER APPLICATIONS The LT8331 can be configured as a dual-inductor inverting topology, as shown in Figure 10. The VOUT to VIN ratio is: VOUT − VD D = − VIN 1− D CDC VIN + + CIN SW LT8331 L2 – – COUT D1 GND and DMIN > Minimum On-Time(MAX) • fOSC(MAX) where Minimum Off-Time, Minimum On-Time and fOSC are specified in the Electrical Characteristics table. Inverting Converter: Inductor, Output Diode and Input Capacitor Selections The selections of the inductor, output diode and input capacitor of an inverting converter are similar to those of the SEPIC converter. Please refer to the corresponding SEPIC converter sections. Inverting Converter: Output Capacitor Selection in continuous conduction mode (CCM). L1 DMAX < 1 – Minimum Off-Time(MAX) • fOSC(MAX) A low ESR and ESL, X5R or X7R ceramic capacitor works well for CDC. Be sure to check that DMAX and DMIN obey : VOUT + + 8331 F10 Figure 10. A Simplified Inverting Converter Inverting Converter: Switch Duty Cycle and Frequency For an inverting converter operating in CCM, the duty cycle of the main switch can be calculated based on the negative output voltage (VOUT) and the input voltage (VIN). The maximum duty cycle (DMAX) occurs when the converter has the minimum input voltage: The inverting converter requires much smaller output capacitors than those of the boost, flyback and SEPIC converters for similar output ripples. This is due to the fact that, in the inverting converter, the inductor L2 is in series with the output, and the ripple current flowing through the output capacitors are continuous. The output ripple voltage is produced by the ripple current of L2 flowing through the ESR and bulk capacitance of the output capacitor: 1 ∆VOUT(P – P) = ∆IL2 • ESRCOUT + 8 • f • C OSC OUT After specifying the maximum output ripple, the user can select the output capacitors according to the preceding equation. VOUT − VD − VD − VIN(MIN) The ESR can be minimized by using high quality X5R or X7R dielectric ceramic capacitors. In many applications, ceramic capacitors are sufficient to limit the output voltage ripple. Conversely, the minimum duty cycle (DMIN) occurs when the converter operates at the maximum input voltage : The RMS ripple current rating of the output capacitor needs to be greater than: DMAX = DMIN = VOUT VOUT VOUT − VD − VD − VIN(MAX) IRMS(COUT) > 0.3 • ∆IL2 8331f For more information www.linear.com/LT8331 21 LT8331 APPLICATIONS INFORMATION Inverting Converter: Selecting the DC Coupling Capacitor approximately –IO flows during the on-time. The RMS rating of the coupling capacitor is determined by the following equation: The DC voltage rating of the DC coupling capacitor (CDC, as shown in Figure 10) should be larger than the maximum input voltage minus the output voltage (negative voltage): VCDC > VIN(MAX) – VOUT IRMS(CDC) > IO(MAX) • DMAX 1 − DMAX A low ESR and ESL, X5R or X7R ceramic capacitor works well for CDC. CDC has nearly a rectangular current waveform. During the switch off-time, the current through CDC is IIN, while TYPICAL APPLICATIONS 9V to 16V Input, 135V Boost Converter VIN 9V TO 16V L1 100μH C1 10µF R3 1M VIN D1 C3 1µF SW1-2 R1 1M LT8331 EN/UVLO SYNC/MODE R4 287k VOUT = 135V 4mA AT VIN = 9V 10mA AT VIN = 12V 17mA AT VIN = 16V FBX BIAS GND RT SS INTVCC C2 1µF C4 0.1µF R5 154k R2 12.1k 200kHz D1: ROHM RB558VA150TR L1: WURTH ELEKTRONIK WE-744 066 101 C1: MURATA GRM31CR71E106MA12L C3: UNITED CHEMI-CON KTS251B105M55N0T00 8331 TA03 36V to 72V Input,120V Boost Converter VIN 36V TO 72V L1 100μH C1 4.7µF R3 1M VIN D1 C3 1µF SW1-2 R1 1M LT8331 EN/UVLO SYNC/MODE R4 59k R5 63.4k 450kHz 22 FBX BIAS GND RT VOUT = 120V 55mA AT VIN = 36V 75mA AT VIN = 48V 100mA AT VIN = 72V SS INTVCC C4 0.1µF R2 13.3k C2 1µF D1: ROHM RB558VA150TR L1: WURTH ELEKTRONIK WE 744 066 101 C1: MURATA GRJ32DC72A475KE11L C3: UNITED CHEMI-CON KTS251B105M55N0T00 8331 TA04 8331f For more information www.linear.com/LT8331 LT8331 TYPICAL APPLICATIONS 10V to 48V Input, 240V Boost Converter C5 0.1μF D3 C6 1μF D2 L1 330μH VIN 10V TO 48V R6 10Ω D1 VOUT2 = 240V 15mA AT VIN = 12V 28mA AT VIN = 24V 35mA AT VIN = 36V 40mA AT VIN = 48V VOUT1 C1 10μF R3 1M VIN VOUT2 SW1-2 LT8331 INTVCC R4 249k SYNC/MODE FBX BIAS GND RT R1 2M C7 4.7pF EN/UVLO C3 1μF ×2 R5 154k R2 13.3k INTVCC C4 1µF INTVCC SS C2 0.22µF 8331 TA05 200kHz D1, D2, D3: DIODES INC. BAV21W L1: SUMIDA CDRH8D43RT125NP-331MC C1: MURATA GRM31CR61H106KA12L C3, C6: MURATA GRM55DR72E105KW01L C5: MURATA GRM31CR72D104KW03L C7: MURATA GQM2195C2E4R7CB12J 36V to 72V Input, 48V SEPIC Converter C5 2.2µF L1 220μH D1 • VIN 36V TO 72V C1 1µF ×2 R3 1M VIN SW1-2 • LT8331 L2 220μH C3 4.7µF ×4 EN/UVLO R1 1M SYNC/MODE R4 59k R5 63.4k FBX BIAS GND RT SS INTVCC C4 0.1µF VOUT R2 34.8k C2 1µF 8331 TA06 450kHz D1: ROHM RB558VA150TR L1, L2: COILTRONICS DRQ127-221 C1: MURATA GRM32ER72A105KA01L VOUT = 48V 150mA AT VIN = 36V 165mA AT VIN = 48V 190mA AT VIN = 72V C3: MURATA GRJ32DC72A475KE11L C5: MURATA GRM31CR72A225KA73L 8331f For more information www.linear.com/LT8331 23 LT8331 TYPICAL APPLICATIONS 4.5V to 80V Input, 12V SEPIC Converter C5 1µF L1 33μH D1 • VIN 4.5V TO 80V C1 1µF ×2 R3 1M VIN C3 22µF L2 33μH SW1-2 • LT8331 EN/UVLO INTVCC R1 1M SYNC/MODE FBX BIAS GND R4 787k RT VOUT R2 154k INTVCC C2 1µF INTVCC SS R5 63.4k VOUT = 12V 75mA AT VIN = 4.5V 120mA AT VIN = 12V 120mA AT VIN = 24V 120mA AT VIN = 48V 120mA AT VIN = 80V C4 0.1µF 8331 TA07 450kHz D1: ROHM RB578VAM100TR L1, L2: COILTRONICS DRQ74-330 C1: MURATA GRM32ER72A105KA01L C3: MURATA GRM32ER71E226KE15L C5: MURATA GRM31CR72A105KA01L 4.5V to 80V Input, 5V SEPIC Converter L1 33μH D1 • VIN 4.5V TO 80V C5 1µF C1 1µF R3 1M VIN L2 33μH SW1-2 • LT8331 C3 47µF ×2 EN/UVLO INTVCC R4 787k R1 1M SYNC/MODE RT R5 100k FBX BIAS GND SS INTVCC C4 0.1µF VOUT 24 R2 464k INTVCC C2 1µF 8331 TA08 300kHz D1: ROHM RB578VAM100TR L1, L2: COILTRONICS DRQ74-330 C1: MURATA GRM32ER72A105KA01L VOUT = 5V 130mA AT VIN = 4.5V 175mA AT VIN = 12V 180mA AT VIN = 24V 180mA AT VIN = 48V 180mA AT VIN = 80V C3: MURATA GRM31CR61A476ME15L C5: MURATA GRM31CR72A105KA01L 8331f For more information www.linear.com/LT8331 LT8331 TYPICAL APPLICATIONS 36V to 72V Input, –24V Inverting Converter C5 4.7µF • VIN 36V TO 72V L2 100μH C1 4.7µF R3 1M VIN C3 10µF D1 SW1-2 LT8331 EN/UVLO R1 1M SYNC/MODE R4 59k VOUT = –24V 175mA AT VIN = 36V 190mA AT VIN = 48V 200mA AT VIN = 72V • L1 100μH FBX BIAS GND RT INTVCC SS C2 1µF C4 0.1µF R5 63.4k R2 34.8k 8331 TA09 450kHz D1: ROHM RB558VA150TR L1, L2: COILTRONICS DRQ127-101 C1: MURATA GRM32DC72A475K11L C3: MURATA GRM31CR61H106KA12L C5: MURATA GRM32DC72A475K11L 4.5V to 80V Input, –12V Inverting Converter C5 1µF L1 33μH C1 1µF ×2 R3 1M • • VIN 4.5V TO 80V L2 33μH VIN SW1-2 D1 C3 22µF LT8331 EN/UVLO R1 1M SYNC/MODE RT R5 100k FBX BIAS GND R4 787k SS INTVCC C4 22nF R2 71.5k C2 1µF 8331 TA10 300kHz D1: DIODES INC. DFLS1100 L1, L2: COILTRONICS DRQ74-330 C1: MURATA GRM32ER72A105KA01L VOUT = –12V 70mA AT VIN = 4.5V 80mA AT VIN = 12V 80mA AT VIN = 48V 80mA AT VIN = 80V C3: MURATA GRM32ER61A226KE20L C5: MURATA GRM31CR72A105KA01L 8331f For more information www.linear.com/LT8331 25 LT8331 TYPICAL APPLICATIONS 4.5V to 80V Input, –5V Inverting Converter C5 1µF • VIN 4.5V TO 80V L2 33μH • L1 33μH C1 1µF ×2 R3 1M VIN SW1-2 D1 LT8331 C3 22µF ×2 EN/UVLO R1 1M SYNC/MODE RT R5 100k FBX BIAS GND R4 787k SS INTVCC C4 22nF 26 R2 191k C2 1µF 8331 TA11 300kHz D1: DIODES INC. DFLS1100 L1, L2: COILTRONICS DRQ74-330 C1: MURATA GRM32ER72A105KA01L VOUT = –5V 135mA AT VIN = 4.5V 170mA AT VIN = 12V 170mA AT VIN = 48V 170mA AT VIN = 80V C3: MURATA GRM32ER61A226KE20L C5: MURATA GRM31CR72A105KA01L 8331f For more information www.linear.com/LT8331 LT8331 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MSE Package Variation: MSE16 (12) 16-Lead Plastic MSOP with 4 Pins Removed Exposed Die Pad (Reference LTC DWG # 05-08-1871 Rev D) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 5.10 (.201) MIN 2.845 ±0.102 (.112 ±.004) 0.889 ±0.127 (.035 ±.005) 8 1 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 3.20 – 3.45 (.065 ±.004) (.126 – .136) 16 0.305 ±0.038 (.0120 ±.0015) TYP 0.50 (.0197) 1.0 BSC (.039) BSC RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 4.039 ±0.102 (.159 ±.004) (NOTE 3) 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE 0.280 ±0.076 (.011 ±.003) REF 16 14 121110 9 DETAIL “A” 0° – 6° TYP 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP 1 0.50 (.0197) BSC 3 567 8 1.0 (.039) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.86 (.034) REF 0.1016 ±0.0508 (.004 ±.002) MSOP (MSE16(12)) 0213 REV D 8331f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT8331 27 LT8331 TYPICAL APPLICATION 40V to 80V Input, 5V Isolated Output Converter D2 T1 VIN 40V TO 80V C5 100µF ×2 C1 1µF VIN 4:1 SW1-2 LT8331 D1 BIAS EN/UVLO C3 4.7µF R1 7.15k SYNC/MODE RT R2 3.24k INTVCC SS C4 27nF R5 100k C2 1µF Efficiency Load Regulation 100 95 85 80 VOUT (V) EFFICIENCY (%) 90 75 70 65 60 ISOLATED FLYBACK: VOUT = 5V 55 VIN = 40V VIN = 80V 20 40 60 80 LOAD CURRENT (mA) 1 D1, D2: PMEG6010CEJ T1: WURTH ELEKTRONIK 750311558 C3: MURATA GRM31CR61A475KA01L C5: MURATA GRM32ER61A107ME20L 8331 TA02 0 R6 10Ω FBX GND 50 VOUT = 5V 100mA 100 120 5.8 5.7 5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.9 4.8 4.7 4.6 4.5 4.4 4.3 4.2 ISOLATED FLYBACK: VOUT = 5V VIN = 40V VIN = 80V 0 8331 TA02b 20 40 60 80 LOAD CURRENT (mA) 100 120 8331 TA02c RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT8300 100VIN Micropower Isolated Flyback Converter with 150V/260mA Switch VIN = 6V to 100V, Low IQ Monolithic No-Opto Flyback, 5-Lead TSOT‑23 LT8330 60V, 1A, Low IQ Boost/SEPIC/Inverting Converter VIN = 3V to 40V, VOUT(MAX) = 60V, IQ = 6µA (Burst Mode Operation), 6-Lead TSOT-23, 3mm × 2mm DFN packages LT8494 70V, 2A Boost/SEPIC 1.5MHz High Efficiency Step-Up DC/DC Converter VIN = 1V to 60V (2.5V to 32V Start-Up), VOUT(MAX) = 70V, IQ = 3µA (Burst Mode Operation), ISD = <1µA, 20-Lead TSSOP LT8570/LT8570-1 65V, 500mA/250mA Boost/Inverting DC/DC Converter VIN(MIN) = 2.55V, VIN(MAX) = 40V, VOUT(MAX) = ±60V, IQ = 1.2mA, ISD = <1mA, 3mm × 3mm DFN-8, MSOP-8E LT8580 1A (ISW), 65V, 1.5MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.55V to 40V, VOUT(MAX) = 65V, IQ = 1.2mA, ISD = <1µA, 3mm × 3mm DFN-8, MSOP-8E 28 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT8331 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT8331 8331f LT 1015 • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015