HA-5033 Data Sheet September 1998 File Number 2924.4 250MHz Video Buffer Features The HA-5033 is a unity gain monolithic IC designed for any application requiring a fast, wideband buffer. Featuring a bandwidth of 250MHz and outstanding differential phase/ gain characteristics, this high performance voltage follower is an excellent choice for video circuit design. Other features, which include a minimum slew rate of 1000V/µs and high output drive capability, make the HA-5033 applicable for line driver and high speed data conversion circuits. • Differential Phase Error . . . . . . . . . . . . . . . 0.02 Degrees • Differential Gain Error. . . . . . . . . . . . . . . . . . . . . . . 0.03% • High Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . 1100V/µs • Wide Bandwidth (Small Signal) . . . . . . . . . . . . . . 250MHz • Wide Power Bandwidth . . . . . . . . . . . . . . DC to 17.5MHz • Fast Rise Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3ns • High Output Drive. . . . . . . . . . . . . . ±10V With 100Ω Load The high performance of this product is a result of the Intersil Dielectric Isolation process. A major feature of this process is that it produces both PNP and NPN high frequency transistors which makes wide bandwidth designs, such as the HA-5033, practical. Alternative process methods typically produce a lower AC performance. • Wide Power Supply Range. . . . . . . . . . . . . . ±5V to ±16V • Replace Costly Hybrids Applications • Video Buffer Ordering Information PART NUMBER (BRAND) • High Frequency Buffer TEMP. RANGE (oC) PKG. NO. PACKAGE HA2-5033-2 -55 to 125 12 Pin Metal Can T12.C • High Speed Line Driver HA2-5033-5 0 to 75 12 Pin Metal Can T12.C • Impedance Matching HA3-5033-5 0 to 75 8 Ld PDIP E8.3 • Current Boosters HA4P5033-5 0 to 75 20 Ld PLCC N20.35 • High Speed A/D Input Buffers HA9P5033-5 (H50335) 0 to 60 (Note 3) 8 Ld PSOP M8.15A • Related Literature - AN548, Designer’s Guide for HA-5033 • Isolation Buffer Pinouts NC OUT OUT 8 NC V+ 1 HA-5033 (METAL CAN) TOP VIEW V+ HA-5033 (PLCC) TOP VIEW NC HA-5033 (PDIP, PSOP) TOP VIEW 3 2 1 20 19 V+ NC CASE 3 6 4 5 NC SUBSTRATE V- NC 4 18 NC NC 5 17 NC NC 6 16 NC NC 7 15 SUBSTRATE 14 NC 1 9 10 11 12 13 V- NC NC 8 NC IN 7 IN NC 2 NC NC OUT 12 11 1 NC V- 10 2 9 3 4 NC NC 8 NC 7 5 6 +IN NC NC CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 HA-5033 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- Pins . . . . . . . . . . . . . . . . . . . . . . . . 40V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+ to VOutput Current (Peak) (50ms On/1 Second Off) . . . . . . . . . ±200mA ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . 2000V Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W) Metal Can Package . . . . . . . . . . . . . . . 65 34 PDIP Package . . . . . . . . . . . . . . . . . . . 96 N/A PSOP Package (Note 4) . . . . . . . . . . . 129 N/A PLCC Package. . . . . . . . . . . . . . . . . . . 80 N/A Maximum Junction Temperature (Note 1) . . . . . . . . . . . . . . . . .175oC Maximum Junction Temperature (Plastic Packages) . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (PSOP and PLCC - Lead Tips Only) Operating Conditions Temperature Ranges HA-5033-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC HA-5033-5 (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC HA9P5033-5 (Notes 1, 3) . . . . . . . . . . . . . . . . . . . . -40oC to 60oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Maximum power dissipation, including load conditions, must be designed to maintain the maximum junction temperature below 175oC for the metal can package, and below 150oC for the plastic packages (See Figure 5.). 2. θJA is measured with the component mounted on an evaluation PC board in free air. 3. Maximum operating temperature in the PSOP package is limited to 60oC, for VSUPPLY = ±12V to prevent the junction temperature from exceeding 150oC. The maximum operating temperature may have to be derated further, depending on the output load condition. The operating temperature may be increased if the HA9P5033 is operated at lower VSUPPLY. For example, the quiescent operating temperature may be increased to 75oC by operating at VSUPPLY ≤ ±9.7V. See Figure 5 for more information. 4. Direct attach of the PSOP copper slug to copper area on the PCB can reduce the θJA value to <100oC/W. Consult the Intersil Application Group for more information. VSUPPLY = ±12V, RS = 50Ω, RL = 100Ω, CL = 10pF, Unless Otherwise Specified Electrical Specifications TEST CONDITIONS PARAMETER HA-5033-2 HA-5033-5 TEMP. (oC) MIN TYP MAX MIN TYP MAX UNITS 25 - 5 15 - 5 15 mV Full - 6 25 - 6 25 mV Full - 33 - - 33 - µV/oC INPUT CHARACTERISTICS Offset Voltage Average Offset Voltage Drift 25 - 20 35 - 20 35 µA Full - 30 50 - 30 50 µA Input Resistance 25 - 3 - - 3 - MΩ Input Capacitance 25 - 1.6 - - 1.6 - pF 10Hz to 100MHz 25 - 20 - - 20 - µVP-P RL = 100Ω 25 0.93 - - 0.93 - - V/V RL = 1kΩ 25 0.93 0.99 - 0.93 0.99 - V/V RL = 100Ω Full 0.92 - - 0.92 - - V/V 25 - 250 - - 250 - MHz RL = 100Ω Full ±8 ±10 - ±8 ±10 - V RL = 1kΩ, VS = ±15V Full ±11 ±12 - ±11 ±12 - V 25 ±80 ±100 - ±80 ±100 - mA Bias Current Input Noise Voltage TRANSFER CHARACTERISTICS Voltage Gain -3dB Bandwidth OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Output Resistance VOUT = 1VRMS , RL = 1kΩ Full Power Bandwidth Full Power Bandwidth (Note 5) 25 - 8 - - 8 - Ω 25 - 146 - - 146 - MHz 25 15.9 17.5 - 15.9 17.5 - MHz TRANSIENT RESPONSE 25 - 4.6 - - 4.6 - ns Propagation Delay VOUT = 500mV 25 - 1 - - 1 - ns Overshoot 25 - 3 - - 3 - % Slew Rate (Note 5) 25 1 1.1 - 1 1.1 - V/ns Rise Time 2 HA-5033 VSUPPLY = ±12V, RS = 50Ω, RL = 100Ω, CL = 10pF, Unless Otherwise Specified (Continued) Electrical Specifications TEST CONDITIONS HA-5033-2 TEMP. (oC) MIN Settling Time to 0.1% 25 Differential Phase Error (Note 6) 25 Differential Gain Error (Note 6) PARAMETER HA-5033-5 TYP MAX MIN TYP MAX - 50 - - 0.02 - 25 - 0.03 UNITS - 50 - ns - 0.02 - Degree - - 0.03 - % POWER SUPPLY CHARACTERISTICS Supply Current Power Supply Rejection Ratio VIN = 1VRMS at 100kHz Harmonic Distortion 25 - 21 25 - 21 25 mA Full - 21 30 - 21 30 mA Full 54 - - 54 - - dB 25 - <0.1 - - <0.1 - % NOTES: 5. VSUPPLY = ±15V, VOUT = ±10V, RL = 1kΩ. 6. Differential gain and phase error are nonlinear signal distortions found in video systems and are defined as follows: Differential gain error is defined as the change in amplitude at the color subcarrier frequency as the picture signal is varied from blanking to white level. Differential phase error is defined as the change in the phase of the color subcarrier as the picture signal is varied from blanking to white level. RL = 300Ω. Test Circuits and Waveforms +15V +12V 0.1µF IN OUT 0.1µF IN OUT 100Ω RL 0.1µF 0.1µF -15V -12V FIGURE 1. SLEW RATE AND SETTLING TIME FIGURE 2. TRANSIENT RESPONSE 10V 500mV INPUT INPUT 0V OUTPUT 0V OVERSHOOT 90% ∆V 10% SLEW ∆t RATE = ∆V/∆t SETTLING TIME ERROR BAND ±10mV FROM FINAL VALUE 90% OUTPUT 10% FIGURE 3. SETTLING TIME AND SLEW RATE NOTE: Measured on both positive and negative transitions. FIGURE 4. RISE TIME AND OVERSHOOT VIN VIN 0V 0V VOUT VOUT 0V 0V TA = 25oC, RS = 50Ω, RL = 100Ω +10V RESPONSE 3 TA = 25oC, RS = 50Ω, RL = 1kΩ +10V RESPONSE HA-5033 Test Circuits and Waveforms (Continued) 500mV VIN 0V 500mV VOUT 0V TA = 25oC, RS = 50Ω, RL = 100Ω PULSE RESPONSE Schematic Diagram V+ R5 R4 R2 Q15 Q11 Q16 Q12 R12 Q6 Q10 Q1 R9 Q7 Q19 VIN R6 Q3 VOUT Q4 Q8 R8 Q17 R11 Q13 R10 Q2 Q5 Q9 Q14 Q18 R1 R13 R3 V- Application Information Layout Considerations The wide bandwidth of the HA-5033 necessitates that high frequency circuit layout procedures be followed. Failure to follow these guidelines can result in marginal performance. Probably the most crucial of the RF/video layout rules is the use of a ground plane. A ground plane provides isolation and minimizes distributed circuit capacitance and inductance which will degrade high frequency performance. This ground plane shielding can also incorporate the metal case of the HA-5033 since pin #2 is internally tied to the package. This feature allows the user to make metal to metal contact between the ground plane and the package, which extends shielding, provides additional heat sinking and eliminates the use of a socket, IC sockets contribute inter-lead capacitance which limits device bandwidth and should be avoided. 4 For the PDIP, pin 6 can be tied to either supply, grounded, or simply not used. But to optimize device performance and improve isolation, it is recommended that this pin be grounded. Other considerations are proper power supply bypassing and keeping the input and output connections as short as possible which minimizes distributed capacitance and reduces board space. Power Supply Decoupling For optimum device performance, it is recommended that the positive and negative power supplies be bypassed with capacitors to ground. Ceramic capacitors ranging in value from 0.01µF to 0.1µF will minimize high frequency variations in supply voltage. Solid tantalum capacitors 1µF or larger will optimize low frequency performance. It is also recommended that the bypass capacitors be connected close to the HA-5033 (preferably directly to the supply pins). Figure 5 is based on: T JMAX – T A P DMAX = ------------------------------θ JA Where: TJMAX = Maximum Junction Temperature of the Device TA = Ambient Temperature θJA = Junction to Ambient Thermal Resistance MAXIMUM TOTAL POWER DISSIPATION (W) HA-5033 2.4 2.2 2.0 CAN 1.8 1.6 1.4 PLCC 1.2 PDIP 1.0 0.8 0.6 QUIESCENT PD = 0.72W AT VS = ±12V, ICC = 30mA 0.4 0.2 PSOP 0 25 65 85 TEMPERATURE (oC) 45 105 125 FIGURE 5. MAXIMUM POWER DISSIPATION vs TEMPERATURE Typical Applications (Also see Application Note AN548) V+ V+ HA-2539 VIDEO SIGNAL INPUT +12V 0.1µF R1 HA-5033 + 60Ω - VIDEO OUTPUT 75Ω 75Ω R2 RS 5 12 10 VIN RM 11 15Ω RG -58 50Ω V- V- 900Ω 50Ω RL 0.1µF 100Ω -12V FIGURE 6. VIDEO COAXIAL LINE DRIVER 50Ω SYSTEM FIGURE 7. VIDEO GAIN BLOCK 0V VIN VIN 0V 0V VOUT VOUT 0V TA = 25oC, RS = 50Ω, RM = RL = 50Ω TA = 25oC, RS = 50Ω, RM = RL = 50Ω RL 1 V O = V IN ---------------------- = --- V IN RL + RM 2 RL 1 V O = V IN ---------------------- = --- V IN RL + RM 2 POSITIVE PULSE RESPONSE NEGATIVE PULSE RESPONSE 5 HA-5033 Typical Performance Curves 40 VS = ±15V VS = ±12V 7 INPUT BIAS CURRENT (µA) OFFSET VOLTAGE (mV) 8 6 5 4 3 VS = ±10V 2 VS = ±10V 30 VS = ±5V 20 VS = ±12V VS = ±15V 10 VS = ±5V 1 -80 -40 40 80 TEMPERATURE (oC) 0 0 -55 160 120 FIGURE 8. INPUT OFFSET VOLTAGE vs TEMPERATURE 75 25 TEMPERATURE (oC) -25 125 FIGURE 9. INPUT BIAS CURRENT vs TEMPERATURE 3000 30 VS = ±15V, VIN = ±10V SLEW RATE (V/µs) SUPPLY CURRENT (mA) VS = ±15V 20 VS = ±12V VS = ±10V VS = ±5V 10 FALL (RL = 1kΩ) 2000 FALL (RL = 100Ω) 1000 RISE (RL = 1kΩ) RISE (RL = 100Ω) 0 -55 25 -25 -55 125 75 -25 25 TEMPERATURE (oC) FIGURE 10. SUPPLY CURRENT vs TEMPERATURE 2200 VS = ±15V, RL = 1kΩ TA = 25oC, VIN = ±10V 2000 SLEW RATE (V/µs) SLEW RATE (V/µs) 1800 1600 FALL 1200 1000 RISE 800 600 400 200 0 100 1000 5000 CAPACITANCE (pF) FIGURE 12. SLEW RATE vs LOAD CAPACITANCE 6 125 FIGURE 11. SLEW RATE vs TEMPERATURE 2400 1400 75 TEMPERATURE (oC) 10,000 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 VS = ±15V, RL = 100Ω TA = 25oC, VIN = ±10V FALL RISE 0 100 1000 5000 CAPACITANCE (pF) FIGURE 13. SLEW RATE vs LOAD CAPACITANCE 10,000 HA-5033 Typical Performance Curves 80 (Continued) 900 VS = ±15V, TA = 25oC RL = 1kΩ OUTPUT INPUT VOS (mV) OUTPUT INPUT VOS (mV) 60 40 20 RL = 10kΩ RL = 10kΩ 0 -20 -40 -60 -8 -6 -4 0 -2 +2 +4 +6 RL = 50Ω 500 300 RL = 100Ω 100 0 -100 RL = 100Ω -300 -500 -700 RL = 1kΩ -80 -10 VS = ±15V, TA = 25oC 700 +8 RL = 50Ω -900 -10 +10 -8 -6 -4 INPUT VOLTAGE (V) FIGURE 14. GAIN ERROR vs INPUT VOLTAGE -2 0 +2 +4 INPUT VOLTAGE (V) +6 +8 +10 FIGURE 15. GAIN ERROR vs INPUT VOLTAGE 160 VS = ±15, TA = 25oC VS = ±15V, VO = ±10V 800 700 120 VIN - VOUT (mV) OUTPUT INPUT VOS (mV) 140 100 RL = 1kΩ 80 60 40 VOUT = -10 VOUT = 0 SINKING CURRENT 600 VOUT = +10 500 VOUT = 0 SOURCING CURRENT 400 300 200 20 100 0 -55 25 -25 75 125 10 20 30 TEMPERATURE (oC) FIGURE 16. GAIN ERROR vs TEMPERATURE 80 90 100 110 120 1 Y21 Y21, Y22 135 10-1 90 Y11 MAGNITUDE (S) PHASE ANGLE (DEGREES) 50 60 70 IOUT (mA) FIGURE 17. VIN - VOUT vs IOUT 180 45 0 Y22 -45 Y12 -90 Y11 Y12 Y22 Y21 10-2 10-3 10-4 -135 -180 106 40 Y11 Y12 107 108 FREQUENCY (Hz) FIGURE 18. Y - PARAMETERS PHASE vs FREQUENCY 7 109 10-5 106 107 108 FREQUENCY (Hz) 109 FIGURE 19. Y - PARAMETER MAGNITUDE vs FREQUENCY HA-5033 70 (Continued) 0.10 VS = ±12V, TA = 25oC TOTAL HARMONIC DISTORTION (%) POWER SUPPLY REJECTION RATIO (dB) Typical Performance Curves 60 50 40 30 20 10 1K 10K 100K FREQUENCY (Hz) 1M VS = ±12V = ±12V, RL = 100Ω 100Ω RL = ±V f = 100kHz 0.1 0.01 0 1 2 INPUT VOLTAGE (RMS) 0.02 0.01 TA = 25oC 28 NO HEAT SINK IN FREE AIR 2.5 2.0 1.5 20 16 VS = ±10V 12 8 4 VS = ±15V, RL = 1kΩ 1G NO HEAT SINK IN FREE AIR 4.0 3.5 3.0 2.5 2.0 1.5 1.0 FIGURE 24. OUTPUT SWING vs FREQUENCY (NOTE) 100 200 300 400 500 600 700 800 900 1K LOAD RESISTANCE (Ω) 4.5 0.5 100M VS = ±5V 5.0 0.5 1M 10M FREQUENCY (Hz) VS = ±12V 24 1.0 100K 100K VS = ±15V 5.5 4.0 0 10K 1K 10K FREQUENCY (Hz) FIGURE 23. OUTPUT VOLTAGE SWING vs LOAD RESISTANCE OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) 0.03 6.0 4.5 3.0 0.04 0 5.0 3.5 0.05 FIGURE 21. TOTAL HARMONIC DISTORTION vs FREQUENCY VS = ±15V, RL = 100Ω 5.5 0.06 3 FIGURE 22. TOTAL HARMONIC DISTORTION vs INPUT VOLTAGE 6.0 0.07 100 PEAK TO PEAK OUTPUT VOLTAGE (V) TOTAL HARMONIC DISTORTION (%) 1.0 0.08 10M FIGURE 20. POWER SUPPLY REJECTION RATIO vs FREQUENCY VS = ±12V, RL = 100Ω VIN = 1VRMS 0.09 0 10K 100K 1M 10M FREQUENCY (Hz) 100M 1G FIGURE 25. OUTPUT SWING vs FREQUENCY (NOTE) NOTE: This curve was obtained by noting the output voltage necessary to produce an observable distortion for a given frequency. If higher distortion is acceptable, then a higher output voltage for a given frequency can be obtained. However, operating the HA-5033 with increased distortion (to the right of curve shown), will also be accompanied by an increase in supply current. The resulting increase in chip temperature must be considered and heat sinking will be necessary to prevent thermal runaway. This characteristic is the result of the output transistor operation. If the signal amplitude or signal frequency or both are increased beyond the curve shown, the NPN, PNP output transistors will approach a condition of being simultaneously on. Under this condition, thermal runaway can occur. 8 HA-5033 Die Characteristics DIE DIMENSIONS: SUBSTRATE POTENTIAL (Powered Up): 51 mils x 67 mils x 19 mils 1300µm x 1700µm x 483µm Unbiased TRANSISTOR COUNT: METALLIZATION: 20 Type: Al, 1% Cu Thickness: 16kÅ ±2kÅ PROCESS: Bipolar Dielectric Isolation PASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2 , 5% Phos.) Silox Thickness: 12kÅ ±2kÅ Nitride Thickness: 3.5kÅ ±1.5kÅ Metallization Mask Layout HA-5033 IN V+ OUT V- All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 9