INTERSIL CD22102E

CD22101, CD22102
Semiconductor
T
CMOS 4
E PRODUC
OBSOLET
CEMENT
A
L
P
E
R
D
E
D
MEN
0-442-7747
NO RECOM
ations 1-80 .com
c
li
p
p
A
l
a
arris
Call Centr
[email protected]
or email: c
Description
February 1999
Features
• Low ON Resistance . . . . . . . . . . . . 75Ω (Typ) at VDD = 12V
• “Built - In” Latched Inputs
• Large Analog Signal Capability . . . . . . . . . . . . . . . ±VDD/2
• Switch Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . 10MHz
• Matched Switch Characteristics
∆RON = 8Ω (Typ) at VDD = 12V
• High Linearity - 0.25% Distortion (Typ) at f = 1kHz,
VIN = 5VP-P, VDD - VSS = 10V, and RL = 1kΩ
• Standard CMOS Noise Immunity
Applications
• Telephone Systems
• PBX
• Studio Audio Switching
• Multisystem Bus Interconnect
Ordering Information
PART
NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG. NO.
CD22101E
-40 to 85
24 Ld PDIP
E24.6
CD22101F
-55 to 125
24 Ld CERDIP
F24.6
CD22102E
-40 to 85
24 Ld PDIP
E24.6
CD22101 and CD22102 crosspoint switches consist of
4 x 4 x 2 arrays of crosspoints (transmission gates) with a
4-line to 16-line decoder and 16 latch circuits. Any one of
the sixteen crosspoint pairs can be selected by applying
the appropriate four-line address, corresponding
crosspoints in each array are turned on and off
simultaneously. Any number of crosspoints can be turned
on simultaneously.
In the CD22101, the selected crosspoint pair can be
turned on or off by applying a logic ONE or ZERO,
respectively, to the data input, and applying a ONE to the
strobe input. When the device is “powered up”, the states
of the 16 switches are indeterminate. Therefore, all
switches must be turned off by putting the strobe high,
data-in low, and then addressing all switches in
succession.
The selected pair of crosspoints in the CD22102 is turned
on by applying a logic ONE to the KA (set) input while a
logic ZERO is on the KB input, and turned off by applying
a logic ONE to the KB (reset) input while a logic ZERO is
on the KA input. In this respect, the control latches of the
CD22102 are similar to SET/RESET flip-flops. They differ,
however, in that the simultaneous application of ONEs to
the KA and KB inputs turns off (resets) all crosspoints. All
crosspoints in both devices must be turned off as VDD is
applied.
Functional Diagram
Pinouts
CD22101
(PDIP, SBDIP)
TOP VIEW
CONTROL
CD22102
(PDIP)
TOP VIEW
IN (OUT)
16
B 1
24 VDD
C 2
23 A
B 1
C
2
24 VDD
23 A
X2' 3
22 X2
X2' 3
22 X2
Y1' 4
21 Y1
Y1' 4
21 Y1
Y2' 5
20 Y2
Y2' 5
20 Y2
X4' 6
19 X4
X4' 6
19 X4
X3' 7
18 X3
X3' 7
18 X3
Y4' 8
17 Y4
Y4' 8
17 Y4
Y3' 9
16 Y3
Y3' 9
16 Y3
X1' 10
15 X1
X1' 10
15 X1
D 11
14 KA
VSS 12
13 KB
D 11
VSS 12
14 DATA
13 STROBE
ADDRESS
[ /Title
(CD22
101,
CD221
02)
/Subject
(CMO
S4x4
x2
Crosspoint
Switch
with
Control
Memory)
/
Author
()
/Keywords
(Harris
Semiconductor,
Telecom,
SLICs,
SLACs
, Telephone,
Telephony,
WLL,
Wireless
x 4 x 2 Crosspoint Switch
with Control Memory
© Harris Corporation 1999
4-193
OUT (IN)
4X4
SWITCH
OUT (IN)
DECODER
LATCH
16
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
4X4
SWITCH
16
IN (OUT)
File Number
2871.3
CD22101, CD22102
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VDD) (Referenced to VSS Terminal) . . . .-0.5 to 20V
Input Voltage (All Inputs) . . . . . . . . . . . . . . . . . . . -0.5 to VDD +0.5V
Supply Voltage Range
For TA = Full Package Temperature Range . . . . . . . . . . . . . . 3V to 18V
Input Current (Any One Input) (Note 1) . . . . . . . . . . . . . . . . . . .±10mA
Power Dissipation
For TA = -40oC to 60oC (Package Type E) . . . . . . . . . . . . 500mW
For TA = 60oC to 85oC
Package Type E) . . . . . . . . Derate Linearly 12mW/oC to 200mW
For TA = -55oC to 100oC (Package Type D, F) . . . . . . . . . 500mW
For TA = 100oC to 125oC
(Package Type D, F) . . . . . Derate Linearly 12mW/oC to 200mW
Device Dissipation per Output Transistor
For TA = Full Package Temperature Range (All Types) . . . . . 100mW
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . -65oC ≤ TA ≤ 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range
Package Type D, F. . . . . . . . . . . . . . . . . . . . . -55oC ≤ TA ≤ 125oC
Package Type E . . . . . . . . . . . . . . . . . . . . . . . . -40oC ≤ TA ≤ 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
Values at -55oC, 25oC, 125oC Apply to D, F, H Packages
Values at -40oC, 25oC, 85oC Apply to E Package
TEST CONDITIONS
PARAMETER
FIGURE VDD(V)
SYMBOL
-55oC
-40oC
85oC
125oC
25oC
MAX
MAX
MAX
MAX
MIN
TYP
MAX
UNITS
STATIC CROSSPOINTS
Quiescent Device
Current
On Resistance
∆ON Resistance
OFF Leakage Current
1
5
5
5
150
150
-
0.04
5
µA
1
10
10
10
300
300
-
0.04
10
µA
1
15
20
20
600
600
-
0.04
20
µA
1
20
100
100
3000
3000
-
0.08
100
µA
14
5
475
500
725
800
-
225
600
Ω
15
10
135
145
205
230
-
85
180
Ω
-
12
100
110
155
175
-
75
135
Ω
16
15
70
75
110
125
-
65
95
Ω
IDD (Max)
RON (Max) Any Switch
VIS = 0 to
VDD
∆RON
Between Any Two
Switches
IL (Max) All Switches
OFF, VIS = 18V
4
5
-
-
-
-
-
25
-
Ω
10
-
-
-
-
-
10
-
Ω
12
-
-
-
-
-
8
-
Ω
15
-
-
-
-
-
5
-
Ω
18
±1000
-
±1
±100
(Note 2)
nA
5
1.5
-
-
1.5
V
10
3
-
-
3
V
STATIC CONTROLS
Input Low Voltage
Input High Voltage
VIL (Max) OFF Switch IL < 0.2µA
VIH (Min) ON Switch See RON
Characteristic
15
4
-
-
4
V
5
3.5
3.5
-
-
V
10
7
7
-
-
V
15
Input Current
IIN (Max)
Any Control
VIN = 0, 18V
2
11
±0.1
18
±0.1
NOTES:
1. Maximum current through transmission gates (switches) = 25mA.
2. Determined by minimum feasible leakage measurement for automatic testing.
4-194
±1
±1
11
-
-
V
-
±10-5
±0.1
µA
CD22101, CD22102
Electrical Specifications
TA = 25oC
TEST CONDITIONS
PARAMETER
SYMBOL
FIGURE
fIS
(kHz)
RL
(kΩ)
VIS (V)
(Note 3)
VDD
(V)
MIN
TYP
MAX
UNITS
tPHL, tPLH
5
-
-
5
5
-
30
60
ns
-
10
10
10
-
15
30
ns
15
15
-
10
20
ns
10
-
40
-
MHz
DYNAMIC CROSSPOINTS
Propagation Delay Time,
(Switch ON) Signal Input to Output
CL = 50pF; tR , tF = 20ns
Frequency Response (Any Switch
ON)
f3dB
Sine Wave Response (Distortion)
THD
Feedthrough (All Switches OFF)
19
1
1
5
V OS
Sine Wave Input, 20log ----------- = -3dB
V IS
FDT
-
13
1
1
2.5
5
-
1
-
%
1
1
5
10
-
0.25
-
%
1
1
7.5
15
-
0.15
-
%
1.6
0.6
2 (Note 4)
10
-
-96
-
dB
-
2.5
-
MHz
Sine Wave Input
Frequency for Signal Crosstalk
FCT
12
-
0.6
1 (Note 4)
10
Attenuation of 40dB
Attenuation of 95dB
Sine Wave Input
0.1
kHz
Capacitance:
XN to Ground
CIS
YN to Ground
Feedthrough
CIOS
-
-
-
-
25
-
pF
-
-
-
-
60
-
pF
-
-
-
-
0.6
-
pF
5
-
500
1000
ns
10
-
230
460
ns
15
-
170
340
ns
5
-
515
1000
ns
10
-
220
440
ns
15
-
170
340
ns
5
-
500
1000
ns
10
-
215
430
ns
15
-
160
320
ns
5
-
480
960
ns
10
-
225
450
ns
15
-
155
300
ns
DYNAMIC CONTROLS
Propagation Delay Time: High
Impedance to High Level or Low
Level
tPZH, tPZL
6
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
Strobe to Output, CD22101
Data-In to Output, CD22101
KA to Output, CD22102
Address to Output
CD22101, CD22102
tPZH, tPZL
tPZH, tPZL
tPZH, tPZL
7
-
8
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
4-195
CD22101, CD22102
Electrical Specifications
TA = 25oC (Continued)
TEST CONDITIONS
PARAMETER
SYMBOL
FIGURE
Propagation Delay Time: High Level
or Low Level to High Impedance
tPHZ, tPLZ
6
fIS
(kHz)
RL
(kΩ)
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
Strobe to Output, CD22101
KB to Output, CD22102
Data-In to Output, CD22101
KA • KB to Output, CD22102
Address to Output
CD22101, CD22102
Minimum Strobe Pulse Width,
CD22101
Address to Strobe Setup or Hold
Times, CD22101
Strobe to Data-In Hold Time,
CD22101
Address to KA and KB Setup or Hold
Times, CD22102
Minimum KA • KB Pulse Width,
CD22102
Minimum KA Pulse Width, CD22102
tPHZ, tPLZ
tPHZ, tPLZ
tPHZ, tPLZ
tPHZ, tPLZ
tW
tSU, tH
tHHL, tHLH
tSU, tH
tW
tW
-
-
-
8
6
9
10
-
-
-
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
4-196
VIS (V)
(Note 3)
VDD
(V)
MIN
TYP
MAX
UNITS
5
-
450
900
ns
10
-
200
400
ns
15
-
135
270
ns
5
-
450
900
ns
10
-
200
400
ns
15
-
130
260
ns
5
-
450
900
ns
10
-
165
330
ns
15
-
110
220
ns
5
-
280
560
ns
10
-
130
260
ns
15
-
90
180
ns
5
-
425
850
ns
10
-
190
380
ns
15
-
130
260
ns
5
-
260
500
ns
10
-
120
240
ns
15
-
80
160
ns
5
-
-160
0
ns
10
-
-70
0
ns
15
-
-50
0
ns
5
-
200
400
ns
10
-
80
160
ns
15
-
60
120
ns
5
-
-160
0
ns
10
-
-70
0
ns
15
-
-50
0
ns
5
-
375
750
ns
10
-
160
320
ns
15
-
110
220
ns
5
-
425
850
ns
10
-
175
350
ns
15
-
120
240
ns
CD22101, CD22102
TA = 25oC (Continued)
Electrical Specifications
TEST CONDITIONS
PARAMETER
SYMBOL
FIGURE
Minimum KB Pulse Width, CD22102
tW
-
Control Crosstalk, Data-In, Address
or Strobe to Output
fIS
(kHz)
RL
(kΩ)
VIS (V)
(Note 3)
RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
11
100
VDD
(V)
MIN
TYP
MAX
UNITS
5
-
200
400
ns
10
-
90
180
ns
15
-
70
140
ns
5
-
75
-
mVPEAK
-
-
5
7.5
pF
10
Square Wave Input = 5V,
tR, tF = 20ns, RS = 1kΩ
Input Capacitance
CIN
Any Control Input
NOTES:
V DD
3. Peak-to-peak voltage symmetrical about ----------, unless otherwise specified.
2
4. RMS.
Functional Block Diagram
CD22102
ONLY
KB
21
KA
0
1
2
3
CD22101
ONLY
STROBE
(NOTE) 13
Y2
20
DATA
(NOTE)
Y1
4
5
6
SIGNALS
OUT (IN)
7
Y3
14
16
16
23
A
(NOTE)
8
9
10
11
Y4
17
LATCHES
DECODER
12
13
14
15
1
B
(NOTE)
15
16
ADDRESS
16
22
X1
2
18
X2
19
X3
X4
SIGNALS IN (OUT)
C
(NOTE)
4
11
D
(NOTE)
16
0’
1’
2’
Y1’
3’
Y2’
5
4’
VDD
5’
6’
SIGNALS
OUT (IN)
7’
Y3’
9
8’
NOTE: INPUTS PROTECTED
BY COS/MOS
PROTECTION
NETWORK
9’
10’
11’
Y4’
8
12’
13’
10
14’
3
15’
7
X1’
X2’
X3’
SIGNALS IN (OUT)
VSS
4-197
6
X4’
CD22101, CD22102
Schematic Diagram
(NOTE) STROBE
13
(NOTE) DATA IN
14
21
Y1
TO X1’ Y1’
24
VDD
A
D Q
B
ø
C
23
A
(NOTE)
TO 15 OTHER
NANDS
B
1
B
(NOTE)
Y2
TG
TG
KA (SET)
(NOTE)
14
KB (RESET)
(NOTE)
13
A
B
C
D
16
TG
TG
TG
ø
ø
17
Y4
R
TG
TG
9
( Y3’ )
TG
8
9
10
11
D Q
5
( Y2’ )
TG
Y3
TG
8
( Y4’ )
TG
12
13
14
15
C
TO 15 OTHER
NANDS
D
11
TG
4
5
6
7
TO 15 OTHER
LATCHS
C
C
(NOTE)
TG
CD22101
B
2
TG
20
LATCH
A
TG
0
1
2
3
ø
D
A
TG
4
( Y1’ )
(
D
15
X1
10
X1’
)
22
(
X2
3
X2’
)
18
(
X3
7
X3’
)
(
19
X4
6
X4’
)
D
(NOTE)
TO 15 OTHER
LATCHES
12
DETAIL OF TRANSMISSION GATES
CD22102
VSS
VDD
IN
VDD
DETAIL OF LATCHES
VDD
ø
NOTE: INPUTS PROTECTED
BY COS/MOS
PROTECTION
NETWORK
D
p
n
Q
ø
OUT
ø
p
n
VSS
Q
ø
VSS
DECODER TRUTH TABLE
ADDRESS
ADDRESS
A
B
C
D
SELECT
A
B
C
D
SELECT
0
0
0
0
X1Y1 and X1’Y1’
0
0
0
1
X1Y3 and X1’Y3’
1
0
0
0
X2Y1 and X2’Y1’
1
0
0
1
X2Y3 and X2’Y3’
0
1
0
0
X3Y1 and X3’Y1’
0
1
0
1
X3Y3 and X3’Y3’
1
1
0
0
X4Y1 and X4’Y1’
1
1
0
1
X4Y3 and X4’Y3’
0
0
1
0
X1Y2 and X1’Y2’
0
0
1
1
X1Y4 and X1’Y4’
1
0
1
0
X2Y2 and X2’Y2’
1
0
1
1
X2Y4 and X2’Y4’
0
1
1
0
X3Y2 and X3’Y2’
0
1
1
1
X3Y4 and X3’Y4’
1
1
1
0
X4Y2 and X4’Y2’
1
1
1
1
X4Y4 and X4’Y4’
4-198
CD22101, CD22102
CONTROL TRUTH TABLE FOR CD22101
ADDRESS
FUNCTION
A
B
C
D
STROBE
DATA
SELECT
Switch ON
1
1
1
1
1
1
15 (X4Y4) and 15’ (X4’Y4’)
Switch OFF
1
1
1
1
1
0
15 (X4Y4) and 15’ (X4’Y4’)
No Change
X
X
X
X
0
X
X X X X
1 = High Level
0 = Low Level
X = Don’t Care
CONTROL TRUTH TABLE FOR CD22102
ADDRESS
FUNCTION
A
B
C
D
KA
KB
SELECT
Switch ON
1
1
1
1
1
0
15 (X4Y4) and 15’ (X4’Y4’)
Switch OFF
1
1
1
1
0
1
15 (X4Y4) and 15’ (X4’Y4’)
All Switches
OFF (Note 5)
X
X
X
X
1
1
All
No Change
X
X
X
X
0
0
X X X X
1 = High Level
0 = Low Level
X = Don’t Care
NOTE:
5.
In the event that KA and KB are changed from levels 1, 1 to 0, 0 KB should not be allowed to go to 0 before KA,
otherwise a switch which was off will inadvertently be turned on.
Metallization Mask Layout
Dimensions in parenthesis are in millimeters and are derived
from the basic inch dimensions as indicated. Grid graduations
are in mils (10-3 inch).
4-199
CD22101, CD22102
Test Circuits and Waveforms
VDD
VDD
VDD
VDD
IDD
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VSS
II
VSS
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VSS
VSS
MEASURE INPUTS SEQUENTIALLY TO BOTH VDD AND VSS
CONNECT ALL UNUSED INPUTS TO EITHER VDD OR VSS
FIGURE 1. QUIESCENT CURRENT TEST CIRCUIT
FIGURE 2. INPUT CURRENT TEST CIRCUIT
VDD
0.1µF
ID
500µF
Q2
CLK
CLK
Q3
Q4
Q2
1
24
Q3
2
23
3
22
4
21
5
20
S
CL
CL
CL
CL
Q4
2kΩ
2kΩ
6
19
7
18
8
17
9
16
10
15
11
14
12
13
Q1
CL
105
CL
POWER DISSIPATION PER PACKAGE (µW)
Q1
CD4029
CL
CL
2kΩ
VSS
2kΩ
TA = 25oC
VDD = 15V
104
10V
10V
103
5V
102
CL = 50pF
CL = 15pF
10
102
103
104
105
106
107
SWITCHING FREQUENCY (Hz)
CLOSE SWITCH S AFTER APPLYING VDD
FIGURE 3. DYNAMIC POWER DISSIPATION TEST CIRCUIT FOR CD22101AND TYPICAL DYNAMIC POWER DISSIPATION AS A
FUNCTION OF SWITCHING FREQUENCY
4-200
CD22101, CD22102
Test Circuits and Waveforms
(Continued)
VDD
ON
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VIS
IL
VOS
SW
50pF
10kΩ
SW = ANY CROSSPOINT
STROBE = DATA - IN = VDD
VDD
VIS
50%
50%
0
tPLH
tPHL
VDD
VOS
50%
50%
0
VSS
FIGURE 4. OFF SWITCH INPUT OR OUTPUT LEAKAGE
CURRENT TEST CIRCUIT (16 OF 32 SWITCHES)
FIGURE 5. PROPAGATION DELAY TIME TEST CIRCUIT AND
WAVEFORMS (SIGNAL INPUT TO SIGNAL
OUTPUT, SWITCH ON)
tW
DATA-IN
STROBE
STROBE
50%
VDD
SW
1kΩ
SW = ANY CROSSPOINT
50%
50%
VOS
DATA-IN
50%
0
tS
VDD
VIS
tW
VDD
tS
tH
tH
0
tPZH
50pF
VDD
90%
VOS
10%
0
tPHZ
FIGURE 6. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS
(STROBE TO SIGNAL OUTPUT, SWITCH TURN-ON OR TURN-OFF)
4-201
CD22101, CD22102
Test Circuits and Waveforms
(Continued)
DATA-IN
VDD
VDD
VDD
VDD
50%
DATA-IN
tPZH
VOS
SW
VDD
1kΩ
50pF
0
1kΩ
0
VIS
VOS
VIS
tPZL
VOS
SW
VDD
VOS
50pF
10%
0
50%
DATA-IN
90%
0
SW = ANY CROSSPOINT
STROBE = VDD
FIGURE 7. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS
(DATA-IN TO SIGNAL OUTPUT, SWITCH TURN-ON TO HIGH OR LOW LEVEL)
VDD
ADDRESS = 0
ADDRESS
ADDRESS = 1
50%
50%
50%
0
tS
VDD
tH
VDD
VDD
DATA-IN
VIS
SW
VOS1
VIS
SW
0
VOS2
tPHZ
VDD
VOS1
1kΩ
50pF
1kΩ
0
50pF
VDD
VOS2
SW = ANY CROSSPOINT
STROBE = VDD
0
FIGURE 8. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS
(ADDRESS TO SIGNAL OUTPUT, SWITCH TURN-ON OR TURN-OFF)
4-202
tPZH
90%
10%
CD22101, CD22102
Test Circuits and Waveforms
(Continued)
50%
STROBE
50%
DATA-IN
DATA
tSU
50%
tHLH
tHHL
tHLH
tH
50%
STROBE
ADDRESS
1µs
1µs
OUTPUT OF SWITCH
ADDRESSED
1µs
Y2
IF SETUP AND HOLD TIMES PROVIDED ARE TOO SHORT,
AN UNADDRESSED SWITCH MAY BE TURNED ON OR OFF
SIMULTANEOUSLY WITH THE ADDRESSED SWITCH
SET ALL SWITCHES TO OFF INITIALLY APPLY VDD
TO ALL X INPUTS AND RETURN ALL Y OUTPUTS TO
VSS THROUGH 1kΩ. ADDRESS X1Y2 (ABCD) WITH fIN = 10kHz
FIGURE 9. ADDRESS TO STROBE SETUP AND HOLD TIMES
FIGURE 10. STROBE TO DATA-IN HOLD TIME tH, FOR CD22101
CONTROLS
5µs
VDD
SW
X (N)
1kΩ
CONTROL
Y (N)
0
10kΩ
75mV
0
VOS
SW = ANY CROSSPOINT
FIGURE 11. TEST CIRCUIT AND WAVEFORMS FOR CROSSTALK (CONTROL INPUT TO SIGNAL OUTPUT)
-140
TA = 25oC
RS = 600Ω
RL = 600Ω
VIS = 1VRMS
=
dB
-120
600Ω
SW
OFF
600Ω
SW
600Ω
VOS
CROSSTALK
VIS
V OS
20 log ---------V IS
ON
600Ω
SW = ANY CROSSPOINT
-100
-80
VDD = 5V
-60
10V
-40
15V
-20
0
102
103
104
105
106
107
INPUT SIGNAL FREQUENCY (Hz)
FIGURE 12. TEST CIRCUIT AND TYPICAL CROSSTALK AS A FUNCTION OF FREQUENCY BETWEEN SWITCH CIRCUITS IN THE
SAME PACKAGE
4-203
CD22101, CD22102
Test Circuits and Waveforms
(Continued)
TA = 25oC
RS = 600Ω
RL = 600Ω
VOS
600Ω
=
600Ω
ANY
OFF
SWITCH
-120
-100
FEEDTHROUGH
VIS
V OS
20 log ---------V IS
dB
-140
V OS
ISOLATION (dB) = 20 LOG --------V IS
7.5V, -7.5V, 3VRMS
5V, -5V, 2VRMS
-80
VDD = 2.5V, VSS = -2.5V
-60
VIS = 1VRMS
-40
-20
102
103
105
104
106
107
INPUT SIGNAL FREQUENCY (Hz)
FIGURE 13. TEST CIRCUIT AND TYPICAL FEEDTHROUGH AS A FUNCTION OF FREQUENCY (ANY OFF SWITCH)
Typical Performance Curves
VDD = 2.5V, VSS = -2.5V
VDD = 5V, VSS = -5V
175
SWITCH “ON” RESISTANCE (Ω)
SWITCH “ON” RESISTANCE (Ω)
350
300
250
200
150
100
TA = 125oC
25oC
50
150
125
100
TA = 125oC
75
25oC
50
-55oC
25
-55oC
0
0
-2
-1
0
1
-4
2
INPUT SIGNAL (V)
FIGURE 14. TYPICAL ON RESISTANCE AS A FUNCTION OF
INPUT SIGNAL VOLTAGE AT VDD = -VSS = 2.5V
-2
0
2
4
INPUT SIGNAL (V)
FIGURE 15. TYPICAL ON RESISTANCE AS A FUNCTION OF
INPUT SIGNAL VOLTAGE AT VDD = -VSS = 5V
4-204
Typical Performance Curves
(Continued)
100
400
TA = 25oC
350
TA = 125oC
SWITCH “ON” RESISTANCE (Ω)
SWITCH “ON” RESISTANCE (Ω)
VDD = 7.5V, VSS = -7.5V
75
25oC
50
-55oC
25
300
250
VDD = 2.5V, VSS = -2.5V
200
150
100
±5V
±7.5V
50
0
0
-10
-8
-6
-4
-2
0
2
6
4
8
-10
10
-5
FIGURE 16. TYPICAL ON RESISTANCE AS A FUNCTION OF
INPUT SIGNAL VOLTAGE AT VDD = -VSS = 7.5V
TA = 25oC
RL = 1MΩ, 100kΩ, 10kΩ
2.5
1kΩ
8
STROBE = VDD
6
DATA-IN =
VDD
4
500Ω
SW
VIS
2
VOS
RL
VSS
4
6
8
OUTPUT SIGNAL (VOS) RMS (V)
OUTPUT VOLTAGE (V)
10
VDD = 5V, VSS = -5V
VIS = 5VP-P = SINE WAVE 1.77VRMS
10
2
5
FIGURE 17. TYPICAL ON RESISTANCE AS A FUNCTION OF
INPUT SIGNAL VOLTAGE AT TA = 25oC
VDD = 10V
TA = 25oC
0
0
INPUT SIGNAL (V)
INPUT SIGNAL (V)
10
CIOS = 0.4pF
RL = 1MΩ
VIS
fIS
2
VOS (RMS)
SW
RL
1.5
10kΩ
CL
1kΩ
1
RF VOLTMETER
BOONTON RADIO
MODEL 91-CA
OR EQUIV.
0.5
0
105
106
107
108
INPUT SIGNAL FREQUENCY (Hz)
INPUT VOLTAGE (V)
FIGURE 18. TYPICAL SWITCH ON TRANSFER
CHARACTERISTICS (1 OF 16 SWITCHES)
CL = 15pF
VDATA-IN = 5V
FIGURE 19. TYPICAL SWITCH ON FREQUENCY RESPONSE
CHARACTERISTICS
4-205