Datasheet

UNISONIC TECHNOLOGIES CO., LTD
US5C3309
Preliminary
CMOS IC
3:1 MUX/DEMUX BUS SWITCH

DESCRIPTION
The UTC US5C3309 is a single 1-of-3 Multiplexer/Demultiplexer.
The low on-resistor (5Ω) allows connected to be made without any
additional ground bounce noise or propagation delay when one
channel is selected. An additional 3-State output is introduced if no
channel is selected.

FEATURES
* Low on-resistor connection between input and output (5Ω typical)
* Near-Zero propagation delay
* Direct bus connection when switches are ON
* Ultra Low Quiescent Power (0.2μA typical)
- Ideally suited for notebook applications

ORDERING INFORMATION
Ordering Number
US5C3309G-SM1-R

Package
MSOP-8
Packing
Tape Reel
MARKING
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
Preliminary
CMOS IC
PIN CONFIGURATION
IA0 1
8 VCC
IA1 2
7 S1
IA2 3
6 S0
GND 4

PIN DESCRIPTION
PIN NO.
1, 2, 3
4
5
6, 7
8

5 YA
PIN NAME
IAn
GND
YA
S0, S1
VCC
DESCRIPTION
Data Inputs
Ground
Data Output
Select Inputs
Power
TRUTH TABLE (Note 1)
Select
S1
S0
L
L
L
H
H
L
H
H
Note: H=High Voltage Level, L=Low Voltage Level

YA
IA0
IA1
IA2
Hi-Z
Function
S1-0=0
S1-0=1
S1-0=2
S1-0=3
BLOCK DIAGRAM
IA0
IA1
IA2
S0
S1
YA
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
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
(Above which the useful life may be impaired. For user guidelines, not tested.)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage to Ground Potential (Inputs & VCC
-0.5~+7.0
V
Only)
Supply Voltage to Ground Potential (Outputs &
-0.5~+7.0
V
D/O Only)
DC Input Voltage
-0.5~+7.0
V
DC Output Current
120
mA
Power Dissipation
PD
0.5
W
Storage Temperature
TSTG
-65~+150
°C
Ambient Temperature with Power Applied
TA
-40~+85
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

DC ELECTRICAL CHARACTERISTICS (Over the Operating Range, TA=-40°C~+85°C, VCC=5V±5%)
PARAMETER
SYMBOL
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance Output Current
Clamp Diode Voltage
Short Circuit Current
Input Hysteresis at Control Pins
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
VCC=Max., VIN=VCC
VCC=Max., VIN=GND
0≤IN, YN≤VCC
VCC=Min, IIN=-18mA
I (Y)=0V, Y (I)=VCC
MIN
2.0
-0.5
TYP
MAX
(Note 2)
UNIT
V
V
μA
μA
μA
-0.7
V
mA
150
mV
VCC=Min, VIN=0.0V, ION=48mA
5
7
Ω
Switch On-Resistance (Note 3)
RON
10
15
Ω
VCC=Min, VIN=2.4V, ION=15mA
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the
applicable device type
2. Typical values are at VCC=5.0V, TA=25°C ambient and maximum loading.
3. Measured by the voltage drop between I and Y pin at indicated current through the switch. On-Resistance
is determined by the lower of the voltages on the two (I, Y) pins.

VIH
VIL
IIH
IIL
IOZH
VIK
IOS
VH
TEST CONDITIONS (Note 1)
0.8
±1
±1
±1
1.2
100
POWER SUPPLY CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITIONS (Note 1)
MIN
TYP
MAX
(Note 2)
0.1
3.0
UNIT
Quiescent Power Supply Current
ICC
VIN=GND or VCC
μA
VCC=Max.
Supply Current per Input @
△ICC
2.5
mA
VIN=3.4V (Note 3)
TTL HIGH
mA/
VCC=Max. I and Y Pins Open Control
Supply Current Per Input Per MHz
0.25
ICCD
MHz
Input Toggling 50% Duty Cycle
(Note 4)
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the
applicable device.
2. Typical values are at VCC=5.0V, +25°C ambient.
3. Per TTL driven input (VIN=3.4V, control inputs only); I and Y pins do not contribute to ICC.
4. This current applies to the control inputs only and represent the current required to switch internal
capacitance at the specified frequency. The I and Y inputs generate no significant AC or DC currents as
they transition. The parameter is not tested, but is guaranteed by design.
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
Preliminary
CMOS IC
CAPACITANCE (TA=25°C, f =1MHz)
PARAMETER (Note 1)
SYMBOL
TEST CONDITIONS (Note 1) MIN
Input Capacitance
CIN
VIN=0V
IA Capacitance, Switch Off
COFF
IA Capacitance, Switch On
CON
Note: This parameter is determined by device characterization but is not production tested.

TYP
3
4
16
MAX
UNIT
pF
pF
pF
SWITCHING CHARACTERISTICS OVER OPERATING RANGE (CL=50pF, RL=500Ω)
PARAMETER
DESCRIPTION
TEST CONDITIONS
MIN
Com
TYP
MAX
0.25
6.6
6.0
6.0
UNIT
Propagation Delay (Note 1, 2) IN to YN
tIY
ns
Bus Select Time SN to YN
tSY
0.5
ns
CL=50pF, RL=500Ω
Bus Enable Time SN to YN
tPZH/tPZL
0.5
ns
0.5
ns
Bus Disable Time SN to YN
tPHZ/tPLZ
Notes: 1. This parameter is guaranteed but not tested on Propagation Delays.
2. The bus switch contributes no propagational delay other than the RC delay of the On-Resistance of the
switch and the load capacitance. The time constant for the switch alone is of the order of 0.25ns for 50pF
load. Since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very
little propagational delay to the system. Propagational delay of the bus switch when used in a system is
determined by the driving circuit on the driving side of the switch and its interaction with the load on the
driven side.
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Preliminary

TEST CIRCUIT

SWITCH POSITIONS
TEST
TPD(S)
TPLZ/TPZL
TPHZ/TPZH

S1
Open
7V
GND
RL
500Ω
500Ω
500Ω
CMOS IC
VI
VCC or GND
GND
VCC
CL
50pF
50pF
50pF
V∆
0.3V
0.3V
ENABLE AND DISABLE TIMING
3V
Control
Input
(VIN)
1.5V
1.5V
0V
TPLZ
TPZL
3V
Input
(VI)
1.5V
1.5V
Output
Waveform 1
S1 at 7V
(see Note B)
3.5V
1.5V
VOL+VΔ
0V
TPZH
TPHL
TPLH
VOH
Output
VOL
1.5V
1.5V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (TPD(S))
Output
Waveform 2
S1 at Open
(see Note B)
TPHZ
VOH
1.5V
VOH-VΔ
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Notes: 1. CL includes probe and jig capacitance.
2. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by
the output control. Waveform 2 is for an output with internal conditions such that the output is high, except
when disabled by the output control.
3. All input pulses are supplied by generators having the following characteristics: PRR≤10MHz, ZO=50Ω,
TR≤2.5ns, TF≤2.5ns.
4. The outputs are measured one at a time, with one transition per measurement.
5. TPLZ and TPHZ are the same as TDIS.
6. TPZL and TPZH are the same as TEN.
7. TPLH and TPHL are the same as TPD (S).
8. All parameters and waveforms are not applicable to all devices.
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Preliminary
CMOS IC
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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