992

NTE992
Integrated Circuit
Quad, Single Supply Operational Amplifier
Description:
The NTE992 is an internally compensated Norton operational amplifier in a 14−Lead DIP type package designed specifically for single positive power supply applications found in industrial control systems and automotive electronics. This device contains four independent amplifiers − making it ideal
for applications such as active filters, multi−channel amplifiers, tachometers, oscillators, and other
similar usages.
Features:
D Single−Supply Operation
D Internally Compensated
D Wide Unity Gain Bandwidth: 4MHz Typ
D Low Input Bias Current: 50nA Typ
D High Open−Loop Gain: 1000V/V Min
D Large Output Voltage Swing: (VCC −1) VP−P
Absolute Maximum Ratings:
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28V
Input Currents (Iin+ or Iin−), Iin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Output Current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Power Dissipation (TA = +25°C), PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 625mW
Derate Above 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mW/°C
Operating Ambient Temperature, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40° to +85°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65° to +150°C
Electrical Characteristics: (TA = +25°C, VCC = +15V unless otherwise specified)
Parameter
Open−Loop Voltage Gain
Symbol
AVOL
Test Conditions
f = 100Hz, RL = 5kΩ, Note 1
Min
Typ
Max
Unit
1.2
2.0
−
V/mV
Input Resistance (Inverting Input)
ri
−
1.0
−
MΩ
Output Resistance
rO
−
8.0
−
kΩ
Input Bias Current (Inverting Input)
IIB
−
50
300
nA
Note 1. Open−loop voltage gain is defined as voltage gain from the inverting input to the output.
Electrical Characteristics (Cont’d): (TA = +25°C, VCC = +15V unless otherwise specified)
Parameter
Min
Typ
−
0.5
−
V/µs
−
20
−
V/µs
−
4.0
−
MHz
13.5
14.2
−
V
−
0.03
0.2
V
−
25.5
−
V
Isource
5.0
10.0
−
mA
Sink (Note 2)
Isink
0.5
0.87
−
mA
Low Level Output Current
IOL
−
5.0
−
mA
IDO
−
6.9
10.0
mA
IDG
−
7.8
14.0
mA
−
55
−
dB
0.90
1.0
1.1
µA
0.90
1.0
1.1
µA
20µA ≤ Iin+ ≤ 200µA, TA = −40° to +85°C,
Note 3
−
2.0
5.0
%
Mirror Current
TA = −40° to +85°C
−
10
500
µA
Negative Input Current
Note 5
−
1.0
−
mA
Slew Rate
Positive Output Swing
Symbol
Test Conditions
SR
CL = 100pF, RL = 2kΩ
Negative Output Swing
Unity Gain Bandwidth
BW
Output Voltage Swing (Note 6)
VOH
VOL
VOH
Output Current
Source
Supply Current (All Four Amps)
Non−Inverting Inputs Open
Non−Inverting Inputs Grounded
Power Supply Rejection
Mirror Gain
PSRR
Ai
VCC = +15V,
RL = 2kΩ
Ω
Vout High (Iin− = 0, Iin+ = 0
Vout Low (Iin− = 10µA, Iin+ = 0
VCC = Max Rating, RL = R,
Vout High (Iin− = 0, Iin+ = 0)
Iin− = 5µA, VOL = 1V
f = 100Hz
Iin+ = 20µA
TA = −40° to +85°C, Note 3
Iin+ = 200µA
∆ Mirror Gain
Max Unit
∆Ai
Note 2. Sink current is specified for linear operation. When the device is used as a comparator (non−
linear operation) where the inverting input is overdriven, the sink current (low level output
current) capability is typically 5mA.
Note 3. This specification indicates the current gain of the current mirror which is used as the non−
inverting input.
Note 4. Input VBE match between the non−inverting and inverting inputs occurs for a mirror current
(non−inverting input current) of approximately 10µA.
Note 5. Clamp transistors are included to prevent the input voltages from swinging below GND more
than approximately −0.3V. The negative input currents that may result from large signal overdrive with capacitance input coupling must be limited externally to values of approximately
1mA. Negative input currents in excess of 4mA will cause the output to drop to a low voltage.
These values apply for any one of the input terminals. If more than one of the input terminals
are simultaneously driven negative, maximum currents are reduced. Common−mode biasing can be used to prevent negative input voltages.
Note 6. When used as a non−inverting amplifier, the minimum output voltage is the VBE of the inverting input transistor.
Pin Connection Diagram
(+) Input B 1
14 V (+)
(+) Input A 2
13 (+) Input C
(−) Input A 3
12 (+) Input D
Output A 4
11 (−) Input D
Output B 5
10 Output D
(−) Input B 6
9 Output C
GND 7
8 (−) Input C
14
8
1
7
.785 (19.95)
Max
.300
(7.62)
.200 (5.08)
Max
.100 (2.45)
.600 (15.24)
.099 (2.5) Min
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