RFP2N20L Data Sheet July 1999 2A, 200V, 3.500 Ohm, Logic Level, N-Channel Power MOSFET File Number Features • 2A, 200V The RFP2N20L N-Channel enhancement mode silicon gate power field effect transistor is specifically designed for use with logic level (5V) driving sources in applications such as programmable controllers, automotive switching, and solenoid drivers. This performance is accomplished through a special gate oxide design which provides full rated conduction at gate biases in the 3V - 5V range, thereby facilitating true on-off power control directly from logic circuit supply voltages. • rDS(ON) = 3.500Ω • Design Optimized for 5V Gate Drives • Can be Driven Directly from QMOS, NMOS, TTL Circuits • Compatible with Automotive Drive Requirements • SOA is Power Dissipation Limited • Nanosecond Switching Speeds Formerly developmental type TA09532. • Linear Transfer Characteristics Ordering Information • High Input Impedance PART NUMBER RFP2N20L PACKAGE TO-220AB 2875.2 • Majority Carrier Device BRAND • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” RFP2N20L NOTE: When ordering, include the entire part number. Symbol D G S Packaging JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) 6-256 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 RFP2N20L Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFP2N20L UNITS Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS 200 V Drain to Gate Voltage RGS = 20KΩ (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR 200 V Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±10 V Drain Current, RMS Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID 2 A Pulsed (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 4 A Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 25 W Derate Linearly Above TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 W/ oC Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER Drain to Source Breakdown Voltage SYMBOL BVDSS Gate to Threshold Voltage VGS(TH) Zero Gate Voltage Drain Current IDSS Gate to Source Leakage Current IGSS TEST CONDITIONS MIN TYP MAX UNITS 200 - - V VGS = VDS, ID = 250µA 1 - 2 V VDS = Rated BVDSS, VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - 25 µA VGS = ±10V, VDS = 0 - - ±100 nA ID = 250µA, VGS = 0V Drain to Source On Voltage (Note 2) VDS(ON) ID = 2A, VGS = 5V - - 7 V Drain to Source On Resistance (Note 2) rDS(ON) ID = 2A, VGS = 5V (Figures 6, 7) - - 3.500 Ω ID = 2A, VDD = 100V, RG = 6.25Ω, VGS = 5V RL = 50Ω (Figures 10, 11, 12) - 10 25 ns - 10 30 ns td(OFF) - 25 40 ns tf - 20 25 ns - - 200 pF - - 60 pF Turn-On Delay Time td(ON) Rise Time tr Turn-Off Delay Time Fall Time Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS - - 35 pF Thermal Resistance Junction to Case RθJC - - 5 oC/W MIN TYP MAX UNITS ISD = 2A - - 1.4 V ISD = 2A, dlSD/dt = 50A/µs - 200 - ns VGS = 0V, VDS = 25V, f = 1MHz (Figure 9) Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Reverse Recovery Time SYMBOL VSD trr TEST CONDITIONS NOTES: 2. Pulsed: pulse duration = 300µs max, duty cycle = 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. 6-257 RFP2N20L Typical Performance Curves Unless Otherwise Specified 2.4 1.2 POWER DISSIPATION MULTIPLIER 2.2 2.0 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.2 0 25 0 0 25 50 75 100 125 TC, CASE TEMPERATURE (oC) 150 FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE TJ = MAX RATED TC = 25oC 1 0.1 VGS = 10V 2.5 VGS = 4V 2 VGS = 3V 1.5 1 0.5 0.01 1 10 100 VGS = 2V 0 0 1000 1 VDS, DRAIN TO SOURCE VOLTAGE (V) 5 -40oC PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS = 15V 25oC 3 2 125oC 125oC 1 2 3 4 5 6 VDS, DRAIN TO SOURCE VOLTAGE (V) 7 FIGURE 4. SATURATION CHARACTERISTICS rDS(ON), DRAIN TO SOURCE ON RESISTANCE (Ω) IDS(ON), DRAIN TO SOURCE CURRENT (A) FIGURE 3. FORWARD BIAS SAFE OPERATING AREA 4 150 VGS = 5V PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC 3 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 75 100 125 TC, CASE TEMPERATURE (oC) FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 OPERATION IN THIS AREA LIMITED BY rDS(ON) 50 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 5V 4 125oC 3 25oC 2 -40oC 1 -40oC 0 0 1 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 5. TRANSFER CHARACTERISTICS 6-258 5 0 0 1 2 ID, DRAIN CURRENT (A) 3 FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN CURRENT 4 RFP2N20L Unless Otherwise Specified (Continued) 2.0 ID = 2A VGS = 5V 2.0 1.5 1.0 1.0 0.5 0.5 0 50 100 TJ, JUNCTION TEMPERATURE (oC) 0 50 150 FIGURE 7. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE VDS, DRAIN TO SOURCE VOLTSAGE (V) CISS VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 100 60 COSS 20 CRSS 0 10 200 RL = 100Ω IG(REF) = 0.09mA VGS = 5V 150 10 20 30 40 VDS, DRAIN TO SOURCE VOLTAGE (V) 8 GATE SOURCE VDD = BVDSS VOLTAGE VDD = BVDSS 100 6 4 0.75BVDSS 0.50BVDSS 0.25BVDSS 50 2 DRAIN SOURCEVOLTAGE 0 0 0 200 FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 180 140 0 50 100 150 TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V) -50 C, CAPACITANCE (pF) ID = 250µA 1.5 NORMALIZED GATE THRESHOLD VOLTAGE NORMALIZED DRAIN TO SOURCE ON RESISTANCE Typical Performance Curves I 20 G(REF) IG(ACT) 50 t, TIME (µs) I 80 G(REF) IG(ACT) NOTE: Refer to Intersil Applications Notes AN7254 and AN7260 FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuits and Waveforms tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 11. SWITCHING TIME TEST CIRCUIT 6-259 10% 50% 50% PULSE WIDTH FIGURE 12. RESISTIVE SWITCHING WAVEFORMS RFP2N20L All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 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