Mar 2006 3A Monolithic Buck Regulator in 4mm x 4mm QFN

L DESIGN FEATURES
Introduction
The LTC3412A is much more than a
drop-in replacement for the popular
LTC3412 monolithic buck switching
regulator. Though still offered in a
thermally enhanced 16-lead TSSOP,
the LTC3412A is also squeezed into
a smaller footprint 4mm × 4mm
QFN, reducing the package height to
0.75mm from 1.1mm. At the same
time, the maximum load current has
risen to 3A from the LTC3412’s 2.5A,
and the minimum input voltage has
been pared down to 2.25V from the
earlier 2.625V. The LTC3412A can
still deliver efficiency as high as 95%,
accept input voltages up to 5.5V, and
switch at frequencies up to 4MHz,
making it a compact and efficient
solution for portable electronics that
require low supply voltages (down to
0.8V) converted from typical battery
voltages.
Like its predecessor, the LTC3412A
employs a constant frequency, current-mode architecture. The switching
frequency can be set between 300kHz
and 4MHz by an external resistor, or
each switching cycle can commence
with the falling edge of an external
clock signal fed into the Sync/Mode
pin. The LTC3412A’s high switching
frequency permits the designer to use
tiny, low value inductors while holding
output voltage ripple to a minimum.
Choice of Operating Modes
The LTC3412A can be configured for
Burst Mode operation, forced continuous operation, or pulse skipping. In
mobile applications where battery life
is of paramount importance, Burst
Mode operation boosts efficiency by
reducing gate charge losses at light
loads, and so reducing supply current to just 64µA at no load. Forced
continuous operation switches at
constant frequency regardless of load
current; this simplifies filtering of the
switch noise. Pulse skip mode provides
a good compromise between light load
efficiency and output voltage ripple.
During Burst Mode operation,
switching cycles are skipped during
light loads to reduce switching losses.
The LTC3412A provides for external
VIN
3.3V
CFF 22pF X5R
CIN3**
100µF
R1 392k
1
CITH 330pF X7R RITH
17.4k
3
4
RSS
2.2M
16
CIN1
22µF
PGOOD
ITH
VFB
SW
3000
2500
2000
1500
1000
500
0
0.1
0.2
0.3
0.4
0.5
VBURST (V)
0.6
0.7
control of these cycles’ peak current
(the burst clamp level) by varying
the DC voltage at the Sync/Mode
pin within a 0V–1V range. Figure 1
shows the relationship between this
DC voltage (which is generally tapped
off of the feedback resistor network)
and the burst clamp level. Higher
peak currents deliver more energy, so
fewer bursts are required to maintain
the output voltage. If the minimum
peak inductor current delivers more
energy than the load current demands,
the control loop causes the internal
power switches to skip more cycles.
Lower burst frequencies can improve
efficiency at light load, at the expense
5
ROSC
294k
6 SYNC/MODE
7
15
90
Burst Mode
80 OPERATION
14
SW
LTC3412A
13
EFE
PGND
R2
69.8k
CSS
1000pF X7R 8
RT
PGND
SW
RUN
SW
SGND
PVIN
L1*
0.47µH
VOUT
2.5V
3A
12
11
COUT**
100µF
×2
10
9
CIN2
22µF
X5R 6.3V
*VISHAY IHLP-2525CZ-01
**TDK 4532X5R0J107M
Figure 2. A 2.5V, 4A step-down regulator in Burst Mode operation
34
3500
100
2
CC
47pF
R3
115k
PVIN
4000
Figure 1. By tying the Sync/Mode pin to a
point on the feedback voltage divider, as in
Figure 2, the designer can freely adjust the
peak current of the bursts (See Figure 4).
GND
EFFICIENCY (%)
PGOOD
RPG
100k
SVIN
MAXIMUM PEAK INDUCTOR CURRENT (mA)
3A Monolithic Buck Regulator
by Theo Phillips
in 4mm × 4mm QFN
70
FORCED
CONTINUOUS
60
50
40
30
20
10
0
0.01
VIN = 3.3V
VOUT = 2.5V
FIGURE 4 CIRCUIT
0.1
1
LOAD CURRENT (A)
10
Figure 3. Efficiency vs load current for the
circuit of Figure 2, VIN = 3.3V, VOUT = 2.5V
(Burst Mode operation). If Sync/Mode were
tied to ground, the efficiency would be lower
(pulse skip mode), but output voltage ripple
would be greatly reduced.
Linear Technology Magazine • March 2006
DESIGN FEATURES L
ther reduction in the battery voltage
forces the internal P-channel MOSFET
to remain on for more than one cycle,
and ultimately to remain on 100% of
the time. This dropout state extends
the useful operating input voltage over
the run-time of the battery. Output
voltage simply follows the input voltage
as the battery continues to discharge,
reduced by drops across the inductor
and P-channel MOSFET.
VOUT
20mV/DIV
INDUCTOR
CURRENT
1A/DIV
5µs/DIV
Figure 4. Burst Mode operation, showing
output voltage ripple associated with bursts of
inductor current. The peak currents are held
to 1.1A because the Sync/Mode voltage is set
to 0.49V.
The LTC3412A can
deliver efficiency as high
as 95%, accept input
voltages up to 5.5V, and
switch at frequencies
up to 4MHz, making it
a compact and efficient
solution for portable
electronics that require
low supply voltages (down
to 0.8V) converted from
typical battery voltages.
CIN3**
100µF
C1 22pF X5R
VIN
5V
R1 634k
1
PGOOD
RPG
100k
CITH 820pF X7R RITH
7.5k
2
3
CC
47pF
R2
200k
ROSC
137k
ITH
VFB
5
6
CSS
1000pF X7R 8
PVIN
PGOOD
4
7
RSS
2.2M
SVIN
SW
16
CIN1
22µF
X5R 6.3V
15
14
SW
LTC3412A
13
EFE
PGND
RT
SYNC/MODE
PGND
SW
RUN
SW
SGND
PVIN
Figure 2 shows a 2.5V step-down
DC/DC converter that is configured
for Burst Mode operation. This circuit
provides a regulated 2.5V output at
up to 3A from a 3.3V input. Figure 3
shows that efficiency peaks at 94%,
and remains high across the load
spectrum. The measured output voltage ripple is around 25mVP–P at loads
from 10mA to 200mA, and drops to
around 5mV at heavier loads. Lower
ripple (5mV–10mV) can be maintained
at the lightest loads with pulse skip
mode, with some sacrifice in light load
efficiency. The switching frequency for
this circuit is set at 1MHz by a single
external resistor, ROSC. Operating at
frequencies this high allows the use
of a low value (and physically small)
inductor.
In this application, Burst Mode operation maintains the high efficiency
at light loads. This powers down the
majority of the internal circuitry during
the intervals between switching cycles.
The peak inductor current is set by the
R2-R3 voltage divider, which generates
100
L1*
0.47µH
90
VOUT
3.3V
3A
12
11
COUT**
100µF
×2
10
9
CIN2
22µF
X5R 6.3V
80
70
60
50
40
30
20
GND
*VISHAY IHLP-2525CZ-01
**TDK C4532X5R0J107M
Figure 5. A 2MHz regulator, 5V to 3.3V at 3A, operating in forced continuous mode
Linear Technology Magazine • March 2006
A High Efficiency 2.5V, 3A
Step-Down Regulator with
All Ceramic Capacitors
EFFICIENCY (%)
of a slight increase in output voltage
ripple. Conversely, lowering the minimum peak inductor current increases
the burst frequency and reduces the
output voltage ripple.
Burst Mode operation dissipates
minimal power in light load applications, but sometimes noise
suppression takes priority over efficiency. To reduce noise and RF
interference, the LTC3412A can be
set up for forced continuous operation by connecting the Sync/Mode pin
to the Signal Input Voltage pin. This
mode maintains a constant switching frequency regardless of output
load, dovetailing with noise sensitive
applications in which it is necessary
to avoid switching harmonics in a
particular signal band.
In pulse skip mode, the burst clamp
is set to zero current, which limits the
minimum peak inductor current to a
level set by the minimum on-time of
the control loop. Pulse skip mode is
implemented by connecting the Sync/
Mode pin to GND. Pulse skipping has
lower ripple than Burst Mode operation
and has better light-load efficiency
than forced continuous mode.
As the battery voltage decreases
toward the output voltage, the duty
cycle and the on-time increase. Fur-
10
0
0.01
VIN = 5V
VOUT = 3.3V
FIGURE 5 CIRCUIT
0.1
1
LOAD CURRENT (A)
10
Figure 6. Efficiency of the circuit in Figure 5
reaches well into the 90s at moderate loads.
35
L DESIGN FEATURES
VOUT
100mV/DIV
AC
COUPLED
VIN
2V/DIV
0V
VOUT
2V/DIV
0V
INDUCTOR
CURRENT
2A/DIV
VSW
5V/DIV
VIN = 5V
40µs/DIV
VOUT = 3.3V
f = 2MHz
LOAD STEP = 300mA TO 3A
0V
VIN = 3.3V
VOUT = 2.5V
f = 1MHz
RLOAD = 1.5
100µs/DIV
Figure 7. The circuit of Figure 5 delivers
a clean transient response when the load
is stepped from 300mA to 3A.
Figure 8. If the circuit of Figure 2 experiences
a dip in VIN, a regulated output is maintained
until the LTC3412A goes smoothly into
dropout. Below that level, VOUT follows VIN
anywhere above the undervoltage lockout. For
output voltages programmed below the UVLO,
the LTC3412A can maintain its output voltage
even when the input sinks to 2.25V.
a 0.49V reference at the Sync/Mode
pin. This corresponds to approximately
1.1A minimum peak inductor current,
as shown in Figure 1.
Figure 4 illustrates how Burst Mode
operation produces a burst of inductor current pulses that are repeated
periodically. Each inductor current
pulse increases to approximately 1.1A
during each switching period before
the main power MOSFET is shut
off. The process repeats for multiple
switching cycles until the charge on
the output capacitor is refreshed. Once
this is accomplished, both the main
and synchronous power MOSFETs
are held off while the load current
is supplied solely by the charge on
the output capacitor. This sleep state
continues until the output voltage
drops low enough to initiate another
burst cycle. Varying the voltage on the
Sync/Mode pin affects the amplitude
of the group of current bursts as well
as the frequency at which they are
repeated.
tion near an AM radio receiver, since
it operates above the broadcast band
and the switch noise can be filtered
in a predictable manner. Efficiency for
this circuit, shown in Figure 6, is as
high as 95% at moderate loads.
Ceramic capacitors offer low cost
and low ESR, but many switching regulators have difficulty operating with
them because the extremely low ESR
can lead to loop instability. The phase
margin of the control loop can drop to
inadequate levels without the aid of the
zero that is normally generated from
the higher ESR of tantalum, niobium,
or special polymer capacitors. The
LTC3412A, however, includes OPTILOOP compensation, which allows it
to operate properly with ceramic input
36
Lower Minimum
Input Voltage
Sagging input voltages are handled
well by the LTC3412A. Figure 8 shows
the response of VOUT to a substantial
hit to VIN. Until VIN drops to VOUT, the
effect on VOUT is negligible; below that
point the P-channel FET turns on
100% of the time (dropout), and VOUT
follows VIN right down to the guaranteed 2.25V undervoltage lockout.
Output voltages set below the UVLO
can be maintained while maximizing
battery life, or where input rails are
just loosely regulated.
Conclusion
The LTC3412A is a monolithic, synchronous step-down DC/DC converter
that is well suited for applications
requiring up to 3A of output current.
OPTI-LOOP compensation allows
diverse transient responses to be
optimized with ceramic capacitors.
For excellent thermal handling, the
LTC3412A is offered in two tiny
packages, each with an exposed pad
to facilitate heat sinking (Figure 9).
Its high switching frequency, low
undervoltage lockout and internal
low RDS(ON) power switches make the
LTC3412A an excellent choice for
compact, high efficiency power supplies. L
For further information on any
of the devices mentioned in this
issue of Linear Technology, use
the reader service card or call the
LTC literature service number:
2MHz, High Efficiency 3.3V,
3A Step-Down Regulator with
All Ceramic Capacitors
Figure 5 shows a 3.3V step-down DC/
DC converter using all ceramic capacitors. Switching at 2MHz, this circuit
provides a regulated 3.3V output at
up to 3A from a 5V input voltage. This
converter is an ideal choice for opera-
and output capacitors. The LTC3412A
allows loop stability to be achieved
through a wide range of loads and
output capacitors with proper selection of compensation components on
the ITH pin. Figure 7 shows the stable
transient response associated with the
circuit of Figure 5.
1-800-4-LINEAR
Figure 9. The LTC3412A is offered in two
thermally enhanced packages: the 16-lead
TSSOP (both sides shown) and the ultra-thin
4mm × 4mm QFN (shown in tweezers).
Ask for the pertinent data sheets
and Application Notes.
Linear Technology Magazine • March 2006