INTERSIL ISL43112IHZ-T

ISL43112, ISL43113
®
Data Sheet
July 2004
Low-Voltage, Dual Supply, SPST, High
Performance Analog Switches
Features
The Intersil ISL43112 and ISL43113 are precision, high
performance analog switches designed to operate from
±1.5V to ±6V supplies. These devices are fully specified for
10% tolerance ±5V and ±3.3V supplies, and feature supply
and leakage currents much lower than those of other single
SPST switches. Turn-on and turn-off times are also
improved.
• Available in SOT-23 Packaging
FN6029.2
• Fully Specified at VS = ±5V and ±3.3V for 10% Tolerances
Targeted applications include battery powered equipment
that benefit from the devices’ low power consumption
(250µW), sub-nanoamp leakage currents, and fast switching
speeds
(tON = 40ns, tOFF = 25ns). The small SOT-23 packages,
and timing that delivers break-before-make operation, make
this family ideal for custom multiplexer applications.
Additionally, excellent RON flatness maintains signal fidelity
over the whole input range, while micro packaging alleviates
board space limitations. All these benefits combine to make
Intersil’s newest line of low-voltage switches ideal solutions
for “Next Generation” designs.
The ISL4311X are single-pole/single-throw (SPST) switches,
with the ISL43112 being normally open (NO), and the
ISL43113 being normally closed (NC).
Table 1 summarizes the performance of this family. For single
supply versions, see the ISL43110/11 datasheet..
• Dual Supply Operation . . . . . . . . . . . . . . . . . . . ±1.5V to ±6V
• ON Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Ω
• RON Flatness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Ω
• Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7pC
• Low Leakage Current (Max at 85°C) . . 5nA (Off Leakage)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20nA (On Leakage)
• Fast Switching Action
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns
• Break-Before-Make Operation at VS = ±5V
• Minimum 2000V ESD Protection per Method 3015.7
• CMOS Logic Compatible
• Pb-free Available
Applications
• Battery Powered, Handheld, and Portable Equipment
- Cellular/Mobile Phones, Pagers
- Laptops, Notebooks, Palmtops, PDA’s
• Communications Systems
- Radios
- PBX, PABX
TABLE 1. FEATURES AT A GLANCE
• Test Equipment
ISL43112
ISL43113
1
1
Number of Switches
- Portable Meters, DVM, DMM
• Medical Equipment
Configuration
NO
NC
±4.5V RON
15Ω
15Ω
±4.5V tON / tOFF
42ns / 25ns
42ns / 25ns
±3V RON
20Ω
20Ω
±3V tON / tOFF
58ns / 37ns
58ns / 37ns
Packages
8 Ld SOIC, 5 Ld SOT-23
- Logic and Spectrum Analyzers
- Ultrasound, MRI, CAT SCAN
- Electrocardiograph, Blood Analyzer
• Audio and Video Switching
• General Purpose Circuits
- Low Voltage DACs and ADCs
- Sample and Hold Circuits
- Digital Filters
- Operational Amplifier Gain Switching Networks
- High Frequency Analog Switching
- High Speed Multiplexing
- Integrator Reset Circuits
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL43112, ISL43113
Pinouts
(Note 1)
ISL43112 (SOIC)
TOP VIEW
COM 1
ISL43112 (SOT-23)
TOP VIEW
8 NO
N.C.
2
7 V-
N.C.
3
6 IN
V+
4
5 N.C.
NO
2
7 V-
N.C.
3
6 IN
V+
4
5 N.C.
4 IN
ISL43113 (SOT-23)
TOP VIEW
8 NC
N.C.
2
V- 3
ISL43113 (SOIC)
TOP VIEW
COM 1
5 V+
COM 1
5 V+
COM 1
NC
2
4 IN
V- 3
NOTE:
1. Switches Shown for Logic “0” Input.
Truth Table
LOGIC
NOTE:
Ordering Information
ISL43112
ISL43113
0
OFF
ON
1
ON
OFF
Logic “0” ≤ 1.5V; Logic “1” ≥ 3.5V at VS = ±5V
Pin Descriptions
PIN
FUNCTION
V+
System Positive Power Supply Input (+1.5V to +6V)
V-
System Negative Power Supply Input (-1.5V to -6V)
IN
CMOS Compatible Digital Control Input
COM
PART
NUMBER
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
ISL43112IB
-40 to 85
8 Ld SOIC
M8.15
ISL43112IB-T
-40 to 85
Tape and Reel
M8.15
ISL43112IBZ
(Note)
-40 to 85
8 Ld SOIC (Pb-free)
M8.15
ISL43112IBZ-T
(Note)
-40 to 85
Tape and Reel (Pb-free) M8.15
ISL43112IH-T
(112I)
-40 to 85
5 Ld SOT-23, Tape and
Reel
ISL43112IHZ-T
(112I) (Note)
-40 to 85
5 Ld SOT-23,
P5.064
Tape and Reel (Pb-free)
ISL43113IB
-40 to 85
8 Ld SOIC
M8.15
ISL43113IB-T
-40 to 85
Tape and Reel
M8.15
ISL43113IBZ
(Note)
-40 to 85
8 Ld SOIC (Pb-free)
M8.15
ISL43113IBZ-T
(Note)
-40 to 85
Tape and Reel (Pb-free) M8.15
ISL43113IH-T
(113I)
-40 to 85
5 Ld SOT-23, Tape and
Reel
P5.064
ISL43113IHZ-T
(113I) (Note)
-40 to 85
5 Ld SOT-23, Tape and
Reel (Pb-free)
P5.064
P5.064
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
N.C.
No Internal Connection
2
ISL43112, ISL43113
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V
Input Voltages
IN (Note 2). . . . . . . . . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V)
NO, NC (Note 2) . . . . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V)
Output Voltages
COM (Note 2) . . . . . . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 30mA
ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . >2kV
Thermal Resistance (Typical, Note 3)
θJA (°C/W)
5 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
225
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .
170
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Moisture Sensitivity (See Technical Brief TB363)
All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Storage Temperature Range. . . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
Operating Conditions
Temperature Range
ISL4311XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
2. Signals on NO, NC, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings.
3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications - ±5V Supply
PARAMETER
Test Conditions: VSUPPLY = ±4.5V to ±5.5V, VINH = 3.5V, VINL = 1.5V (Note 4),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
Full
V-
-
V+
V
25
-
15
20
Ω
TYP
(NOTE 5)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
VS = ±4.5V, ICOM = 1.0mA, VCOM = 3V,
See Figure 4
Full
-
-
25
Ω
RON Flatness, RFLAT(ON)
VS = ±4.5V, ICOM = 1.0mA, VCOM = -3V, 0V, 3V
25
-
5
6
Ω
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V, Note
6
COM OFF Leakage Current,
ICOM(OFF)
VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V, Note
6
COM ON Leakage Current,
ICOM(ON)
VS = ±5.5V, VCOM = VNO or VNC = ±4.5V, Note 6
Full
-
-
8
Ω
25
-1
0.01
1
nA
Full
-5
-
5
nA
25
-1
0.01
1
nA
Full
-5
-
5
nA
25
-2
0.01
2
nA
Full
-20
-
20
nA
Input Voltage High, VINH
Full
(V+) - 1.5
-
V+
V
Input Voltage Low, VINL
Full
V-
-
(V+) - 3.5
V
VS = ±5.5V, VIN = 0V or V+
Full
-0.5
-
0.5
µA
VNO or VNC = 3V, RL = 300Ω, CL = 35pF,
VIN = 0 to V+, See Figure 1
25
-
42
70
ns
Full
-
46
85
ns
VNO or VNC = 3V, RL = 300Ω, CL = 35pF,
VIN = 0 to V+, See Figure 1
25
-
25
45
ns
Full
-
27
50
ns
pC
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω, See Figure 2
25
-
7
20
OFF Isolation
RL = 50Ω, CL = 15pF, f = 100kHz, See Figure 3
25
-
>90
-
dB
Power Supply Rejection Ratio
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
58
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 5
25
-
13
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 5
25
-
13
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 5
25
-
30
-
pF
3
ISL43112, ISL43113
Electrical Specifications - ±5V Supply
PARAMETER
Test Conditions: VSUPPLY = ±4.5V to ±5.5V, VINH = 3.5V, VINL = 1.5V (Note 4),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
Full
±1.5
-
±6
V
25
-
15
25
µA
µA
TYP
(NOTE 5)
MAX
UNITS
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current, I+
VS = ±5.5V, VIN = 0V or V+, Switch On or Off
Negative Supply Current, I-
VS = ±5.5V, VIN = 0V or V+, Switch On or Off
Full
-
22
50
25
-25
-15
-
µA
Full
-50
-22
-
µA
NOTES:
4. VIN = Input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25°C.
Electrical Specifications - ±3.3V Supply
PARAMETER
Test Conditions: VSUPPLY = ±3.0V to ±3.6V, VINH = V+, VINL = 0V (Note 4),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
Full
V-
-
V+
V
25
-
20
30
Ω
Full
-
25
40
Ω
Ω
TYP
(NOTE 5)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
VS = ±3V, ICOM = 1.0mA, VCOM = 2V
ON Resistance, RON
VS = ±3V, ICOM = 1.0mA, VCOM = -1.5V, 0V, 1.5V
RON Flatness, RFLAT(ON)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
VS = ±3.3V, VCOM = ±2V, VNO or VNC = +2V, Note 6
COM OFF Leakage Current,
ICOM(OFF)
VS = ±3.3V, VCOM = ±2V, VNO or VNC = +2V, Note 6
COM ON Leakage Current,
ICOM(ON)
VS = ±3.3V, VCOM = VNO or VNC = ±2V, Note 6
25
-
4
8
Full
-
5
10
Ω
25
-1
-
1
nA
Full
-5
-
5
nA
25
-1
-
1
nA
Full
-5
-
5
nA
25
-2
-
2
nA
Full
-20
-
20
nA
Input Voltage High, VINH
Full
2.0
1.6
-
V
Input Voltage Low, VINL
Full
-
0.9
0.6
V
VS = ±3.6V, VIN = V- or V+
Full
-0.5
-
0.5
µA
VNO or VNC = 2V, RL = 300Ω, CL = 35pF, VIN = 0.4V
to 2.4V
25
-
58
100
ns
Full
-
62
110
ns
25
-
37
65
ns
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
VNO or VNC = 2V, RL = 300Ω, CL = 35pF, VIN = 0.4V
to 2.4V
Full
-
40
75
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω
25
-
5
12
pC
OFF Isolation
RL = 50Ω, CL = 15pF, f = 100kHz
25
-
>90
-
dB
Power Supply Rejection Ratio
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
55
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V
25
-
13
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V
25
-
13
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V
25
-
30
-
pF
25
-
10
25
µA
µA
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
VS = ±3.6V, VIN = V- or V+, Switch On or Off
Negative Supply Current, I-
VS = ±3.6V, VIN = V- or V+, Switch On or Off
4
Full
-
15
50
25
-25
-10
-
µA
Full
-50
-15
-
µA
ISL43112, ISL43113
Test Circuits and Waveforms
V+
LOGIC
INPUT
V+
tr < 20ns
tf < 20ns
50%
C
0V
tOFF
SWITCH
INPUT
COM
VOUT
IN
90%
SWITCH
OUTPUT
VOUT
NO or NC
SWITCH
INPUT
90%
0V
tON
C
Logic input waveform is inverted for switches that have the opposite
CL
35pF
RL
300Ω
LOGIC
INPUT
V-
CL includes fixture and stray capacitance.
logic sense.
RL
V OUT = V (NO or NC) -----------------------------R L + R ( ON )
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
SWITCH
OUTPUT
VOUT
∆VOUT
RG
VOUT
COM
NO or NC
ON
ON
LOGIC
INPUT
C
VG
OFF
IN
LOGIC
INPUT
C
Q = ∆VOUT x CL
CL
V-
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+
V+
C
C
RON = V1/1mA
SIGNAL
GENERATOR
COM
NO or NC
VCOM
IN
V- or V+
1mA
IN
V1
COM
ANALYZER
NO or NC
RL
C
C
V-
FIGURE 3. OFF ISOLATION TEST CIRCUIT
5
V-
FIGURE 4. RON TEST CIRCUIT
VINL or VINH
ISL43112, ISL43113
Test Circuits and Waveforms (Continued)
V+
NO or NC
IN
V- or V+
IMPEDANCE
ANALYZER
COM
V-
FIGURE 5. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL43112 and ISL43113 analog switches offer precise
switching capability from ±1.5V to ±6V supplies with low onresistance (15Ω) and high speed operation (tON = 40ns,
tOFF = 25ns). The devices are especially well suited to
portable battery powered equipment thanks to the low
operating supply voltage (±1.5V), low power consumption
(250µW), low leakage currents (2nA max), and the tiny
SOT-23 packaging. High frequency applications also benefit
from the wide bandwidth, and the very high off isolation.
Supply Sequencing And Overvoltage Protection
As with any CMOS device, proper power supply sequencing
is required to protect the device from excessive input
currents which might permanently damage the IC. All I/O
pins contain ESD protection diodes from the pin to V+ and to
V- (see Figure 6). To prevent forward biasing these diodes,
V+ and V- must be applied before any input signals, and
input signal voltages must remain between V+ and V-. If
these conditions cannot be guaranteed, then one of the
following two protection methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 6).
Power-Supply Considerations
The ISL4311X construction is typical of most CMOS analog
switches, except that there are only two supply pins: V+ and
V-. The power supplies need not be symmetrical for useful
operation. As long as the total supply voltage (V+ to V-,
including supply tolerances, overshoot, and noise spikes) is
less than the 15V maximum supply rating, and the digital
input switching point remains reasonable (see “Logic-Level
Thresholds” section), the ISL43112/13 function well. The
15V maximum supply rating provides the designer of 12V
systems much greater flexibility than switches with a 13V
maximum supply voltage.
The minimum recommended supply voltage is ±1.5V. It is
important to note that the input signal range, switching times,
and on-resistance degrade at lower supply voltages, and the
digital input VIL becomes negative at VS ≤ ±2V. Refer to the
“Typical Performance” curves for details.
VCOM
V+ and V- power the internal CMOS switches and set their
analog voltage limits. These supplies also power the internal
logic and level shifters. The level shifters convert the input
logic levels to switched V+ and V- signals to drive the analog
switch gate terminals.
V+
VOPTIONAL PROTECTION
DIODE
FIGURE 6. OVERVOLTAGE PROTECTION
6
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 6). These
additional diodes limit the analog signal from 1V below V+ to
1V above V-. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
OPTIONAL PROTECTION
DIODE
OPTIONAL
PROTECTION
RESISTOR
IN
VNO or NC
The resistor limits the input current below the threshold that
produces permanent damage, and the sub-microamp input
current produces an insignificant voltage drop during normal
operation.
This family of switches is not recommended for single supply
applications. For single supply, similar performance, pin
ISL43112, ISL43113
compatible, TTL compatible versions of these switches, see
the ISL43110/11 data sheet.
Logic-Level Thresholds
Due to the lack of a GND pin, the switching point of the
digital input is referenced predominantly to V+. The digital
input is CMOS compatible at ±5V supplies, and is TTL
compatible for ±3.3V supplies. For other supply
combinations refer to Figures 13 and 14.
The switching point has a very low temperature sensitivity,
and changes by only 100mV from 85°C to -40°C, regardless
of supply voltage.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat to
30MHz, with a -3dB bandwidth of nearly 400MHz (see
Figure 15). Figure 15 also illustrates that the frequency
response is very consistent over a wide V+ range, and for
varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. OFF Isolation
is the resistance to this feedthrough. Figure 16 details the
high OFF Isolation provided by this family. At 10MHz, OFF
Isolation is about 50dB in 50Ω systems, decreasing
approximately 20dB per decade as frequency increases.
Higher load impedances decrease OFF Isolation due to the
voltage divider action of the switch OFF Impedance and the
load impedance.
7
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and V-. One of
these diodes conducts if any analog signal exceeds V+ or V-.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or V-. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or V- and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog-signal
paths and V+ or V-.
ISL43112, ISL43113
Typical Performance Curves TA = 25°C, VIH = V+, VIL = 0V, Unless Otherwise Specified
150
50
I
= 1mA
45 COM
40
35
30
25
20
30
85°C
25
25°C
20
-40°C
15
10
30
25
85°C
20
15
-40°C
10
5
-5
-4
-3
VCOM = (V+) -1V
-40°C
ICOM = 1mA
125
75
RON (Ω)
RON (Ω)
100
50
25°C
85°C
25
-40°C
0
1
2
3
4
5
6
VS (±V)
FIGURE 7. ON RESISTANCE vs SUPPLY VOLTAGE
85°C
25°C
-40°C
VS = ±3.3V
VS = ±5V
25°C
-2
-1
0
1
VCOM (V)
2
3
4
5
FIGURE 8. ON RESISTANCE vs SWITCH VOLTAGE
40
RL = 50Ω
VS = ±5V
30
VS = ±1.5V
0
10
VS = ±1.5V to ±5.5V, SWITCH OFF
20
20
0
PSRR (dB)
Q (pC)
10
VS = ±1.5V
-10
VS = ±3.3V
-20
30
VS = ±5.5V, SWITCH ON
40
50
60
VS = ±1.5V, SWITCH ON
70
-30
80
-40
-5
-4
-3
-2
-1
0
1
2
3
4
5
0.3
1
10
VCOM (V)
100
1000
FREQUENCY (MHz)
FIGURE 9. CHARGE INJECTION vs SWITCH VOLTAGE
FIGURE 10. PSRR vs FREQUENCY
80
120
VCOM = (V+) -1V
100
VCOM = (V+) -1V
VIN = 0 to V+
RL = 300Ω
85°C
100
VIN = 0 to V+
RL = 300Ω
70
85°C
60
tOFF (ns)
tON (ns)
90
80
70
25°C
60
50
25°C
40
30
-40°C
-40°C
50
20
40
10
30
1
2
3
4
5
VS (±V)
FIGURE 11. TURN - ON TIME vs SUPPLY VOLTAGE
8
6
1
2
3
4
5
VS (±V)
FIGURE 12. TURN - OFF TIME vs SUPPLY VOLTAGE
6
ISL43112, ISL43113
Typical Performance Curves TA = 25°C, VIH = V+, VIL = 0V, Unless Otherwise Specified (Continued)
4
3.5
-40°C to 85°C
VINH
3
V+ = 5V
3
2
VINH AND VINL (V)
VINH AND VINL (V)
2.5
1.5
VINH
1
0.5
VINH
V+ = 5V
VINL
2
V+ = 3.3V
VINH
V+ = 3.3V
VINL
1
0
-0.5
VINL
1
2
3
4
5
0
-5
6
-4
-3
-2
-1
V- (V)
FIGURE 13. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
FIGURE 14. DIGITAL SWITCHING POINT vs NEGATIVE
SUPPLY VOLTAGE
NORMALIZED GAIN (dB)
VS (±V)
10
VS = ±1.5V to ±5.5V
0
VS = ±1.5V to ±5.5V
20 RL = 50Ω
GAIN
30
-6
40
0
45
90
RL = 50Ω
VIN = 0.2VP-P to 2VP-P (VS = ±1.5V)
VIN = 0.2VP-P to 4VP-P (VS = ±3.3V)
VIN = 0.2VP-P to 5VP-P (VS = ±5.5V)
1
135
PHASE (DEGREES)
PHASE
180
10
100
OFF ISOLATION (dB)
-3
50
60
70
80
90
100
110
1k
600
10k
100k
FREQUENCY (MHz)
1M
10M
FREQUENCY (Hz)
FIGURE 15. FREQUENCY RESPONSE
FIGURE 16. OFF ISOLATION
25
Die Characteristics
20
SUBSTRATE POTENTIAL (POWERED UP):
V-40°C
ICC (µA)
15
TRANSISTOR COUNT:
25°C
ISL43112: 55
ISL43113: 55
10
85°C
PROCESS:
5
Si Gate CMOS
0
1
2
3
4
5
VS (±V)
FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE
9
6
100M 500M
0
ISL43112, ISL43113
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
D
INDEX
AREA
0.25(0.010) M
H
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
B M
E
INCHES
-B-
1
2
SYMBOL
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
µα
e
A1
B
0.25(0.010) M
C
C A M
B S
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
10
MILLIMETERS
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
8o
0o
N
NOTES:
MAX
A1
e
0.10(0.004)
MIN
α
8
0o
8
7
8o
Rev. 0 12/93
ISL43112, ISL43113
Small Outline Transistor Plastic Packages (SOT23-5)
P5.064
D
VIEW C
e1
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
INCHES
5
SYMBOL
4
E
CL
1
2
CL
3
e
E1
b
CL
α
0.20 (0.008) M
C
C
CL
A
A2
SEATING
PLANE
A1
-C-
WITH
b
PLATING
b1
c
c1
MILLIMETERS
MAX
MIN
MAX
NOTES
A
0.036
0.057
0.90
1.45
-
A1
0.000
0.0059
0.00
0.15
-
A2
0.036
0.051
0.90
1.30
-
b
0.012
0.020
0.30
0.50
-
b1
0.012
0.018
0.30
0.45
c
0.003
0.009
0.08
0.22
6
c1
0.003
0.008
0.08
0.20
6
D
0.111
0.118
2.80
3.00
3
E
0.103
0.118
2.60
3.00
-
E1
0.060
0.067
1.50
1.70
3
e
0.0374 Ref
0.95 Ref
-
e1
0.0748 Ref
1.90 Ref
-
L
0.10 (0.004) C
MIN
0.014
0.022
0.35
0.55
L1
0.024 Ref.
0.60 Ref.
L2
0.010 Ref.
0.25 Ref.
N
5
5
4
5
R
0.004
-
0.10
-
R1
0.004
0.010
0.10
0.25
α
0o
8o
0o
8o
Rev. 2 9/03
NOTES:
BASE METAL
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC-74 and JEDEC MO178AA.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
GAUGE PLANE
SEATING
PLANE
L
C
L1
α
L2
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
4X θ1
VIEW C
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11