TS8514VA Datasheet

TS8514VA
www.vishay.com
Vishay Semiconductors
Specification of High Power IR Emitting Diode Chip
FEATURES
• Package type: chip
• Package form: single chip
• Technology: surface emitter
• Dimensions chip (L x W x H in mm):
0.355 x 0.355 x 0.17
• Peak wavelength: λ = 850 nm
• Material categorization:
for definitions of compliance please see
www.vishay.com/doc?99912
DESCRIPTION
TS8514VA is a high power infrared, 850 nm surface emitting
diode in GaAlAs technology with high radiant power and
high speed. Polarity configuration is “n-up”.
GENERAL INFORMATION
The datasheet is based on Vishay optoelectronics sample testing under certain predetermined and assumed conditions, and is
provided for illustration purpose only. Customers are encouraged to perform testing in actual proposed packaged and used
conditions. Vishay optoelectronics die products are tested using Vishay optoelectronics based quality assurance procedures
and are manufactured using Vishay optoelectronics established processes. Estimates such as those described and set forth in
this datasheet for semiconductor die will vary depending on a number of packaging, handling, use, and other factors. Therefore
sold die may not perform on an equivalent basis to standard package products.
PRODUCT SUMMARY
COMPONENT
φe (mW)
ϕ (deg)
λp (nm)
tr (ns)
30
55
850
10
PACKAGING
REMARKS
PACKAGE FORM
Wafer sawn on foil
MOQ: 25 000 pcs
Chip
TS8514VA
Note
• Test condition see table “Basic Characteristics”
ORDERING INFORMATION
ORDERING CODE
TS8514VA-SF-F
Note
• MOQ: minimum order quantity
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
VALUE
UNIT
Forward current
IF
100
mA
Reverse voltage
VR
5
V
IFSM
1
A
Surge forward current
Junction temperature
TEST CONDITION
tp/T = 0.1, tp = 100 μs
Tj
125
°C
Operating temperature range
Tamb
-40 to +100
°C
Storage temperature range chip
Tstg1
-40 to +120
°C
Storage temperature range on foil
Tstg2
-40 to +40
°C
Rev. 1.5, 02-Mar-16
Document Number: 83407
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TS8514VA
www.vishay.com
Vishay Semiconductors
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
TYP.
MAX.
UNIT
IF = 100 mA
VF
-
1.6
1.9
V
IF = 1000 mA
VF
-
2.6
3.2
V
IF = 100 mA
φe
30
-
-
mW
IR = 10 μA
VR
10
-
-
V
IF = 100 mA
ϕ
50
55
60
deg
Forward voltage
Radiant power (1)
Reverse voltage
Angle of half intensity
Peak wavelength
IF = 100 mA
λp
830
850
870
nm
Spectral bandwidth
IF = 1000 mA
λ0.5
-
30
-
nm
Rise time / fall time
IF = 100 mA, RL = 50 Ω
tr , tf
-
10
-
ns
Note
(1) The measurements are based on samples of die which are mounted on a TO-18 gold header without resin coating
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
0°
10°
20°
0.75
0.5
0.25
0
650
750
850
0.9
50°
0.8
60°
70°
0.7
80°
950
0.6
λ - Wavelength (nm)
21776-1
40°
1.0
ϕ - Angular Displacement
30°
IF = 30 mA
Ie, rel - Relative Radiant Sensitivity
Φe, rel - Relative Radiant Power
1
0.4
0.2
0
94 8013
Fig. 1 - Relative Spectral Emission
φe rel = f (λ)
Fig. 2 - Radiant Characteristics
Irel = f(ϕ)
MECHANICAL DIMENSIONS
SYMBOL
MIN.
TYP.
MAX.
UNIT
Length of chip edge (x-direction)
PARAMETER
Lx
-
0.355
-
mm
Length of chip edge (y-direction)
Ly
-
0.355
-
mm
Die height
H
-
0.17
-
mm
Diameter of bondpad
d
-
0.100
-
mm
ADDITIONAL INFORMATION
Frontside metallization, cathode
Gold alloy
Backside metallization, anode
Gold alloy
Dicing
Die bonding technology
Sawing
Epoxy bonding
Note
• All chips are checked in accordance with the Vishay Semiconductor, specification of visual inspection FVOV6870.
The visual inspection shall be made in accordance with the “specification of visual inspection as referenced”. The visual inspection of chip
backside is performed with stereo microscope with incident light and 40x to 80x magnification.
The quality inspection (final visual inspection) is performed by production. An additional visual inspection step as special release procedure
by QM is not installed.
Rev. 1.5, 02-Mar-16
Document Number: 83407
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TS8514VA
www.vishay.com
Vishay Semiconductors
HANDLING AND STORAGE CONDITIONS
• The hermetically sealed shipment lots shall be opened in temperature and moisture controlled cleanroom environment only.
It is mandatory to follow the rules for disposition of material that can be hazardous for humans and environment.
• Product must be handled only at ESD safe workstations. Standard ESD precautions and safe work environments are as
defined in MIL-HDBK-263.
• Singulated die are not to be handled with tweezers. A vacuum wand with non metallic ESD protected tip should be used.
PACKING
Chips are fixed on adhesive foil. Upon request the foils can be mounted on plastic frame or disco frame. For shipment, the
wafers are arranged to stacks and hermetically sealed in plastic bags to ensure protection against environmental influence
(humidity and contamination).
Use for recycling reliable operators only. We can help getting in touch with your nearest sales office. By agreement we will take
back packing material, if it is sorted. You will have to bear the costs of transport. We will invoice you for any costs incurred for
packing material that is returned unsorted or which we are not obliged to accept.
Rev. 1.5, 02-Mar-16
Document Number: 83407
3
For technical questions, contact: [email protected]vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
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Vishay
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Revision: 02-Oct-12
1
Document Number: 91000