Datasheet

UNISONIC TECHNOLOGIES CO., LTD
UC3848
LINEAR INTEGRATED CIRCUIT
HIGH PERFORMANCE CURRENT
MODE CONTROLLERS
„
DESCRIPTION
The UTC UC3848 is designed to provide several special
enhancements to satisfy the needs, for example, Power-Saving mode
for low standby power (<0.3W), Frequency Hopping , Constant Output
Power Limiting , Slope Compensation ,Over Current Protection (OCP),
Over Voltage Protection (OVP), Over Load Protection (OLP), Under
Voltage Lock Out (UVLO), Short Circuit Protection (SCP) , Over
Temperature Protection (OTP) etc. IC will be shutdown or can
auto-restart in situations.
„
FEATURES
* Low Startup Current (about 22μA)
* Fixed Switching Frequency(Norm. is 68KHz)
* Frequency Hopping for Improved EMI Performance.
* Lower than 0.3W Standby Power Design
* Linearly Decreasing Frequency to 26KHz During Light Load
* Soft Start
* Internal Slope Compensation
* Constant Power Limiting for Universal AC input Range
* Gate Output Maximum Voltage Clamp(15V)
* Max Duty Cycle 74%
* Over Temperature Protection
* Overload Protection
* Over Voltage Protection
* Leading Edge Blanking
* Cycle-by-Cycle Current Limiting
* Under Voltage Lock Out
* Short Circuit Protection
„
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
UC3848L-D08-T
UC3848G-D08-T
UC3848L-S08-R
UC3848G-S08-R
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Copyright © 2011 Unisonic Technologies Co., Ltd
Package
Packing
DIP-8
SOP-8
Tube
Tape Reel
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QW-R103-033.F
UC3848
„
„
LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATION
SS 1
8 VREF
FB 2
7 VCC
CS 3
6 OUT
VIN 4
5 GND
PIN DESCRIPTION
PIN NO.
1
2
3
SYMBOL
SS
FB
CS
4
VIN
5
6
7
8
GND
OUT
VCC
VREF
FUNCTION
Soft-start
Feedback
Controller current sense input
Connected RVIN to line voltage compensating VCSTH,and providing constant output
power limiting for universal AC input Range
Ground
Output to the gate of external power MOS
Supply voltage
Inter Reference Voltage
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UC3848
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LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
VCC
7
Frequency
Hopping
OVP
UVLO
Reference voltage
8
VREF
6
OUT
Oscillator
Logic
Control
SS
1
Soft Start
Latch
Delay
Time
OTP
Burst Mode
S
Q
R
Q
Driver
OLP
FB
2
Slope
Compensation
PWM
COMP
Constant
Power Limit
5
4
GND
VIN
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Current
Limiting
LEB
3
CS
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LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS (Ta=25°C, VCC=15V, unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VCC
30
V
Input Voltage to VIN Pin
VIN
30
V
Input Voltage to FB Pin
VFB
-0.3 ~ 6.2
V
Input Voltage to CS Pin
VCS
-0.3 ~ 2.8
V
Junction Temperature
TJ
+150
°C
Operating Temperature
TOPR
-40 ~ +125
°C
Storage Temperature
TSTG
-50 ~ +150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
„
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Supply Voltage
„
SYMBOL
VCC
RATINGS
8.2 ~ 22
UNIT
V
ELECTRICAL CHARACTERISTICS (Ta=25°C, VCC=15V, unless otherwise specified)
PARAMETER
SUPPLY SECTION
Start Up Current
OFF
Supply Current with switch
ON
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold Voltage
Min. Operating Voltage
Hysteresis
INTERNAL VOLTAGE REFERENCE
Reference Voltage
CONTROL SECTION
VFB Operating Level
Burst-Mode Enter FB Voltage
Reduce-Frequency end FB Voltage
Burst-Mode Out FB Voltage
Normal
Switch Frequency
Power-Saving
Duty Cycle
Feedback Resistor
Soft-Start Time
PROTECTION SECTION
OVP threshold
OLP threshold
Delay Time Of OLP
OTP threshold
OVP Disable threshold
OLP Enable threshold
CURRENT LIMITING SECTION
LEB
Peak Current Limitation
Threshold Voltage For IVIN=60uA
DRIVER OUTPUT SECTION
Output Voltage Low State
Output Voltage High State
Output Voltage Rise Time
Output Voltage Fall Time
SYMBOL
ISTR
IOFF
ION
TEST CONDITIONS
Measured at pin VREF
VMIN
VMAX
VFB-IN VCS=0
VFB-END VCS=0
VFB-out VCS=0
VFB = 4V
F(SW)
Before enter burst mode
DMAX VFB=4.4V,VCS=0
DMIN VFB < 0.5V
VFB =0V
RFB
CSS=0.47uF
TSS
VOVP1
VOVP1
VFB(OLP)
TD-OLP
T(THR)
VSS(DEACT)
VSS(ACT)
tLEB
VCS
VSENSE-L
VOL
VOH
tR
tF
VSS < 3.5V, VFB > 5V
VSS=4.8V,VFB=3V
VCS > 0V, SS Open
CSS=0.47uF
VFB > 5V, VCC=22V
VFB > 5V
MAX
UNIT
22
7
7
45
9
9
μA
mA
mA
13.5
7.5
14.2
8.2
6
15
9
V
V
V
6.3
6.5
6.7
V
0.5
4.4
ISOURCE = 200 mA
ISINK = 200 mA
CL = 1.0 nF
CL = 1.0 nF
1.5
1.6
1.7
68
61
20
68
0
16
9.9
74
75
40
80
21
11.2
26
12.6
4.7
55
120
3.9
5.1
19
28
4.9
62
135
4.1
5.4
220
0.86
0.77
VFB=4.4V
IVIN=60uA
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TYP
VCC=VTHD(ON)-0.1V
VSS = 0, IFB = 0
VSS = 5V, IFB = 0
VTHD(ON)
VCC(MIN)
VCC(HY)
VREF
MIN
V
5.1
70
150
4.3
5.7
V
mS
°C
V
V
1
ns
V
V
2.5
12.2
200
50
V
V
V
V
V
kHz
kHz
%
%
kΩ
ms
300
90
V
V
ns
ns
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UC3848
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LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION
The internal reference voltages and bias circuit work at VCC> VTHD (ON), and shutdown at VCC<VCC (MIN).
(1) Soft-Start
When every IC power on, driver output duty cycle will be decided by voltage VSS on soft-start capacitor and VCS
on current sense resistor at beginning. After VSS reach 4.2V, the whole soft-start phase end, and driver duty cycle
depend on VFB and VCS. The relation among VSS, VFB and VOUT as followed FIG.3.
Furthermore, soft-start phase should end before VCC reach VCC (MIN) during VCC power on. Otherwise, if soft-start
phase remain not end before VCC reach VCC (MIN) during VCC power on, IC will enter auto-restart phase and not set up
VOUT. So the value of CSS should be between 0.1μFand 4.7μF.
Finally soft-start also set OVP1 active phase. OVP1 active phase between 0 and VSS(DEACT), OVP1 will not be
sensed after VSS reach VSS(DEACT).The Soft-start phase TSS:TSS = 23.8×CSS (ms) (Example: CSS=0.47μF, then
TSS=23.8×0.47=11.2ms).
FIG.3 Soft-start phase
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LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION(Cont.)
(2) Switch Frequency Set
The maximum switch frequency is set to 68kHz. Switch frequency is modulated by output power POUT during IC
operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from
switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the subber circuit. The
magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower
switch frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light
load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between fSW
and POUT/POUT (MAX) as followed FIG.4.
FIG.4 The relation curve between fSW and relative output power POUT/ POUT (MAX)
(3) Internal Synchronized Slope Compensation
Built-in slope compensation circuit adds voltage ramp onto the current sense input voltage for PWM
generation, this greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation and thus
reduces the output ripple voltage.
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UC3848
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LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION(Cont.)
(4) Frequency Hopping For EMI Improvement
The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator
is to set the normal switching frequency; the switching frequency is modulated with a period signal generated by the
2nd oscillator. The relation between the first oscillator and the 2nd oscillator as followed FIG.5. So the tone energy is
evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design
in meeting stringent EMI requirement.
FIG.5 Frequency Hopping
(5) Constant Output Power Limit
When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around 0.8V, the output
GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional
current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is
adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor RVIN, a
higher line voltage will generate higher VIN current into the VIN pin. The threshold voltage is decreased if the VIN
current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the
total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal
compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC.
(6) Driver Output Section
The driver-stage drives the gate of the MOSFET and is optimized to minimize EMI and to provide high circuit
efficiency. This is done by reducing the switch on slope when reaching the MOSFET threshold. This is achieved by a
slope control of the rising edge at the driver’s output. The output driver is clamped by an internal 15V Zener diode in
order to protect power MOSFET transistors against undesirable gate over voltage.
(7) Protection section
The IC takes on more protection functions such as OLP, OVP and OTP etc. In case of those failure modes for
continual blanking time, the driver is shut down. At the same time, IC enters auto-restart, VCC power on and driver is
reset after VCC power on again.
OTP
OTP will shut down driver when junction temperature TJ>T (THR) for continual a blanking time.
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LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION(Cont.)
(7)Protection section (Cont.)
OLP
After soft-start phase end, IC will shutdown driver if over load state occurs for continual TD-OLP. OLP function will
not inactive during soft-start phase. OLP case as followed FIG. 6. The test circuit as followed FIG.8. TD-OLP=5.53×TSS.
OVP
There are two kinds of OVP circuits, the first OVP function are enabled only when VSS<VSS (DEACT) &
VFB>VFB(OLP) during soft-start phase. During above condition, driver will be shutdown if over voltage state occurs
(VCC>VOVP1) for continual a blanking time. The first OVP function will not inactive after soft-start phase. The second
OVP will shutdown the switching of the power MOSFET whenever VCC>VOVP2. The first OVP case as followed FIG.7.
The test circuit as followed FIG. 9.
FIG.6 OLP case
FIG.7 OVP case
FIG.8 OLP test circuit
FIG.9 OVP test circuit
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UC3848
„
LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION CIRCUIT
YC1
C8
R6
LINE
F1
ZNR1
L1
R1
XC1
2 4
4
1
3
R2
BD1
3
10
R3
1
C1
t°
NEUT
2
R5
L3
R11
3
C5
LD1
C10
1
2
3
4
12V/1.25A
15W
GND
8
D3 7
7
VCC
IC1
OUT
1
R4
D2
C4
9
D1
R12
VIN
C2
L2
1
2
4
TR1
4
T1
SS
FB
GND
5
M1
C3
6
6
R7
2
R14
R10
IC2
CS 3
C6
R13
4
1
3
2
C7
C9
R8
IC3
R9
FIG.12 UC3848 Typical Application Circuit
Table1 Components Reference description for UC3848 application circuit
DESIGNATOR PART TYPE
DESIGNATOR PART TYPE
DESIGNATOR PART TYPE
C1
33μF
R1
2.2MΩ
D1
FR107
C2
0.001μF
R2
2.2MΩ
D2
SB5100
C3
22μF
R3
68KΩ
D3
RS1D
UC3848
C4
470μF
R4
100Ω
IC1
C5
470μF
R5
1MΩ
IC2
PC-817
C6
0.1μF
R6
15Ω
IC3
TL431
C7
0.01μF
R7
560Ω
YC1
222
C8
0.001μF
R8
1KΩ
T1
EE25
C9
0.1μF
R9
3.9KΩ
L1
UU10.5
C10
220μF
R10
15KΩ
L2
2μH
R11
10KΩ
L3
Ring Choke
R12
1.5MΩ~4MΩ
LD1
LED
R13
1.0Ω
F1
2A/250V
R14
1.8KΩ
ZNR1
7D471K
TR1
SCK102R55A
XC1
334/275V
BD1
KBP205
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UC3848
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
„
12V
Feedback Voltage During Loadjump From
10% Up To 100% Load (VAC=90V)
12V
10V
10V
8V
8V
6V
6V
4V
4V
2V
2V
0
0
-2V
-2V
0
2000
Time (400μs/div)
4000
Startup With Full Load Condition at
VAC=90V, VSS and VOUT
8V
Feedback Voltage During Loadjump From
10% Up To 100% Load (VAC=264V)
0
Startup With Full Load Condition at
VAC=264V, VSS and VOUT
8V
6V
6V
4V
4V
2V
2V
VSS
0
4000
2000
Time (400μs/div)
VSS
0
10V
10V
5V
5V
VOUT
0
50
Time (10ms/div)
0
100
Startup Behavior At Nominal Load
Condition VAC=90V
8V
VOUT
0
Startup Behavior At Nominal Load
Condition VAC=264V
8V
6V
6V
4V
4V
100
50
Time (10ms/div)
0
2V
2V
VSS
0
VSS
0
4V
4V
2V
2V
VFB
0
0
VFB
0
20
Time (4ms/div)
40
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0
20
Time (4ms/div)
40
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LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS(Cont.)
Frequency vs. Output Power
0.8
80
0.7
60
NO Load Input Power vs. Line Voltage
(Normal Mode)
Input Power NODC Input Voltage, VIN(V)
Load (PoUT=0W)
0.6
0.5
40
0.4
VAC=90V
0.3
20
0.2
0.1
0
0
0
1
2
3 4 5 6 7 8
Output Power, POUT(W)
9
10
200
250
150
100
AC Input Voltage, VIN (V)
300
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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