Datasheet

UNISONIC TECHNOLOGIES CO., LTD
L8200
Preliminary
LINEAR INTEGRATED CIRCUIT
SINGLE LNB-BIAS, CONTROL
AND POWER MANAGEMENT
SOLUTION

DESCRIPTION
The UTC L8200 is a single chip power management and
control solution for LNB’s. The highly integrated solution provides
all the required FET and mixer bias, control detection and
decoding, local oscillator switching and a stable power supply for
the IF amplifier, and additional support functions. Packaged in a
small 16 pin QFN package or 16 pin TSSOP package the UTC
L8200 only requires 3 external components providing a very small
compact solution. Being at the heart of the LNB monitoring the
control, power management and environmental conditions the
UTC L8200 is able to provide reliable solution eliminating effects
such as false switching and over loading.

FEATURES
* Single chip LNB bias, control and power management
* Integrated regulated supply for LNB
* Zero Gate FET switching
* Voltage detection for polarization switching
* 22kHz tone detector with signal rejection for band switching
* Programmable mixer and FET bias

ORDERING INFORMATION
Ordering Number
L8200G-P16-R
L8200G-Q16-3030-R
L8200G-P16-R
(1)Packing Type
(2)Package Type
(3)Green Package

Package
TSSOP-16
QFN-16(3×3)
Packing
Tape Reel
Tape Reel
(1) R: Tape Reel
(2) P16: TSSOP-16, Q16-3030: QFN-16(3×3)
(3) G: Halogen Free and Lead Free
MARKING
TSSOP-16
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Copyright © 2015 Unisonic Technologies Co., Ltd
QFN-16(3×3)
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QW-R123-017.e
L8200

Preliminary
LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATION
RCALA
D1
2
15
RCALM
D2
3
14
GND
12
VOUT
D1 2
11
HB
10
LB
GND
D3
5
12
VOUT
D2 3
G3
6
11
HB
G2 4
DM
7
10
LB
5
6
7
8
GM
8
9
CSUB
GM
VIN
G1 1
DM
13
13
G3
4
16 15 14
D3
G2
VIN
16
GND
1
RcalM
G1
RcalA
Top View
9
CSUB
QFN-16(3×3)

PIN DESCRIPTION
Pin No.
TSSOP-16
QFN-16(3×3)
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
PIN NAME
G1
D1
D2
G2
D3
G3
DM
GM
CSUB
LB
HB
VOUT
VIN
GND
RCALM
RCALA
DESCRIPTION
To G of fet 1
To D of fet 1
To D of fet 2
To G of fet 2
To D of fet 3
To G of fet 3
To Drain of mix fet
To Gate of mix fet
connect an external cap to produce -2.5V
To LB OSC.
To HB OSC.
5V voltage output terminal
Power supply(include both voltage and tone signal)
GND
Connect 22kohm to set Idm to 10mA
Connect 22kohm to set Id1, Id2, Id3 to 10mA
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QW-R123-017.e
L8200

Preliminary
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATING
PARAMETER
RATINGS
UNIT
-0.6~25 continuous
V
120
mA
TSSOP-16
1.3
W
Power Dissipation
PD
QFN-16(3×3)
2
W
Operating Temperature Range
TOPR
-40~+85
°C
Storage Temperature Range
TSTG
-40~+150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
Supply Voltage
Supply Current

SYMBOL
VIN
IIN
ELECTRICAL CHARACTERISTICS
Measured at TA=25°C, VIN=13V, RCALA=RCALM=22kΩ(setting lds to 10 mA) unless otherwise specified.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
Supply Voltage Operating Range
VIN
8
22
Supply Current
No Load Supply Current (Note 1)
ID1=ID2=IDM=0mA
2
3
Max Total Load Current
QFN-16(3×3)
80
ICC
Max Bias Load Current (Note 2)
ID1 or ID2+ ID3+IDM
40
Max Osc Load Current (Note 2)
LB or HB
50
Max Iout Load Current (Note 2)
50
VOUT
VOUT
VIN=10.5V~21V, IOUT=30mA
4.75
5
5.25
(Internally generated)
-3.0
-2.5
-2.0
ISUB=0mA
Substrate Voltage
VSUB
ISUB=-20uA
-2.0
VPOL Threshold
VPOL
Applied via VIN pin
14.1
14.7
15.4
Pol Switching Speed
TPOL
VIN_Low=13V, VIN_High=18V
1
Output Noise
CGATE-GND =4.7nF
0.02
Drain Voltage
CDRAIN-GND =10nF
ICGATE-GND =4.7nF
0.005
Gate Voltage
CDRAIN-GND =10nF
Tone Detector
Tdetect Threshold
VTONE
Test Circuit 1
100
170
300
Test Circuit 1,
1.0
7.5
Rejection Freq (Note 3)
V(AC)IN=1Vp/p sq.w.
LO Output Stage
II=0, Test Circuit 1
-0.05
0
0.05
LB VOUT Low
Tone enabled
VLB
II=50mA, Test Circuit 1
4.5
5.0
5.25
LB VOUT High
Tone enabled
II=0, Test Circuit 1
-0.05
0
0.05
HB VOUT Low
Tone enabled
VHB
II=50mA, Test Circuit 1
4.5
5.0
5.25
HB VOUT High
Tone enabled
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UNIT
V
mA
mA
mA
mA
mA
V
V
V
V
ms
Vpk-pk
Vpk-pk
mV
kHz
V
V
V
V
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L8200

Preliminary
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS (Cont.)
PARAMETER
Gate Characteristics
G1 Output
Voltage Off
SYMBOL
VGIO
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ID1=0, VIN=14V, IG1=0
VIN=15.5V, ID1≤12mA,
IG1=-10uA
VIN=15.5V, ID1≥8mA, IG1=0
-0.05
0
0.05
V
-3.0
-2.5
-2.0
V
0.4
0.65
1.0
V
-0.05
0
0.05
V
-3.0
-2.5
-2.0
V
0.4
0.65
1.0
V
Voltage Low
VGIL
Voltage High
G2 Output
Voltage Off
VGIH
VG2O
Voltage Low
VG2L
Voltage High
G3 Output
Voltage Low
Voltage High
Drain Characteristics
D1 Output
Voltage High
Leakage Current
D2 Output
Voltage High
Leakage Current
D3 Output
Voltage High
Dm Output
Voltage High
D1, 2, 3 and M
Delta VD vs. VIN
Delta VD vs. TJ
FET Current Range
Mixer Current Range
VG2H
VIN =15.5V, ID2=0, IG2=0
VIN=14V, ID2≤12mA,
IG2=-10uA
VIN=14V, ID2≥8mA, IG2=0
VG3L
VG3H
ID3/m≤12mA, IG3/m=-10uA
ID3/m≥8mA,IG3/m=0
-3.0
0.4
-2.5
0.5
-2.0
1.0
V
V
VD1
ILEAK1
VIN=15.5V, ID1=10mA
VIN=14V, VD1=0.5
1.8
2.0
2.2
10
V
uA
VD2
ILEAK2
VIN=14V, ID2=10mA
VIN=15.5V, VD2=0.5
1.8
2.0
2.2
10
V
uA
VD3
VIN=15.5V, ID3=10mA
1.8
2.0
2.2
V
VDM
IDM=10mA
0.5
0.6
0.7
V
15
10
%/V
ppm
mA
mA
12
mA
∆VDV
∆VDT
VIN=9~21V
0.5
TJ= -40 ~ +85°C
50
ID1, ID2 & ID3
0
IDM
0
ID1, ID2, ID3 & IDM,
8
10
Drain Current
ID
RCALA & RCALM=22kΩ
Delta ID vs. VCC
∆IDV
VCC=9~21V
0.5
Delta ID vs. TJ
∆IDT
TJ=-40~+85°C
0.05
Notes: 1. These parameters are related to RCAL values.
2. The total combined load currents should not exceed the stated maximum load current.
3. The UTC L8200 series will also reject DiSEqC and other common switching tone bursts.
UNISONIC TECHNOLOGIES CO., LTD
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%/V
%/°C
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L8200
Preliminary
LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION CIRCUIT

L*
22kΩ
22kΩ
L*
C2
10nF
Power supply for IF Amps
VOUT
G1
C*
LNB power and tone signal
VIN
GND
RcalA
JF1
RcalM
C1
10nF
C*
RH1
HB
D1
UTC L8200
D2
RL1
LB
CSUB
G2
CH1
GM
G3
DM
D3
RH2
To other FET stages
47nF
RL2
CL1
QH
QL
* Stripline Elements
9.75GHz Local Osc.
10.6GHz Local Osc.
Capacitors C1 and C2 ensure that residual power supply and substrate generator noise is not allowed to affect
other external circuits which may be sensitive to RF interference. They also serve to suppress any potential RF feed
through between stages via the UTC L8200. These capacitors are required for all stages used. Values of 10nF and
4.7nF respectively are recommended however this is design dependent and any value between 1nF and 100nF
could be used. The capacitor CSUB is an integral part of the UTC L8200 ’s negative supply generator. The negative
bias voltage is generated on-chip using an internal oscillator. The required value of capacitor CSUB is 47nF. This
generator produces a low current supply of approximately -3V. Although this generator is intended purely to bias the
external FETs, it can be used to power other external low current circuits via the CSUB pin. Resistor RCALA sets the
drain current at which all external amplifier FETs are operated and RCALM sets the mixer bias current. If any bias
control circuit is not required, its related drain and gate connections may be left open circuit without affecting the
operation of the remaining bias circuits. The UTC L8200 have been designed to protect the external FETs form
adverse operating conditions. With a JFET connected to any bias circuit, the gate output voltage of the bias circuit
can not exceed the range -3.0V~1V under any conditions, including power up and power down transients. Should
the negative bias generator be shorted or overloaded so that the drain current of the external FETs can no longer be
controlled, the drain supply to FETs is shut down to avoid damage to the FETs by excessive drain current. UTC
L8200 incorporates over and under voltage protection so is the receiver or installation develops a fault the LNB will
shut down and restart once operating conditions are back to normal.
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L8200

Preliminary
LINEAR INTEGRATED CIRCUIT
SINGLE UNIVERSAL BLOCK DIAGRAM
The following block diagram below shows the main elements of a single universal LNB. A single chip solution
provides all the FET and mixer bias, control signal detect for polarization and band selection and all the necessary
power management functions required within a single universal LNB.
IF Gain Stage
Gain Stages
GaAs/HEMT FET
Active
Mixer
Set-top Box
Receiver
Vertical
UTC
L8200
LB Osc
Horizontal
HB Osc
VOUT
VIN
Polarization and band switching on the UTC L8200 uses the standard 13~17V and 22kHz as defined by Astra.
The exception is that the devices voltage detector has a much tighter tolerance than required to increase field
reliability.
The single VIN pin is used internally for three functions, LNB and IC power supply, voltage detection and tone
detection. The IC’s is self powering via an internal regulator which utilizes the 13~17V control voltage from the
satellite receiver. The regulated voltage is used to supply the IC and is also outputted to the VOUT pin to provide the
power supply for the remaining element of the LNB such as the IF amplifiers. The 13~17V from the receiver is feed
via a tight tolerance voltage detector with integrated filtering which removes unwanted signals or interference. The
results from the detectors output enables one of 2 bias circuits to turn one of either Fet1 or FET2 on. The internal
tone detector allows the device to detect the 22kHz tone which is superimposed on the LNB power line (13~17V
signal), this is achieved with no external filtering components. The tone detector rejects all unwanted signals
including transients from other parts of the LNB system. The tone detector controls a drive circuits which powers and
one of two oscillators, normally used to switch between low and high band in universal applications. The functional
table below shows the operation of the FET and Mixer bias, oscillator output and the LNB power supply.

FUNCTION TABLE
INPUTS
VIN (V)
FIN (kHZ)
<14.1
0
>15.4
0
<14.1
22
>15.4
22
FET1
Disabled
Active
Disabled
Active
FET2
Active
Disabled
Active
Disabled
FET3
Active
Active
Active
Active
OUTPUTS
MIXER
Active
Active
Active
Active
LB(V)
5.0
5.0
0
0
HB(V)
0
5.0
5.0
VOUT (V)
5.0
5.0
5.0
5.0
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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