UNISONIC TECHNOLOGIES CO., LTD UC3856 LINEAR INTEGRATED CIRCUIT LOW COST POWER-SAVING MODE PWM CONTROLLER FOR FLYBACK CONVERTERS DESCRIPTION The UTC UC3856 is a high performance current mode PWM controller ideally suited for low standby power. An externally JFET’s gate pin is connected the ST pin, It can achieve HV start, and when start was overed, it is no long consume current to depress the power off. Low VDD startup current make the power reliable on startup design and a large value resistor could be used in the startup circuit to minimize the standby power. At no load condition, the IC operates in power-saving mode for lower standby power, decreasing frequency for Higher conversion efficiency at light load condition. The UTC UC3856 contains protection with automatic recovery including OLP (over load protection), OTP (over temperature protection), OVP (over voltage protection), UVLO (VDD over voltage clamp and under voltage lockout).To protect the power MOSFET, Gate-drive output is fixed up to 15V max. The UTC UC3856 contains protection OCP (cycle-by-cycle current limiting). The internal slope compensation improves system stability at high PWM duty cycle output. Leading-edge blanking on current sense input removes the signal glitch, which offering minimal external component count in the design. Excellent EMI performance is achieved with UTC proprietary frequency hopping technique (ZL201020615247.1) together with soft driver control. Audio noise is eliminated due to switch frequency more than 20kHz during operation. The UTC UC3856 has such applications as: battery charger, power adaptor, set-top box power supplies, ink jet printers, open-frame SMPS. FEATURES * UTC proprietary frequency hopping technology for Improved EMI performance. * Power-saving mode for high light-load and standby efficiency * Dynamic peak current limiting for constant output power * Built-in synchronized slope compensation * OTP,OLP,OVP and VDD clamp for higher security * High efficiency HV start * Gate output voltage clamped at 15V * Low start-up current * Cycle-by-cycle current limiting * Under voltage lockout (UVLO) * Few external components required ORDERING INFORMATION Ordering Number UC3856G-AG6-R www.unisonic.com.tw Copyright © 2015 Unisonic Technologies Co., Ltd Package SOT-26 Packing Tape Reel 1 of 10 QW-R103-077.D UC3856 LINEAR INTEGRATED CIRCUIT MARKING PIN CONFIGURATION PIN DESCRIPTION PIN NO. 1 PIN NAME GND PIN TYPE P 2 FB I 3 ST I 4 SENSE I 5 6 VDD GATE P O DESCRIPTION Ground. Feedback input pin. The PWM duty cycle is determined by voltage level into this pin and SENSE pin input. A high voltage start pin. An externally JFET’s gate pin is connected this pin, It can achieve HV start, and when start was overed, it is no long consume current. Current sense input pin. Connected to MOSFET current sensing resistor node. Power supply. The totem-pole output driver for driving the power MOSFET. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 10 QW-R103-077.D UC3856 LINEAR INTEGRATED CIRCUIT BLOCK DIAGRAM UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 10 QW-R103-077.D UC3856 LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS (TA=25°C, VDD =15V, unless otherwise specified) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VDD 30 V Input Voltage to FB Pin VFB -0.3~7 V Input Voltage to CS Pin VSENSE -0.3~7 V Junction Temperature TJ +150 C Operating Temperature TOPR -40~+125 °C Storage Temperature TSTG -50~+150 C Notes: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. OPERATING RANGE PARAMETER SYMBOL VDD Supply Voltage RATINGS 10~26 UNIT V ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=15V, RI =100KΩ，unless otherwise specified) PARAMETER HV START Supply Current from ST Pin Start Pin Leakage Current After Startup SUPPLY SECTION Start Up Current IC Operating current VDD Over Voltage Protection UNDER-VOLTAGE LOCKOUT SECTION Start Threshold Voltage Min. Operating Voltage CONTROL SECTION VFB Open Loop Voltage Level PWM Input Gain Burst-Mode Out FB Voltage Reduce-Frequency end FB Voltage Burst-Mode Enter FB Voltage Normal Switch Frequency Power-Saving Duty Cycle Frequency Hopping Frequency VDD Stability Frequency Temperature Stability Feedback Resistor PROTECTION SECTION VCC Over Voltage Protection Threshold FB PIN Over Load Protection Threshold Over Load Protection Delay-Time OTP threshold CURRENT LIMITING SECTION Over Current Flat Threshold Voltage Lead Edge Blanking Time DRIVER OUTPUT SECTION Output Voltage Low State Output Voltage High State Output Voltage Rise Time Output Voltage Fall Time SYMBOL MIN TYP MAX UNIT 2 2.8 5 10 mA μA 26.5 5 1.5 28 20 5 29.5 μA mA V VTHD(ON) VDD(MIN) 12 5.5 13 6.5 14 7.5 V V VFB-OPEN AVCS VFB(OUT) VFB(END) VFB(IN) 5.15 5.45 3 1.87 2.5 1.56 62 22 75 5.75 V V/V V V V KHz KHz % % % % KΩ IST IEAKAGE ISTR IOP VDD_CLAMP FSW DMAX FJ(SW) FDV FDT RFB VOVP VOLP TDelay T(THR) VDD=VDD(ON)-0.1V VFB=3.5V I_CLAMP=20mA ∆VFB/∆VCS VSENSE =0 VSENSE =0 VSENSE =0 VFB=3.5V, RI=100KΩ Before enter burst mode VFB=3.5V, VSENSE=0 55 -4 VDD=12V~20V T=-20~100°C 1.5 11 4.0 VFB=3~5V (OLP) VFB=4.2V VCS TLEB VFB=4.2V VOL VOH tR tF VDD=16,IO=-20mA VDD=16,IO=20mA CL=1.0nF CL=1.0nF UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw TEST CONDITIONS 0.65 27.2 4.5 98 145 0.75 400 10 110 70 67 +4 5 5 5.5 V V mS °C 0.85 V ns 0.8 V V ns ns 4 of 10 QW-R103-077.D UC3856 LINEAR INTEGRATED CIRCUIT OPERATION DESCRIPTION The UTC UC3856 devices integrate many useful designs into one controller for low-power switch-mode power supplies. The following descriptions highlight some of the features of the UTC UC3856 series. HV Start A high voltage start pin. An externally JFET’s gate pin is connected this pin, It can achieve HV start, and when start was overed, it is no long consume current. Start-up Current The start-up current is only 5μA. Low start-up current allows a start-up resistor with a high resistance and a low-wattage to supply the start-up power for the controller. For AC/DC adaptor with universal input range design, a 2.5~3MΩ, 1/8W startup resistor could be used together with a VDD capacitor to provide a fast startup and low power dissipation solution. Power-Saving Mode Operation The proprietary Power-Saving Mode function provides linearly decreasing the switching frequency under light-load conditions for higher efficiency. The feedback voltage, which is sampled from the voltage feedback loop, is taken as the reference. Once the feedback voltage dropped below the threshold voltage, the switching frequency starts to decrease. This Power-Saving Mode function dramatically reduces power consumption under light-load conditions. The 22KHz minimum frequency control also eliminates the audio noise at any loading conditions. At zero load condition, the magnitude of power loss is in proportion to the number of switching events within a fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the energy. The UTC UC3856 enter burst mode at standby condition to minimize the switching loss and reduces the standby power consumption. Power supplies using the UTC UC3856 can easily meet even the strictest regulations regarding standby power consumption. Switch Frequency Set The maximum switch frequency is set through the 100KΩ RI-pin resistor to 62KHz. Switch frequency is modulated by output power POUT during IC operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower switch frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between fSW and POUT/POUT (MAX) as followed Fig.1. The maximum switch frequency is set through the RI-pin resistor RI: FSW=6200/RI (KΩ) KHz. Fig.1 The relation curve between fSW and relative output power POUT/ POUT (MAX) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 10 QW-R103-077.D UC3856 LINEAR INTEGRATED CIRCUIT OPERATION DESCRIPTION (Cont.) Frequency Hopping For EMI Improvement The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd oscillator. The relation between the first oscillator and the 2nd oscillator as followed Fig.2. So the tone energy is evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design in meeting stringent EMI requirement. Fig.2 Frequency Hopping Built-in Slope Compensation Built-in slope compensation circuit greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation. Leading-Edge Blanking Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid premature termination of the switching pulse, a 400ns leading-edge blanking time is built in. Conventional RC filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and it cannot switch off the gate driver. Constant Output Power Limit When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around 0.8V, the output GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor RVIN, a higher line voltage will generate higher VIN current into the VIN pin. The threshold voltage is decreased if the VIN current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC. Under Voltage Lockout (UVLO) The turn-on and turn-off thresholds of the UTC UC3856 are fixed internally at 15.8V/10V. During start-up, the hold-up capacitor must be charged to 15.8V through the start-up resistor, so that the UTC UC3856 will be enabled. The hold-up capacitor will continue to supply VDD until power can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 10V during this start-up process. This UVLO hysteresis window ensures that hold-up capacitor will be adequate to supply VDD during start-up. Gate Output The UTC UC3856 output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. A good tradeoff is achieved through dead time control. The low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal 15V clamp is added for MOSFET gate protection at higher than expected VDD input. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 10 QW-R103-077.D UC3856 LINEAR INTEGRATED CIRCUIT OPERATION DESCRIPTION (Cont.) Protection Controls The IC takes on more protection functions such as OVP, OLP and OTP etc. In case of those failure modes for continual blanking time, the driver is shut down. Driver is reset after failure is eliminated. OVP The OVP will shut down the switching of the power MOSFET whenever VDD >VOVP. The OVP event as followed Fig.3. Fig.3 OVP case Fig.4 OLP case OLP OLP will shut down driver when VFB> VOLP for continual a blanking time. The OLP event as followed Fig.4. OTP OTP will shut down driver when junction temperature TJ>T (THR). PCB Layout Note Noise from the current sense or the control signal can cause significant pulse width jitter in continuous-conduction mode, and slope compensation helps alleviate these problems. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the UTC UC3856, and increasing the power MOS gate resistance is advised. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 10 QW-R103-077.D UC3856 L LINEAR INTEGRATED CIRCUIT REFRENCE CIRCUIT (12V/2A) F1 L2 1 R1 CX1 BD1 2 + 4 R2 C2 C3 R9 R3 D5 T1 1, 2 L1 1 2 VO 10 N 3 D2 Q2 U1 1 2 3 C8 1 GND GATE VDD FB ST SENSE D4 2 R6 5 4 R8 22 + C9 5 C10 Q1 + C11 + C13 3 7 GND 3, 4 R7 R5 C5 R10 8 R4 1 6 9 D3 1 2 R12 C4 U3 4 3 R15 1 2 R13 R14 3 CY1 C7 C12 U2 R16 2 BOM Reference BD1 CX1 (Optional) CY1 (Optional) C2 C3 C4 C5 C7 C8 C9 C10 C11 C12 C13 D2 D3 D4 (Optional) D5 F1 L1 L2 Component 1N4007×4 0.01μF YC 102P 400V (Y1) EC 33μF 400V 105°C CC 0.001μF 1000V EC 10μF 50V CC 1μF 50V 10nF 25V CC 1nF 25V NC EC 470μF 25V EC 220μF 25V 0.1μF/25V 0603 0.47μF 1206 50V Diode 1N4007G BAS21 1N4148 MBR20100C 2A/250V NC (Short) Choke UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw Reference Q1 Q2 R1 R2 R3 R4 (Optional) R5 R6 R7 R8 R9 R10 R12 R13 R14 R15 R16 T1 U1 U2 U3 Component 4N60 UF601 NC NC 400kΩ1206 10Ω 0603 3Ω 0805 47Ω 0805 0.66Ω 1W 10kΩ 0603 100kΩ 1206 NC 220Ω 0603 1KΩ 0603 680Ω 0603 39kΩ 0603 10kΩ 0603 RM8 IC UC3856 TL431 PC817 8 of 10 QW-R103-077.D UC3856 LINEAR INTEGRATED CIRCUIT TYPICAL CHARACTERISTICS ST PIN (CH1: ST, CH2: GATE, CH3: VDD) Power Limiting Debounce Time (CH1: GATE, CH2: VDD) CH2: 10V/div 0 CH3 CH1: 5V/div CH1: 5V/div CH3: 10V/div CH2: 10V/div CH2 0 0 CH1 0 5 Time (1s/div) 10 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw CH2 0 CH1 0 0 100 Time (20ms/div) 200 9 of 10 QW-R103-077.D UC3856 LINEAR INTEGRATED CIRCUIT TYPICAL CHARACTERISTICS (Cont.) CH1: 5V/div UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 10 of 10 QW-R103-077.D