UNISONIC TECHNOLOGIES CO., LTD UC3800 Preliminary LINEAR INTEGRATED CIRCUIT LOW COST POWER-SAVING MODE PWM CONTROLLER FOR FLYBACK CONVERTERS DESCRIPTION The UTC UC3800 is a high performance current mode PWM controller ideally suited for low standby power. High voltage startup is implemented in UTC UC3800, which features with short startup time and no standby current. At no load condition, the IC operates in power-saving mode for lower standby power, decreasing frequency for higher conversion efficiency at light load condition. The internal slope compensation improves system stability at high PWM duty cycle output. Leading-edge blanking on current sense input removes the signal glitch, which offering minimal external component count in the design. Excellent EMI performance is achieved with UTC proprietary frequency hopping technique (ZL201020615247.1) together with soft driver control. Audio noise is eliminated due to switch frequency more than 20kHz during operation. The UTC UC3800 has such applications as: battery charger, power adaptor, set-top box power supplies, ink jet printers, open-frame SMPS. FEATURES * UTC proprietary frequency hopping technology for Improved EMI performance. * Power-saving mode for high light-load and standby efficiency * Soft Start * Dynamic peak current limiting for constant output power * Built-in synchronized slope compensation * OTP,OLP,OVP, LNO-OV, Brownout and VDD clamp for higher security SOP-8 * Fixed switch frequency 65kHz * Gate output voltage clamped at 16V * Low start-up current * Cycle-by-cycle Current Limiting * Under voltage lockout (UVLO) * Few external components required ORDERING INFORMATION Ordering Number UC3800G-S08-R www.unisonic.com.tw Copyright © 2016 Unisonic Technologies Co., Ltd Package SOP-8 Packing Tape Reel 1 of 10 QW-R103-083.b UC3800 Preliminary MARKING PIN CONFIGURATION PIN DESCRIPTION PIN NO. 1 2 3 PIN NAME GATE VDD CS 4 LNO 5 FB 6 7 8 GND NC HV LINEAR INTEGRATED CIRCUIT PIN TYPE DESCRIPTION O Totem-pole gate driver output for power MOSFET. P Supply voltage I Current sense input. This pin is connected to the line input via two resistors to achieve line I voltage over protect function and Brownout The PWM duty cycle is determined by voltage level into this pin and the I current-sense signal at CS pin. P Ground. I Connected to the line input or bulk capacitor via resistor for setup. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 10 QW-R103-083.b UC3800 Preliminary LINEAR INTEGRATED CIRCUIT BLOCK DIAGRAM HV HV Start Driver Internal supply Soft Start EN VDD GATE Green Mode OCP UVLO OSC OVP Logic Clamp EN R S Q Burst Mode Q Slope Compensation - R + - Vth_OLP 2R + OLP Comparator OVP CS PWM Comparator S Delay LEB FB R Delay LNO + - Vth_LNO GND UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 10 QW-R103-083.b UC3800 Preliminary LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS (TA=25°C, VDD =16V, unless otherwise specified) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VDD 30 V Input Voltage to FB Pin VFB -0.3~6 V Input Voltage to CS Pin VSENSE -0.3~6 V Junction Temperature TJ +150 C Operating Temperature TOPR -40~+125 °C Storage Temperature TSTG -50~+150 C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. OPERATING RANGE PARAMETER Supply Voltage SYMBOL VDD RATINGS 9~24 UNIT V THERMAL DATA PARAMETER Junction to Ambient SYMBOL θJA UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw RATINGS 150 UNIT °C/W 4 of 10 QW-R103-083.b UC3800 Preliminary LINEAR INTEGRATED CIRCUIT ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=16V，unless otherwise specified) PARAMETER SYMBOL SUPPLY SECTION Supply current from HV Pin IHV Start Up Current ISTR IC Operating current IOP1 VDD Zener Clamp Voltage VDD(CLAMP) UNDER-VOLTAGE LOCKOUT SECTION Start Threshold Voltage VDD(ON) Min. Operating Voltage VDD(OFF) Hysteresis VDD(HY) CONTROL SECTION VFB Open Loop Voltage Level VFB-OPEN PWM Input Gain AVCS The FB threshold enter burst mode VFB(IN) The FB threshold exit burst mode VFB(OUT) The FB threshold enter green mode VFB(END) Normal Switch Frequency FSW Power-Saving Duty Cycle DMAX Frequency Hopping FJ(SW) Frequency VDD Stability FDV Frequency Temperature Stability FDT PROTECTION SECTION VCC Over Voltage Protection Threshold VOVP FB PIN Over Load Protection Threshold VOLP Over Load Protection Delay-Time TDelay Soft start time TSS OTP Level TOTP CURRENT LIMITING SECTION Peak Current Flat Threshold Voltage VCS-F Peak Current Valley Threshold Voltage VCS-V Lead Edge Blanking Time TLEB DRIVER OUTPUT SECTION Output Voltage Low State VOL Output Voltage High State VOH Output clamp Voltage V_Clamping Output Voltage Rise Time tR Output Voltage Fall Time tF LNO SECTION Threshold voltage for LNO VTH_LNO Threshold voltage for BNO VTH_BNO UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw TEST CONDITIONS HV=100V VDD = VDD(ON)-0.1V VFB=3.5V IDD=20mA ∆VFB/∆VCS VSENSE =0 VSENSE =0 VSENSE =0 VFB=3.5V, hopping Rang Before enter burst mode VFB=3.5V, VSENSE=0 MIN TYP 31 0.25 2 0.8 33 12 6 13 7 6 5.0 5.4 3 1.5 1.8 VDD=16V,IO=-20mA VDD=16V,IO= 20mA CL=1.0nF CL=1.0nF 15 1.8 35 mA μA mA V 14 8 2.9 V V V V V/V V V V KHz KHz % % % % 65 22 78 70 25 85 +4 5 5 26 27 4.3 88 2.5 145 28 0.95 0.65 350 1.05 0.75 V V ns 0.8 16 100 60 V V V ns ns 1.05 0.3 V V 80 VFB=3.5V, Duty≥60% VFB=4.2V, Duty=0% UNIT 60 19 70 -4 VDD=12V~20V T=-25~85°C VFB=3.5V MAX 0.85 0.55 11 96 V V mS mS °C 5 of 10 QW-R103-083.b UC3800 Preliminary LINEAR INTEGRATED CIRCUIT OPERATION DESCRIPTION The UTC UC3800 devices integrate many useful designs into one controller for low-power switch-mode power supplies. The following descriptions highlight some of the features of the UTC UC3800 series. HV Start-up UTC UC3800 integrated HV start circuit, and provide about 1mA current to charge VDD pin during power on state from HV pin. When VDD cap voltage is higher than UVLO (OFF), the charge current is switched off. At this moment, the VDD capacitor provides current to UTC UC3800 until the auxiliary winding of the main transformer starts to provide the operation current. Power-Saving Mode Operation The proprietary Power-Saving Mode function provides linearly decreasing the switching frequency under light-load conditions for higher efficiency. The feedback voltage, which is sampled from the voltage feedback loop, is taken as the reference. Once the feedback voltage dropped below the threshold voltage, the switching frequency starts to decrease. This Power-Saving Mode function dramatically reduces power consumption under light-load conditions. The 22KHz minimum frequency control also eliminates the audio noise at any loading conditions. At zero load condition, the magnitude of power loss is in proportion to the number of switching events within a fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the energy. The UTC UC3800 enter burst mode at standby condition to minimize the switching loss and reduces the standby power consumption. Power supplies using the UTC UC3800 can easily meet even the strictest regulations regarding standby power consumption. Switch Frequency Set The maximum switch frequency is fixed to 65KHz. Switch frequency is modulated by output power POUT during IC operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower switch frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between fSW and POUT/POUT (MAX) as followed Fig.1. Fig.1 The relation curve between fSW and relative output power POUT/ POUT (MAX) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 10 QW-R103-083.b UC3800 Preliminary LINEAR INTEGRATED CIRCUIT OPERATION DESCRIPTION (Cont.) Frequency Hopping For EMI Improvement The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd oscillator. The relation between the first oscillator and the 2nd oscillator as followed Fig.2. So the tone energy is evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design in meeting stringent EMI requirement. Fig.2 Frequency Hopping Built-in Slope Compensation Built-in slope compensation circuit greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation. Leading-Edge Blanking Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid premature termination of the switching pulse, a 350ns leading-edge blanking time is built in. Conventional RC filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and it cannot switch off the gate driver. Constant Output Power Limit When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around 0.95V, the output GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor RVIN, a higher line voltage will generate higher VIN current into the VIN pin. The threshold voltage is decreased if the VIN current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC. Under Voltage Lockout (UVLO) The turn-on and turn-off thresholds of the UTC UC3800 are fixed internally at VTHD(ON)/VDD(MIN) During start-up, the hold-up capacitor must be charged to VTHD(ON) through the start-up resistor, so that the UTC UC3800 will be enabled. The hold-up capacitor will continue to supply VDD until power can be delivered from the auxiliary winding of the main transformer. VDD must not drop below VDD(MIN) during this start-up process. This UVLO hysteresis window ensures that hold-up capacitor will be adequate to supply VDD during start-up. Gate Output The UTC UC3800 output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. A good tradeoff is achieved through dead time control. The low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal 16V clamp is added for MOSFET gate protection at higher than expected VDD input. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 10 QW-R103-083.b UC3800 Preliminary LINEAR INTEGRATED CIRCUIT OPERATION DESCRIPTION (Cont.) Protection Controls The IC takes on more protection functions such as OVP, OLP and OTP etc. In case of those failure modes for continual blanking time, the driver is shut down. Driver is reset after failure is eliminated. OVP The OVP will shut down the switching of the power MOSFET whenever VDD >VOVP. The OVP event as followed Fig.3. Fig.3 OVP case Fig.4 OLP case OLP OLP will shut down driver when VFB> VOLP for continual time. The OLP event as followed Fig.4. LNO-OVP and BNO LNO will shut down driver when LNO> VTH_LNO or LNO<VTH_BNO for continual time. OTP The internal OTP circuit is implemented to detect the Temperature. As soon as the Temperature is higher than the 145C, the driver will shut down. PCB Layout Note Noise from the current sense or the control signal can cause significant pulse width jitter in continuous-conduction mode, and slope compensation helps alleviate these problems. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the UTC UC3800, and increasing the power MOS gate resistance is advised. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 8 of 10 QW-R103-083.b UC3800 Preliminary LINEAR INTEGRATED CIRCUIT REFRENCE CIRCUIT (12V/1.5A) F1 L CX1 L2 1 1 R1 2 2 BD1 + 4 C1 R2 C3 C2 R3 T1 1, 2 2 D5 1 L1 1 2 VO 10 N 3 D2 U1 6 HV GATE 1 2 NC VDD GND SENSE 3 5 4 8 7 R9-1 1 C8 FB LNO D4 2 22 R6 Q1 + + C11 1 2 C13 ZD1 3 7 C7 GND 3, 4 R7 R5 C5 C9 C10 5 1 + R10 8 R4 R8 9 D3 1 2 R12 C4 U3 R9 4 R15 1 3 2 R13 R14 C12 3 CY1 U2 1 R16 2 BOM Reference BD1 CX1 (Optional) CY1 (Optional) C2 C1 C3 C4 C5,C13 (Optional) C7 (Optional) C8 C9 C10 C11 C12 C14 D2 D3 D4 (Optional) D5 F1 L1 Component BD 1A/600V NC YC 220P/400V (Y1) EC 22μF/400V 105°C EC 10μF/400V 105°C CC 0.01μF/1000V EC 3.3μF/50V CC 104P/25V 0805 CC 102P/25V 1206 CC 102P/25V 1206 CC 222P/100V 1206 EC 470u/16V 105°C EC 220u/16V 105°C CC 222P/16V 0805 NC Diode FR107 Diode FR102 Diode SB360 R1Ω/0.5W 10μH 6mm UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw Reference L2 Q1 R1,R2 R3 R4 (Optional) R5 R6 R7 R8 R9/R9-1 R10 R12 R13 R14 R15 R16 R17 T1 U1 U2 U3 Component 20mH 6*8mm 4N60 R 1MΩ 1206 R 30KΩ 1206 R 20Ω 1W R 0Ω 1206 R 100Ω 1206 R 1.1Ω 1W R 10kΩ 1206 R 12KΩ 0805 R 51Ω 0.5W R 510Ω 0805 R 2KΩ 0805 R 0Ω 0805 R 43kΩ 0805 R 12kΩ 0805 R 120kΩ 0805 EF-20 IC UC3800 TL431 PC817 9 of 10 QW-R103-083.b UC3800 Preliminary LINEAR INTEGRATED CIRCUIT UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 10 of 10 QW-R103-083.b