Datasheet

UNISONIC TECHNOLOGIES CO., LTD
75185
LINEAR INTEGRATED CIRCUIT
MULTIPLE RS-232 DRIVERS
AND RECEIVERS

TSSOP-20
DESCRIPTION
SSOP-20
The UTC 75185 complies with the requirements of the
TIA/EIA232-F and ITU (formerly CCITT) v.28 standards. These
standards are for data interchange between a host computer and
peripheral at signaling rates up to 20kbit/s. The switching speeds of
the UTC 75185 are fast enough to support rates up to 120kbite/s
with lower capacitive loads (shorter cables). Interoperability at the
higher signaling rates cannot be assured unless the designer has
design control of the cable and the interface circuits at both ends.
For interoperability at signaling rates to 120kbit/s, use of
ITA/EIA-423-B (ITU v.10) and TIA/EIA-422-B (ITU v.11) standards
are recommended.

SOP-20
DIP-20
FEATURES
*Single Chip with Easy Interface between UART and Serial-Port connector of PC.
*Three Drivers and five Receivers Meet or Exceed the Requirements of TIA/EIA-232-F and ITU v.28 Standards.
*Designed to Support Data Rates up to 120 kbps

ORDERING INFORMATION
Ordering Number
Lead Free
75185L-D20-T
-

Halogen Free
75185G-D20-T
75185G-P20-R
75185G-R20-R
75185G-S20-R
Package
Packing
DIP-20
TSSOP-20
SSOP-20
SOP-20
Tube
Tape Reel
Tape Reel
Tape Reel
MARKING
DIP-20
www.unisonic.com.tw
Copyright © 2014 Unisonic Technologies Co., Ltd
TSSOP-20 / SSOP-20 / SOP-20
1 of 10
QW-R113-003.G
75185

LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATIONS
VDD
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
VSS

1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
GND
PIN DESCRIPTION
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SYMBOL
VDD
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
VSS
GND
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
VCC
PIN DESCRIPTION
Supply Voltage
First Receiver Input
Second Receiver Input
Third Receiver Input
First Driver Output
Second Driver Output
Fourth Receiver Input
Third Driver Output
Fifth Receiver Input
Supply Voltage
Ground
Fifth Receiver Output
Third Driver Input
Fourth Receiver Output
Second Driver Input
First Driver Input
Third Receiver Output
Second Receiver Output
First Receiver Output
Supply Voltage
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QW-R113-003.G
75185

LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE
RANGE (unless otherwise specified)
PARAMETER
SYMBOL
VDD
VSS
VCC
Supply Voltage (Note 1)
Drive
Receiver
Input Voltage Range
Driver Output Voltage Range
Receiver Low Level Output Current
Storage Temperature Range

VIN
VOUT
IOUT
TSTG
RATINGS
15
-15
10
-15 ~ 7
-30 ~ 30
-15~ 15
20
-65 ~ +150
UNIT
V
V
V
V
V
V
mA
C
RATINGS
70
100
115
115
UNIT
THERMAL DATA
PARAMETER
SYMBOL
DIP-20
SOP-20
Junction to Ambient
θJA
C/W
SSOP-20
TSSOP-20
Notes: 1. All voltage are with respect to the network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole
packages, which use a trace length of zero.

RECOMMENDED OPERATING CONDITIONS
PARAMETER
Supply Voltage
Input Voltage (Driver Only)
High Level Output Current
Low Level Output Current
High Level
Low Level
Drive
Receiver
Drive
Receiver
Operating Free-Air Temperature

SYMBOL
VDD
VSS
VCC
VIH
VIL
MIN
7.5
-7.5
4.5
1.9
TYP
9
-9
5
MAX
15
-15
5.5
0.8
-6.0
-0.5
6
16
70
IOH
IOL
TA
0
UNIT
V
V
V
V
V
mA
mA
C
SUPPLY CURRENTS
PARAMETER
Supply Current From VDD
Supply Current From VSS
Supply Current From VCC
SYMBOL
IDD
ISS
ICC
TEST CONDITIONS
VDD
VSS
9
-9
No load.
12
-12
All inputs at 1.9V
15
-15
9
-9
No load.
12
-12
All inputs at 0.8V
15
-15
9
-9
No load.
12
-12
All inputs at 1.9V
15
-15
9
-9
No load.
12
-12
All inputs at 0.8V
15
-15
No load. All inputs at 5V, VCC=5V
UNISONIC TECHNOLOGIES CO., LTD
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MIN
MAX
15
19
25
4.5
5.5
9
-15
-19
-25
-3.2
-3.2
-3.2
30
UNIT
mA
mA
mA
mA
mA
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LINEAR INTEGRATED CIRCUIT
DRIVER ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING
FREE-AIR TEMPERATURE RANGE (VDD=9V, VSS=-9V, VCC=5V, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
High Level Output Voltage
VOH
VIL =0.8V, RL =3 k (Figure 1)
6
7.5
V
Low Level Output Voltage (Note 3)
VOL
VIH =1.9V, RL =3 k (Figure 1)
-7.5 -6
V
High Level Input Current
IIH
VIN =5V (Figure 2)
10
A
Low Level Input Current
IIL
VIN =0V (Figure 2)
-1.6 mA
High Level Short Circuit Output Current
IOS(H) VIL =0.8V, VOUT =0V(Figure 1)
-4.5 -12 -19.5 mA
(Note 4)
Low Level Short Circuit Output Current
IOS(L) VIH =2V, VOUT =0V(Figure 1)
4.5
12 19.5 mA
Output Resistance (Note 5)
ROUT VDD =VSS=VCC=0V, VOUT =-2 to 2V 300

Note 3: The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in
this datasheet for logic levels only (e.g. if -10V is a maximum, the typical value is a more negative voltage).
Note 4: Output short circuit conditions must maintain the total power dissipation below absolute maximum ratings.
Note 5: Test conditions are those specified by TIA/EIA232-F and as listed above.

DRIVER SWITCHING CHARACTERISTICS (VDD=12V, VSS=-12V, VCC=5V, TA=25C)
PARAMETER
Propagation Delay Time Level Low to High
Output
High to Low
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
RL=3 to 7 k, CL=15pF (Figure 3)
315 500 ns
tPLH
tPHL
RL=3 to 7 k, CL=15pF (Figure 3)
75 175 ns
60 100 ns
RL=3 to 7 k, CL=15pF (Figure 3)
Transition Time Level Output Low to High
tTLH
RL=3 to 7 k, CL=2500pF
1.7 2.5
μs
(Note 6,Figure 3)
40
75
ns
RL=3 to 7 k, CL=15pF (Figure 3)
Transition Time Level Output High to Low
tTHL
RL=3 to 7 k, CL=2500pF
1.5 2.5
μs
(Note 7, Figure 3)
Note 6: Measured between -3V and 3V points of the output waveform (TIA/EIA-232-F conditions), all unused inputs
are tied.
Note 7: Measured between 3V and -3V points of the output waveform (TIA/EIA-232-F conditions), all unused inputs
are tied.

RECEIVER ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING
CONDITIONS (TA=25C, VCC=5V, VDD=9V, VSS=-9V)
PARAMETER
SYMBOL
Positive Going Threshold Voltage
VT +
Negative Going Threshold Voltage
Input Hysteresis (VT+ - VT-)
VTVHYS
Output Voltage
High level
VOH
Low level
VOL
High level
IIH
Low level
IIL
Input Current
Short-Circuit Output Current

IOS
TEST CONDITIONS
(Figure 5)
TA=25C
TA=0C to 70C
VIH=0.75V
Inputs Open
VIN=3V, IOL=10mA
VIN=25V (Figure 5)
VIN=3V (Figure 5)
VIN=-25V (Figure 5)
VIN=-3V (Figure 5)
(Figure 4)
IOH=-0.5mA
MIN
TYP
MAX
UNIT
1.75
1.55
0.75
0.5
2.6
2.6
1.9
V
0.97
2.3
2.3
1.25
4
5
0.2
0.45
8.3
3.6
0.43
-3.6
-0.43
-8.3
-3.4
-12
V
V
V
V
mA
mA
mA
RECEIVER SWITCHING CHARACTERISTICS (VDD=12V, VSS=-12V, VCC=5V, TA=25C)
PARAMETER
SYMBOL
TEST CONDITIONS
Low to High
tPLH
Propagation Delay Time
Level Output
High to Low
tPHL
RL=5 kΩ, CL=50pF
(Figure 6)
Low to High
tTLH
Transition Time Level
Output
High to Low
tTHL
UNISONIC TECHNOLOGIES CO., LTD
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MIN
TYP
107
42
175
16
MAX
500
150
525
60
UNIT
ns
ns
ns
ns
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75185

LINEAR INTEGRATED CIRCUIT
PARAMETER MEASUREMENT INFORMATION
DRIVER TEST CIRCUITS:
Figure 1. For VOH, VOL, IOS(H), IOS(L)
Figure 2. For IIH, IIL
DRIVER VOLTAGE WAVEFORMS:
Figure 3.
Note: 1. The pulse generator has the following characteristics: tw=25s, PRR=20kHz, Zo=50, tr=tf<50ns.
2. CL includes probe and jig capacitance.
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5 of 10
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75185

LINEAR INTEGRATED CIRCUIT
PARAMETER MEASUREMENT INFORMATION (Cont.)
RECEIVER TEST CIRCUITS:
Figure 4. For IOS
Figure 5. For VT, VOH, VOL
RECEIVER PROPAGATION AND TRANSITION TIMES:
3V
Input
50%
Input
VDD
50%
0V
VCC
tPHL
Pulse
Generator
RL
(see Note A)
CL
(see Note B)
90%
Output
VSS
50%
10%
tPLH
50%
10%
VOL
tTLH
tTHL
TEST DIRCUIT
VOH
90%
VOLTAGE WAVEFORMS
Figure 6.
Note: 1. The pulse generator has the following characteristics: tW = 25μs, PRR = 20kHz, ZO = 50Ω, tr=tf < 50ns.
2. CL includes probe and jig capacitance.
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6 of 10
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
LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION
Power-Supply protection to meet Power-Off fault conditions of TIA/TIA-232-F
Diodes placed in series with the VDD and VSS leads protect the device in the fault condition in which the device
outputs are shorted to 15V and the power supplies are at low and provide low-impedance paths to ground.
Typical Connection
“*”: Refer Figure 10 to select the correct values for the loading capacitors (C1, C2, and C3), which are required to
meet the RS-232 maximum slew-rate requirement of 30V/μs. The value of the loading capacitors required
depends upon the line length and desired slew rate, but typically is 330 pF.
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7 of 10
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75185

LINEAR INTEGRATED CIRCUIT
LOGIC SYMBOL AND LOGIC DIAGRAM
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
2
3
4
5
6
19
18
17
16
15
7
8
9
14
RY4
13
DA3
12
RY5
RY1
RY2
RY3
DA1
DA2
RA1
RY1
RA2
RY2
RA3
RY3
DY1
DA1
DY2
DA2
RA4
RY4
DY3
DA3
RA5
RY5

CIRCUIT OF DRIVERS (Resistor value shown are nominal.)

CIRCUIT OF EACH RECEIVER (Resistor value shown are nominal.)
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Output Current, IOUT (mA)
TYPICAL CHARACTERISTICS (DRIVER)
Output Voltage, VOUT (V)

LINEAR INTEGRATED CIRCUIT
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9 of 10
QW-R113-003.G
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
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS (RECEIVER)
Maximum Supply Voltage vs
Free-Air Temperature
Noise Rejection
6
VCC = 5V
TA = 25°C
See Note A
5
CC = 300pF
4
16
14
12
10
CC = 500pF
3
CC = 12pF
2
CC = 100pF
1
8
6
4
2
0
10
40 100
400 1000 4000 10000
Pulse Duration, tw (ns)
0
RL ≥ 3kΩ(from each output to GND)
0
10
20
30
40
50
60
Free-Air Temperature, TA (°C)
70
The maximum amplitude staring from 0V of a
positive-going pulse that will not cause a
change in the output level.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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QW-R113-003.G
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