Datasheet

UNISONIC TECHNOLOGIES CO., LTD
UMC33167
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LINEAR INTEGRATED CIRCUIT
5.0A, STEP-UP/DOWN/
INVERTING SWITCHING
REGULATORS

DESCRIPTION
The UTC UMC33167 series are high performance fixed frequency
power switching regulators that contain the primary functions required
for dc-to-dc converters. This series was specifically designed to be
incorporated in step-down and voltage-inverting configurations with a
minimum number of external components and can also be used cost
effectively in step-up applications.
These devices consist of an internal temperature compensated
reference, fixed frequency oscillator with on-chip timing components,
latching pulse width modulator for single pulse metering, high gain
error amplifier, and a high current output switch.
Protective features consist of cycle-by-cycle current limiting,
undervoltage lockout, and thermal shutdown. Also included is a low
power standby mode that reduces power supply current to 36μA.

FEATURES
* Output Switch Current in Excess of 5.0A
* Fixed Frequency Oscillator (72kHz) with On-Chip Timing
* Provides 5.05V Output without External Resistor Divider
* Precision 2% Reference
* 0% ~ 95% Output Duty Cycle
* Cycle-by-Cycle Current Limiting
* Undervoltage Lockout with Hysteresis
* Internal Thermal Shutdown
* Operation from 7.5V ~ 40V
* Standby Mode Reduces Power Supply Current to 36μA

ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
UMC33167L-TA5-T
UMC33167G-TA5-T
UMC33167L-TB5-T
UMC33167G-TB5-T
Package
Packing
TO-220-5
TO-220B
Tube
Tube
MC33167L-TA5-T
(1) Packing Type
(1) T: Tube
(2) Package Type
(2) TA5: TO-220-5, TB5: TO-220B
(3) Green Package
(3) L: Lead Free, G: Halogen Free and Lead Free
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MARKING
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PIN CONFIGURATION
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PIN DESCRIPTION
PIN NO.
1
2
3
4
5
PIN NAME
FB
SW
GND
VCC
COMP
LINEAR INTEGRATED CIRCUIT
FUNCTION
Output voltage feedback control
Switch Output
Gnd pin
IC power supply pin
Compensation pin
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LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
ILIMIT
+
+
4 VCC
Oscillator
S
Q
+
-
R
PWM
2 SW
PWM Latch
+
UVLO
-
Thermal
Shutdown
5.50V
Reference
+
+
100μA
EA
+
-
1 FB
120
3
GND
5
COMP
Figure 1 Simplified Block Diagram (Step Down Application)
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LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATING (Note 2)
PARAMETER
SYMBOL
RATINGS
UNIT
Power Supply Input Voltage
VCC
40
V
Switch Output Voltage Range
VO(switch)
-2.0 ~ +VIN
V
Voltage Feedback and Compensation Input Voltage Range
VFB,VCOMP
-1.0 ~ +7.0
V
Power Dissipation (TA=+25°C)
PD
Internally Limited
W
Operating Junction Temperature
TJ
+150
°C
Operating Ambient Temperature
TA
-40 ~ +85
°C
Storage Temperature
TSTG
-65 ~ 150
°C
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. Maximum package power dissipation limits must be observed to prevent thermal shutdown activation.
3. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL-STD-883, Method 3015.
Machine Model Method 200 V.

THERMAL DATA
PARAMETER
Junction to Ambient
Junction to Case
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SYMBOL
θJA
θJC
RATINGS
65
5.0
UNIT
°C/W
°C/W
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LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS
(VCC=12V, for typical values TA=+25°C, for min/max values TA is the operating ambient temperature range that
applies (Notes 4), unless otherwise noted.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OSCILLATOR
TA=+25°C
65
72
79
KHZ
Frequency (VCC=7.5V ~ 40V)
fOSC
TJ=TLOW ~THIGH
62
81
KHZ
ERROR AMPLIFIER
4.95
5.05
5.15
V
TA=+25°C
Voltage Feedback Input Threshold
VFB(th)
TJ=TLOW ~THIGH
4.85
5.20
V
Line Regulation
RegLINE VCC=7.5V~ 40V, TA=+25°C
0.03
0.078
%/V
Input Bias Current
IIB
VFB=VFB(th)+0.15V
0.15
1.0
μA
Power Supply Rejection Ratio
PSRR VCC=7.5V~ 40V, f=120HZ
60
80
dB
VOH
ISOURCE=75μA, VFB=4.5V
4.2
4.9
V
Output Voltage High State
Swing
Low State
VOL
ISINK=0.4mA, VFB=5.5V
1.6
1.9
V
PWM COMPARATOR
92
95
100
%
DC(max) Maximum (VFB=0V)
Duty Cycle (VCC=20V)
DC(min) Minimum (VFB=0V)
0
0
0
%
SWITCH OUTPUT
Output Voltage Source Saturation
VSAT
VCC=7.5V, ISOURCE=5.0A
VCC-1.5 VCC-1.8
V
Off-State Leakage
ISW(off)
VCC=40V, Pin 2 = GND
0
100
A
Current Limit Threshold
IPK(switch) VCC=7.5V
5.5
6.5
8.0
A
Output Voltage Rise
tR
100
200
ns
Time
VCC=40V,IPK=5.0A,
Switching Times
L=225μH, TA=+25°C
Output Voltage Fall
tF
50
100
ns
Time
UNDERVOLTAGE LOCKOUT
Startup Threshold
Vth(UVLO) VCC Increasing, TA=+25°C
5.5
5.9
6.3
V
Hysteresis
VH(UVLO) (VCC Decreasing, TA=+25°C
0.6
0.9
1.2
V
TOTAL DEVICE
VCC=12V, VComp<0.15V
36
100
μA
Standby
Power Supply
Current
ICC
VCC=40V, Pin 1=GND for
40
60
mA
Operating
(TA=+25°C)
maximum duty cycle
Note 4: Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient
as possible.
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LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION CURRENT
ILIMIT
+
VCC
4 +
+
-
Oscillator
VIN
12V
CIN
330μF
S
Q
+
-
R
PWM
2
PWM Latch
+
UVLO
SW
D1
1N5825
-
Thermal
Shutdown
L
190uH
5.50V
Reference
+
+
100μA
EA
+
-
1
120
3
GND
5
COMP CF
+
0.1uF
FB R2
6.8K
+
VO
5.05V/5.0A
CO
4700uF
RF
68K
R1
The Step-Down Converter application is shown in Figure 3. The output switch transistor Q1 interrupts the input
voltage, generating a squarewave at the LCO filter input. The filter averages the squarewaves, producing a dc output
voltage that can be set to any level between VIN and VREF by controlling the percent conduction time of Q1 to that of
the total oscillator cycle time. If the converter design requires an output voltage greater than 5.05V, resistor R1 must
be added to form a divider network at the feedback input.
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LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION
The UTC UMC33167 series are monolithic power switching regulators that are optimized for dc-to-dc converter
applications. These devices operate as fixed frequency, voltage mode regulators containing all the active functions
required to directly implement step-down and voltage-inverting converters with a minimum number of external
components. They can also be used cost effectively in step-up converter applications. Potential markets include
automotive, computer, industrial, and cost sensitive consumer products. A description of each section of the device
is given below with the representative block diagram shown in Figure 1.
Oscillator
The oscillator frequency is internally programmed to 72kHz by capacitor CT and a trimmed current source. The
charge to discharge ratio is controlled to yield a 95% maximum duty cycle at the Switch Output. During the discharge
of CT, the oscillator generates an internal blanking pulse that holds the inverting input of the AND gate high, disabling
the output switch transistor. The nominal oscillator peak and valley thresholds are 4.1V and 2.3V respectively.
Pulse Width Modulator
The Pulse Width Modulator consists of a comparator with the oscillator ramp voltage applied to the noninverting
input, while the error amplifier output is applied into the inverting input. Output switch conduction is initiated when CT
is discharged to the oscillator valley voltage. As CT charges to a voltage that exceeds the error amplifier output, the
latch resets, terminating output transistor conduction for the duration of the oscillator ramp-up period. This
PWM/Latch combination prevents multiple output pulses during a given oscillator clock cycle. Figures 2 illustrate the
switch output duty cycle versus the compensation voltage.
Error Amplifier and Reference
A high gain Error Amplifier is provided with access to the inverting input and output. This amplifier features a
typical dc voltage gain of 80dB, and a unity gain bandwidth of 600kHz with 70 degrees of phase margin. The
noninverting input is biased to the internal 5.05V reference and is not pinned out. The reference has an accuracy of
±2.0% at room temperature. To provide 5.0V at the load, the reference is programmed 50mV above 5.0V to
compensate for a 1.0% voltage drop in the cable and connector from the converter output. If the converter design
requires an output voltage greater than 5.05V, resistor R1 must be added to form a divider network at the feedback
input as shown in Figures 1 and 3. The equation for determining the output voltage with the divider network is:
VOUT=5.05(R2/R1+1)
External loop compensation is required for converter stability. A simple low-pass filter is formed by connecting a
resistor (R2) from the regulated output to the inverting input, and a series resistor-capacitor (RF, CF) between Pins 1
and 5. The compensation network component values shown in each of the applications circuits were selected to
provide stability over the tested operating conditions. The step-down converter (Figure 3) is the easiest to
compensate for stability. The simplest way to optimize the compensation network is to observe the response of the
output voltage to a step load change, while adjusting RF and CF for critical damping. The final circuit should be
verified for stability under four boundary conditions. These conditions are minimum and maximum input voltages,
with minimum and maximum loads.
By clamping the voltage on the error amplifier output (Pin 5) to less than 150mV, the internal circuitry will be
placed into a low power standby mode, reducing the power supply current to 36A with a 12V supply voltage.
The Error Amplifier output has a 100 A current source pull-up that can be used to implement soft-start.
Switch Output
The output transistor is designed to switch a maximum of 40V, with a minimum peak collector current of 5.5A.
When configured for step-down or voltage-inverting applications, as in Figures 3, the inductor will forward bias the
output rectifier when the switch turns off. Rectifiers with a high forward voltage drop or long turn on delay time should
not be used. If the emitter is allowed to go sufficiently negative, collector current will flow, causing additional device
heating and reduced conversion efficiency. shows that by clamping the emitter to 0.5V, the collector current will be in
the range of 100A over temperature. A 1N5825 or equivalent Schottky barrier rectifier is recommended to fulfill these
requirements.
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LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION(Cont.)
Undervoltage Lockout
An Undervoltage Lockout comparator has been incorporated to guarantee that the integrated circuit is fully
functional before the output stage is enabled. The internal reference voltage is monitored by the comparator which
enables the output stage when VCC exceeds 5.9V. To prevent erratic output switching as the threshold is crossed,
0.9V of hysteresis is provided.
Thermal Protection
Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When activated, typically at 170°C, the latch is forced into a ‘reset’ state, disabling
the output switch. This feature is provided to prevent catastrophic failures from accidental device overheating. It is
not intended to be used as a substitute for proper heatsinking. The UTC MC34167 is contained in a 5-lead TO-220
type package. The tab of the package is common with the center pin (Pin 3) and is normally connected to ground.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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