L DESIGN FEATURES ±32V Triple-Output Supply for LCDs, CCDs and LEDs Includes Fault Protection in a 3mm × 3mm QFN by Eko T. Lisuwandi Introduction The task of designing a battery powered system with multiple high voltage supplies is a daunting one. In such systems board space is at a premium and high efficiency is required to extend battery life. Supplies must be sequenced in start-up and shut-down, and multiple supplies must be able to maintain regulation without interaction across supplies. The LT3587 is a 1-chip solution that combines three switching regulators and three internal high voltage switches to produce two high voltage boost converters and a single high voltage inverter. The LT3587 is designed to run from inputs ranging from 2.5V to 6V, making it ideal for battery powered systems. Small package size and low component count produces a small, efficient solution. Typical applications include digital still and video cameras, high performance portable scanners and display systems, PDAs, cellular phones and handheld computers that have high voltage peripherals such as CCD sensors, LED backlights, LCD displays or OLED displays. Features To keep the component count low, the LT3587 integrates three high voltage power switches capable of switching 0.5A, 1A and 1.1A at up to 32V in a 3mm × 3mm QFN package. Each of the positive channels includes an output disconnect to prevent a direct DC path from input to output when LED DRIVER 20mA UP TO 24V RVFB3 1.65M (OPTIONAL) RIFB3 8.06k C4 2.2µF DS3 VFB3 VOUT3 CAP3 L4 10µH SW3 L1 15µH VIN C6 1µF SW1 IFB3 CFB1 2.7pF FLT EN/SS1 FB1 EN/SS3 SW2 C5 100nF VVIN 2.5V TO 6V Triple-Output Supply for CCD Imager and LED Backlight DS1 C1 10µF CAP1 LT3587 C3 100nF VVIN 2.5V TO 6V L2 15µH C2 2.2µF GND L3 15µH DS2 C1: MURATA GRM21BR61C106KE15L C2: MURATA GRM188R61C225KE15D C3, C5: MURATA GRM033R60J104KE19D C4: MURATA GRM21BR71E225KA73L C6: MURATA GRM155R61A105KE15D C7: TAIYO YUDEN LMK212BJ226MG-T FB2 RFB1 1M VOUT1 RFB2 1M CFB2 6.8pF C7 22µF CCD POSITIVE 15V 50mA CCD NEGATIVE –8V 100mA CFB1: MURATA GRM1555C1H2R7BZ01D CFB2: MURATA GRM1555C1H6R8BZ01D L1, L2, L3: SUMIDA CDRH2D18/HP-150N L4: TOKO 1071AS-100M DS1, DS2, DS3: IR IR05H40CSPTR Figure 1. Solution for a Li-Ion powered camera provides positive and negative supplies for biasing a CCD imager and an LED driver for a 5-LED backlight 20 the switches are disabled. The LT3587 also includes a bidirectional fault pin (FLT), which can be used for fault indication (output) or for emergency shutdown (input). The LT3587 offers a wide output range, up to 32V for the positive channels (channels 1 and 3) and –32V for the inverter (channel 2). Channel 3 is configurable as either a voltage or current regulator. When configured as a current regulator, channel 3 uses a 1-wire output that requires no current sense or high current ground return lines, easing board layout. A single resistor programs each of the three channels output voltage levels and/or the channel 3 output current level. Intelligent soft-start allows for sequential soft-start of channel 1 followed by the inverter negative output using a single capacitor. Internal sequencing circuitry disables the inverter until channel 1 output has reached 87% of its final value. Figure 1 shows a typical application providing a positive and negative voltage bias for a CCD imager and a 20mA current bias for an LED backlight. All three channels of the LT3587 use a constant frequency, current mode control scheme to provide voltage and/or current regulation at the output. The positive CCD bias is configured as a simple non-synchronous boost converter. Its output voltage is set to 15V via the feedback resistor RFB1. The 15µH inductor (L1) is sized for a maximum load of 50mA. The negative CCD bias is configured as a non-synchronous Ćuk converter. Its output voltage is set at –8V using the feedback resistor RFB2. The two 15µH Linear Technology Magazine • January 2009 DESIGN FEATURES L VEN/SS1 2V/DIV IVIN 500mA/DIV VVOUT1 10V/DIV VNEG 10V/DIV VEN/SS1 2V/DIV 0V IVIN 500mA/DIV 0mA 0V VVOUT1 10V/DIV 0V VNEG 10V/DIV 0mA 0V 0V 400µs/DIV 4ms/DIV Figure 2. Start-up waveforms with no soft-start capacitor, and with a 10nF soft-start capacitor (L2 and L3) inductors are sized for a maximum load of 100mA. The LED backlight driver is configured as an output-current-regulated boost converter. Its output current is set at 20mA using the current programming resistor RIFB3. The 10µH inductor (L4) is sized for a typical load of 20mA at up to 24V. Note the optional voltage feedback resistor, RVFB3, on the LED driver. This resistor acts as a voltage clamp on the LED driver output, so that if one of the LED fails open, the voltage on the LED driver output is clamped to 24V. Soft-Start All channels feature soft-start (a slow voltage ramp from zero to regulation) to prevent potentially damaging large inrush currents at start-up. Softstart is implemented via two separate soft-start control pins: EN/SS1 and EN/SS3. The EN/SS1 pin controls the soft-start for channel 1 and the inverter, while the EN/SS3 pin controls the soft-start for channel 3. Both of these soft-start pins are pulled up with a 1µA internal current source. A capacitor from the EN/SS1 pin to ground (C3 in Figure 1) programs a soft-start ramp for channel 1 and channel 2 (the inverter). As the 1µA current source charges up the capacitor, the regulation loops for channel 1 and channel 2 are enabled when the EN/SS1 pin voltage rises above 200mV. During start-up, the peak switch current for channel 1 proportionally rises with the soft-start voltage ramp at the EN/SS1 pin. The inverter switch current also follows the voltage ramp at the EN/SS1 pin, but its switch current ramp does not start until the Linear Technology Magazine • January 2009 voltage on the EN/SS1 pin is at least 600mV. This ensures that channel 2 starts up after channel 1. Channel 1 and channel 2 regulation loops are free running with full inductor current when the voltage at the EN/SS1 pin is above 2.5V. In a similar fashion, a capacitor from the EN/SS3 pin to ground (C5 in Figure 1) sets up a soft-start ramp for channel 3. When the voltage at the EN/SS3 pins goes above 200mV, regulation loop for channel 3 is enabled. When the voltage at the EN/SS3 pin is above 2V, the regulation loop for channel 3 is free running with full inductor current. Start-Up Sequencing The LT3587 also includes internal sequencing circuitry that inhibits the channel 2 from operating until the feedback voltage of channel 1 (at the FB1 pin) reaches about 1.1V (about 87% of the final voltage). The size of the soft-start capacitor controls channel 2 start-up behavior. If there is no soft-start capacitor, or a very small capacitor, then the negative channel starts up immediately with full inductor current when the positive output reaches 87% of its final value. If a large soft-start capacitor is used, then the EN/SS1 voltage controls the inverter channel past the point of regulation of the positive channel. Figure 2 shows the start-up sequencing without soft-start and with a 10nF soft-start capacitor. Output Disconnect Both of the positive channels (channels 1 and 3) have an output disconnect between their respective CAP and VOUT pins. This disconnect feature prevents a DC path from forming between VIN and VOUT through the inductors when switching is disabled (Figure 1). For channel 1, this output disconnect feature is implemented using a PMOS (M1) as shown in the partial block diagram in Figure 3. When turned on, M1 normally provides a low resistance, low power dissipation path for delivering output current between the CAP1 pin and the VOUT1 pin. M1 is on as long as the voltage difference between CAP1 and VIN is greater than 2.5V. This allows the positive bias to stay high as long as possible while the negative bias discharges during turn off. LT3587 OVERVOLTAGE PROTECTION CAP1 C1 M1 M2 CAP3 C4 M3 VOUT3 VOUT1 DISCONNECT CONTROL SHDN1 TO INTERNAL CIRCUIT DISCONNECT CONTROL SHDN3 IFB3 RIFB3 Figure 3. Partial block diagram of the LT3587 showing the disconnect PMOS for channels 1 and 3 21 L DESIGN FEATURES IVOUT1 500mA/DIV IVOUT3 500mA/DIV 0mA IL1 500mA/DIV VCAP1 10V/DIV VVOUT1 10V/DIV IL4 500mA/DIV VCAP3 10V/DIV 15V 15V VVIN = 3.6V C1 = 4.7µF 40µs/DIV VCAP3 10V/DIV 24V VVIN = 3.6V C4 = 1µF 40µs/DIV Figure 5. Channel 3 short circuit condition with and without 20mA current limit PART RESET ENSS1/ENSS3 5V/DIV VNEG 10V/DIV 24V VVOUT3 10V/DIV 40µs/DIV VFLT 5V/DIV VVOUT1 10V/DIV 0mA IL4 500mA/DIV VVOUT3 10V/DIV Figure 4. Channel 1 short circuit event VFLT 5V/DIV FLT FORCED LOW PART RESET ENSS1/ENSS3 5V/DIV VVOUT1 10V/DIV SHORT AT VOUT1 VNEG 10V/DIV VVOUT3 20V/DIV VVOUT3 20V/DIV 100ms/DIV Figure 6. Fault detection of a short circuit event The disconnect transistor M1 is current limited to provide a maximum output current of 155mA. There is also a protection circuit for M1 that limits the voltage drop across CAP1 and VOUT1 to about 10V. When the voltage at CAP1 is greater than 10V, such as during an output overload or short circuit to ground, then M1 is set fully on, without any current limit, to allow for the voltage on CAP1 to discharge as fast as possible. When the voltage across CAP1 and VOUT1 reduces to less than 10V, the output current is then again limited to 155mA. Figure 4 shows the output voltage and current during an overload event with VCAP1 initially at 15V. The output disconnect feature on channel 3 is implemented similarly using M3 (Figure 3). However, in this case M3 is only turned off when the EN/SS3 pin voltage is less than 200mV and the regulation loop for channel 3 is disabled. The disconnect transistor M3 is also current limited, providing a maximum output current at VOUT3 of 100mA. M3 also has a similar protection circuit as M1 that limits the voltage drop across CAP3 and VOUT3 to about 10V. Figure 5 22 IVOUT3 500mA/DIV 0mA 100ms/DIV Figure 7. Waveforms for when the FLT pin is externally forced low Fault Detection and Indicator The LT3587 is a versatile, highly integrated device that provides a compact solution for devices such as cameras, handheld computers and terminals requiring multiple high voltage supplies. A low part count and a 3mm × 3mm package keep the solution size small. High efficiency conversion makes it suitable for battery powered applications. Adjustable output voltage and wide output range of up to 32V for the positive boosts, and –32V for the inverter, make it a flexible solution for systems that require high voltage supplies. shows the output voltage and current during an overload event with VCAP3 initially at 24V. The LT3587 features fault detection on all outputs and a fault indicator pin, FLT. The fault detection circuitry is enabled only when at least one of the channels has completed the soft-start process and is free running with full inductor current. Once fault detection is enabled, if any of the enabled channel feedback voltages (VFB1, VFB2 or the greater of VVFB3 and VIFB3) falls below its regulation value for more than 16ms, the FLT pin pulls low. One particularly important case is an overload or short circuit condition on any of the outputs. In this case, if the corresponding loop is unable to bring the output back into regulation within 16ms, a fault is detected and the FLT pin pulls low. Note that the fault condition is latched—once activated all three channels are disabled. Enabling any of the channels requires resetting the part by shutting it down (forcing both the EN/SS1 and EN/SS3 pins low below 200mV) and then on again. Figure 6 shows the waveforms when a short circuit condition occurs at channel 1 for more than 16ms and the subsequent resetting of the part. Linear Technology Magazine • January 2009 DESIGN FEATURES L VVIN 2.5V TO 5V 10µH VVIN 2.5V TO 5V 10µH VIN SW3 1µF VIN SW3 LT3587 IFB3 DAC LTC2630 VDAC-OUT 1µF CAP3 CAP3 VOUT3 LT3587 LED DRIVER IFB3 EN/SS3 VOUT3 LED DRIVER EN/SS3 RIFB3 8.06k RIFB3 8.06k 2.5V PWM FREQ MN1 Si1304BDL 0V Figure 8. Analog dimming using a DAC and a resistor Besides acting as a fault output indicator, the FLT pin is also an input pin. If this pin is externally forced below 400mV, the LT3587 behaves as if a fault event has occurred and all the channels turn off. In order to turn the part back on, remove the external voltage that forces the pin low and reset the part. Figure 7 shows the waveforms when the FLT pin is externally forced low and the subsequent resetting of the part. Dimming Control for Channel 3 as a CurrentRegulated LED Driver As shown in Figure 1, one of the most common applications for the channel 3 is as a current regulator for a backlight LED driver. In many high end display applications requiring an LED backlight, the ability to dim the display brightness is crucial for implementing a power saving mode or to maintain contrast in different ambient lighting conditions. There are two different ways to implement a dimming control of the LED string. LED current can be adjusted by either using a digital to analog converter (DAC) and a resistor RIFB3 or by using a PWM signal. Analog Dimming Using a DAC and a Resistor For some applications, the preferred method of brightness control is using a DAC and a resistor. This method Linear Technology Magazine • January 2009 Figure 9. Driver for six LEDs with PWM dimming is more commonly known as analog dimming. This method is shown in Figure 8. Since the programmed VOUT3 current is proportional to the current through RIFB3 , the LED current can be adjusted by changing the DAC output voltage. A higher DAC output voltage level results in lower LED current and hence lower overall brightness. For accurate dimming control, keep the DAC output impedance low enough to sink approximately 1/200 of the desired maximum LED current. Note the maximum possible output current is limited by the output disconnect current limit to 100mA. PWM Dimming One problem with analog dimming as described above is that changing the forward current flowing in the LEDs not only changes the brightness intensity of the LEDs, it also changes the color. This is a problem for applications IVOUT3 13mA/DIV 0mA IL4 200mA/DIV 0mA ENSS3 5V/DIV 0V VVIN = 3.6V 6 LEDs 2ms/DIV Figure 10. PWM dimming waveforms that cannot tolerate any shift in the LED chromaticity. Controlling the LED intensity with a direct PWM signal allows dimming of the LEDs without changing the color. A PWM frequency of ~80Hz or higher guarantees that there is no visible flicker. The amount of on-time in the PWM signal is proportional to the intensity of the LEDs. The color of the LEDs remains unchanged in this scheme since the LED current value is either zero or a constant value (IVOUT3 = 160V/RIFB3). Figure 9 shows an LED driver for six white LEDs. If the voltage at the CAP3 pin is higher than 10V when the LED is on, direct PWM dimming method requires an external NMOS. This external NMOS is tied between the cathode of the lowest LED in the string and ground. The output disconnect feature and the external NMOS ensure that the LEDs quickly turn off without discharging the output capacitor. This allows the LEDs to turn on faster. Figure 10 shows the PWM dimming waveforms for the circuit in Figure 9. The time it takes for the LED current to reach its programmed value sets the achievable dimming range for a given PWM frequency. At extreme lower end of the duty cycle, the linear relation between the average LED current and the PWM duty cycle is no longer preserved. The minimum on time is 23 L DESIGN FEATURES chosen based on how much linearity is required for the average LED current. For example for the circuit in Figure 9, to produce approximately 10% deviation from linearity at the lower duty cycle, the minimum on time of the LED current is approximately 320µs (3.2% duty cycle) for a 3.6V input voltage and a 100Hz PWM frequency. The achievable dimming range for this application is then 30 to 1 (approximately the reciprocal of the minimum duty cycle). The dimming range can be significantly extended by combining PWM dimming with analog dimming. The color of the LEDs no longer remains constant because the forward current of the LED changes with the output voltage of the DAC. For the six LED application described above, the LEDs can be dimmed first by modulating the duty cycle of the PWM signal with the DAC output at 0V. Once the minimum duty cycle is reached, the value of the DAC output voltage can be increased to further dim the LEDs. The use of both techniques together allows the average LED current for the six LED application to be varied from 20mA down to less than 1µA (a 20000:1 dimming ratio). Channel 3 Overvoltage and Overcurrent Protection Channel 3 can be configured either as a voltage regulated boost converter or as a current regulated boost converter. The regulation loop of channel 3 uses the greater of the two voltages at VFB3 and IFB3 as feedback to set the peak current of its power switch. This architecture allows for a programmable current limit on voltage regulation or voltage limit on current regulation. When configured as a boost voltage regulator, a feedback resistor from the output pin VOUT3 to the VFB3 pin sets the voltage level at VOUT3 at a fixed level. In this case, the IFB3 pin can either be grounded if no current limiting is desired or be connected to ground with a resistor to set an output current limit value (ILIMIT). As briefly noted before, the pull up current on the IFB3 pin is controlled to be typically 1/200 of the output load current at 24 Channel 3 can be configured either as a voltage-regulated boost converter or as a current-regulated boost converter. The regulation loop of channel 3 uses the greater of the two voltages at VFB3 and IFB3 as feedback to set the peak current of its power switch. This architecture allows for a programmable current limit on voltage regulation or a voltage limit on current regulation. the VOUT3 pin. In this case, when the load current is less than ILIMIT, channel 3 regulates the voltage at the VFB3 pin to 0.8V. If there is an increase in load current beyond ILIMIT, the voltage at VFB3 starts to drop and the voltage at IFB3 rises above 0.8V. The channel 3 loop then regulates the voltage at the IFB3 pin to 0.8V, limiting the output VVOUT3 5V/DIV IVOUT3 13mA/DIV 15V 20mA current at VOUT3 to ILIMIT. Figure 11 compares the transient responses with and without current limit when a current overload occurs. The channel 3 CAP3 pin has over voltage protection. When the voltage at CAP3 is driven above 29V, the channel 3 loop is disabled and SW3 pin stops switching. When configured as a boost current regulator, a feedback resistor from the IFB3 pin to ground sets the output current at VOUT3 at a fixed level. In this case, if the VFB3 pin is grounded then the over voltage protection defaults to 29V. On the other hand a resistor can be connected from the VOUT3 pin to the VFB3 pin to set an output voltage clamp (VCLAMP) level lower than 29V. In this case, when the voltage level is less than VCLAMP, the channel 3 loop regulates the voltage at the IFB3 pin to 0.8V. On the other hand, when the output load fails open circuit or disconnected, the voltage at IFB3 drops to reflect the lower output current and the voltage at VFB3 starts to rise. When the voltage at VOUT3 rises beyond VCLAMP, the voltage at the VFB3 pin goes VVOUT3 5V/DIV LOAD STEP IVOUT3 13mA/DIV 15V 20mA LOAD STEP IL4 200mA/DIV IL4 200mA/DIV 200µs/DIV VVIN = 3.6V WITHOUT CURRENT LIMIT: IFB3 CONNECTED TO GND VOUT3 STAYS AT 15V, OUTPUT CURRENT INCREASES FROM 20mA TO 40mA 200µs/DIV VVIN = 3.6V WITH 20mA CURRENT LIMIT: RIFB3 = 8.06k OUTPUT CURRENT STAYS AT 20mA, VOUT3 DROPS FROM 15V TO 7.5V Figure 11. Channel 3 in an output current overload event with and without output current limit VVOUT3 10V/DIV 20V OUTPUT LOAD DISCONNECTED IL4 200mA/DIV VVOUT3 10V/DIV 20V OUTPUT LOAD DISCONNECTED IL4 200mA/DIV 200µs/DIV VVIN = 3.6V WITHOUT PROGRAMMED OUTPUT VOLTAGE CLAMP: VFB3 CONNECTED TO GND 200µs/DIV VVIN = 3.6V WITH PROGRAMMED OUTPUT VOLTAGE CLAMP AT 24V Figure 12. Channel 3 in an output open circuit with and without programmed output voltage clamp Linear Technology Magazine • January 2009 DESIGN FEATURES L above 0.8V. The channel 3 loop then regulates the voltage at the VFB3 pin to 0.8V, limiting the voltage level at VOUT3 to VCLAMP. Figure 12 contrasts the transient responses with and without programmed VCLAMP when the output load is disconnected. Adjustable output voltage and wide output range of up to 32V for the positive boosts, and –32V for the inverter, make it a flexible solution for systems that require high voltage supplies. Channel 3’s ability to work as a voltage regulator or as a true 1-wire current Low Input Voltage LED DRIVER 20mA UP TO 12V While the LT3587’s VIN supply voltage range is 2.5V to 6.0V, the inductors can run off a lower voltage. Most portable devices and systems have a separate 3.3V logic supply voltage, which can be used to power the LT3587. This allows the outputs to be powered straight from the lower voltage power source such as two alkaline cells. This configuration results in higher efficiency. Figure 13 shows a typical digital still camera application powered this way. It has positive and negative CCD supplies and an LED backlight supply. Conclusion The LT3587 is a versatile, highly integrated device that provides a simple solution to devices such as cameras, handheld computers and terminals requiring multiple high voltage supplies. A low part count and a compact 3mm × 3mm package keep the solution size small. High efficiency conversion makes it suitable for battery powered applications. Linear Technology Magazine • January 2009 VFB3 VOUT3 CAP3 L4 10µH 2AA CELLS 2V TO 3.2V L1 15µH SW3 DS1 C1 4.7µF SW1 IFB3 CAP1 CFB1 3.3pF FLT LT3587 EN/SS1 EN/SS3 RFB1 787k FB1 VIN 3.3V SW2 C6 1µF L2 15µH 2AA CELLS 2V TO 3.2V GND C2 2.2µF C1: MURATA GRM21BR61E475KA12L C2: MURATA GRM188R61C225KE15D C4: MURATA GRM188R61E105KA12B C6: MURATA GRM155R61A105KE15D C7: MURATA GRM21BR71A106KE51L CFB2 6.8pF RFB2 1M L3 15µH CCD POSITIVE 15V 10mA VOUT1 FB2 DS2 Replace Inductor with Schottky for Smaller Footprint If higher current ripple is tolerable at the output of the inverter (channel 2), replace inductor L3 with a Schottky diode D3 as shown in Figure 14. Since the Schottky diode footprint is usually smaller than the inductor footprint, this alternate topology is recommended for space constrained applications. This topology is only viable if the absolute value of the inverter output is greater than VIN. This Schottky diode is configured with the anode connected to the output of the inverter and the cathode to the output end of the flying capacitor C2 as shown in Figure 14. C4 1µF DS3 RVFB3 787k (OPTIONAL) RIFB3 8.06k regulator give the LT3587 status as a true all-in-one power supply. Additional features, such as softstart, supply sequencing, output disconnect and fault handling also add to the versatility of this part and further simplify power supply design. L CCD NEGATIVE –8V 20mA C7 10µF CFB1: MURATA GRM1555C1H3R3BZ01D CFB2: MURATA GRM1555C1H6R3BZ01D L1, L2, L3: SUMIDA CDRH2D18/HP-150N L4: TOKO 1071AS-100M DS1, DS2, DS3: NXP PMEG2005EB Figure 13. Two AA cells produce CCD positive and negative supplies and a driver for a 3-LED backlight. OLED DRIVER 16V 20mA C4 1µF RVFB3 1.07M RIFB3 7.15k (OPTIONAL) VOUT3 VFB3 L4 10µH DS3 CAP3 SW3 L1 15µH VIN C6 1µF C1 DS1 4.7µF SW1 CAP1 IFB3 CFB1 2.7pF LT3587 FLT EN/SS1 EN/SS3 C3 100nF C5 100nF VVIN 2.5V TO 6V VVIN 2.5V TO 6V L2 15µH FB1 GND SW2 C2 2.2µF DS2 C1: TAIYO YUDEN TMK212BJ475KG-T C2: TAIYO YUDEN EMK107BJ225KA-T C3, C5: TAIYO YUDEN JMK063BJ104KP-F C4: TAIYO YUDEN GMK107BJ105KA-T C6: TAIYO YUDEN LMK105BJ105KV-F VOUT1 FB2 D3 RFB1 1M RFB2 1M CFB2 6.8pF C7 22µF CCD POSITIVE 15V 50mA CCD NEGATIVE –8V 100mA C7: TAIYO YUDEN LMK212BJ226MG-T CFB1: TAIYO YUDEN EMK105SK2R7JW-F CFB2: TAIYO YUDEN EMK105SH6R8JW-F L1, L2: SUMIDA CDRH2D18/HP-150N L4: TOKO 1071AS-100M DS1, DS2, DS3, D3: NXP PMEG2005EB Figure 14. Li-ion driver for an OLED panel and a CCD imager with a Schottky diode replacing the inverter’s output inductor 25