Datasheet

UNISONIC TECHNOLOGIES CO., LTD
L16B45A
Preliminary
CMOS IC
16-BIT CONSTANT CURRENT
LED SINK DRIVER

DESCRIPTION
The UTC L16B45A is designed for LED displays. UTC
L16B45A contains a serial buffer and data latches which convert
serial input data into parallel output format. At UTC L16B45A
output stage, sixteen regulated current ports are designed to
provide uniform and constant current sinks for driving LEDs within
a large range of Vf variations.
UTC L16B45A provides users with great flexibility and device
performance while using UTC L16B45A in their system design for
LED display applications, e.g. LED panels. Users may adjust the
output current from 3mA to 45mA through an external resistor, Rext,
which gives users flexibility in controlling the light intensity of LEDs.
UTC L16B45A guarantees to endure maximum 17V at the output
port. The high clock frequency, 25MHz, also satisfies the system
requirements of high volume data transmission.

FEATURES
* 16 constant-current output channels
* Constant output current invariant to load voltage change:
Constant output current range:
3~45mA @ VDD=5V
3~30mA @ VDD=3.3V
* Excellent output current accuracy:
between channels: ±2.5% (max.),
between ICs: ±3.0% (max.)
* Output current adjusted through an external resistor
* Fast response of output current, OE (min.): 70ns @ VDD=3.3V
* 25MHz clock frequency
* Schmitt trigger input
* 3.3V/5V supply voltage
* Halogen Free

ORDERING INFORMATION
Ordering Number
L16B45AG-R24-R
www.unisonic.com.tw
Copyright © 2015 Unisonic Technologies Co., Ltd
Package
SSOP-24
Packing
Tape Reel
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Preliminary

MARKING

PIN CONFIGURATION

PIN DESCRIPTION
PIN NO.
1
2
3
PIN NAME
GND
SDI
CLK
4
LE
5~20
OUT0 ~ OUT15
21
OE
22
SDO
23
R-EXT
24
VDD
CMOS IC
DESCRIPTION
Ground terminal for control logic and current sink
Serial-data input to the shift register
Clock input terminal for data shift on rising edge
Data strobe input terminal
Serial data is transferred to the output latch when LE is high. The data is latched
when LE goes low.
Constant current output terminals
Output enable terminal
When (active) low, the output drivers are enabled; when high, all output drivers are
turned OFF (blanked).
Serial-data output to the following SDI of next driver IC
Input terminal used to connect an external resistor for setting up output current for all
output channels
3.5V/5V supply voltage terminal
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
Preliminary
CMOS IC
BLOCK DIAGRAM
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
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VDD
0~7.0
V
Input Voltage
VIN
-0.4~VDD+0.4
V
Output Current
IOUT
+45
mA
Output Voltage
VDS
-0.5~+17.0
V
GND Terminal Current
IGND
720
mA
Power Dissipation (On PCB, TA=25°C)
PD
1.37
W
Thermal Resistance (On PCB, TA=25°C)
θJA
91
°C/W
Junction Temperature
TJ
150
°C
Operating Temperature
TOPR
-40~+85
°C
Storage Temperature
TSTG
-55~+150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

DC ELECTRICAL CHARACTERISTICS (VDD=5.0V)
PARAMETER
Supply Voltage
Output Voltage
SYMBOL
VDD
VDS
Output Current
“H” Level
“L” Level
Output Leakage Current
Input Voltage
Output Voltage SDO
Output Current 1
Current Skew
Output Current 2
Current Skew
Output Current vs. Output
Voltage Regulation
Output Current vs. Supply
Voltage Regulation
Pull-Up Resistor
IOUT
IOH
IOL
VIH
VIL
IOH
VOL
VOH
IOUT1
dIOUT1
IOUT2
dIOUT2
“OFF”
Supply Current
“ON”
MIN
4.5
TYP
5.0
MAX
5.5
UNIT
V
17.0
V
45
-1.0
1.0
VDD
0.3×VDD
0.5
0.4
4.6
3.1
±2.5
25.8
±2
mA
mA
mA
V
V
μA
V
V
mA
%
mA
%
±0.1
%/V
OUT0 ~ OUT15
DC Test Circuit
SDO
SDO
TA=-40~85°C
TA=-40~85°C
VDS=17.0V
IOL=+1.0mA
IOH=-1.0mA
VDS=1.0V, REXT=6000Ω
IOL=3.1mA, VDS=1.0V, REXT=6000Ω
VDS=1.0V, REXT=720Ω
IOL=25.8mA, VDS=1.0V, REXT=720Ω
3
0.7×VDD
GND
%/dVDS VDS=1.0~3.0V
%/dVDD VDD=4.5~5.5V
RIN(up)
Pull-Down Resistor
TEST CONDITIONS
±1.0
%/V
250
500
800
KΩ
250
500
800
KΩ
IDD(off) 1 REXT=Open, OUT0 ~ OUT15 =Off
2
2.8
mA
IDD(off) 2 REXT=1240Ω, OUT0 ~ OUT15 =Off
4
4.8
mA
IDD(off) 3 REXT=620Ω, OUT0 ~ OUT15 =Off
6
6.8
mA
IDD(on) 1 REXT=1240Ω, OUT0 ~ OUT15 =On
5.2
8.2
mA
IDD(on) 2 REXT=620Ω, OUT0 ~ OUT15 =On
6.5
9.5
mA
OE
RIN(down) LE
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
Preliminary
CMOS IC
DC ELECTRICAL CHARACTERISTICS (VDD=3.3V)
PARAMETER
Supply Voltage
Output Voltage
VDS
Output Current
“H” Level
“L” Level
Output Leakage Current
Input Voltage
Output Voltage
SYMBOL
VDD
SDO
Output Current 1
Current Skew
Output Current 2
Current Skew
Output Current vs. Output
Voltage Regulation
Output Current vs. Supply
Voltage Regulation
Pull-Up Resistor
IOUT
IOH
IOL
VIH
VIL
IOH
VOL
VOH
IOUT1
dIOUT1
IOUT2
dIOUT2
“OFF”
Supply Current
“ON”
MIN
3.0
TYP
3.3
MAX
4.5
UNIT
V
17.0
V
30
-1.0
1.0
VDD
0.3×VDD
0.5
0.4
2.9
3.1
±2.5
25.8
±2
mA
mA
mA
V
V
μA
V
V
mA
%
mA
%
±0.1
%/V
OUT0 ~ OUT15
DC Test Circuit
SDO
SDO
TA=-40~85°C
TA=-40~85°C
VDS=17.0V
IOL=+1.0mA
IOH=-1.0mA
VDS=1.0V, REXT=6000Ω
IOL=3.1mA, VDS=1.0V, REXT=6000Ω
VDS=1.0V, REXT=720Ω
IOL=25.8mA, VDS=1.0V, REXT=720Ω
3
0.7×VDD
GND
%/dVDS VDS=1.0~3.0V
%/dVDD VDD=3.0~3.6V
RIN(up)
Pull-Down Resistor
TEST CONDITIONS
±1.0
%/V
250
500
800
KΩ
250
500
800
KΩ
IDD(off) 1 REXT=Open, OUT0 ~ OUT15 =Off
1.7
2.3
mA
IDD(off) 2 REXT=1851Ω, OUT0 ~ OUT15 =Off
3.9
4.5
mA
OE
RIN(down) LE
IDD(off) 3 REXT=748Ω, OUT0 ~ OUT15 =Off
5.2
5.8
mA
IDD(on) 1 REXT=1851Ω, OUT0 ~ OUT15 =On
3.9
5.0
mA
IDD(on) 2 REXT=748Ω, OUT0 ~ OUT15 =On
5.2
5.8
mA
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
Preliminary
CMOS IC
SWITCHING ELECTRICAL CHARACTERISTICS (VDD=5.0V)
PARAMETER
CLK- OUT2n
CLK- OUT2n + 1
Propagation
Delay Time
(“L” to “H”)
LE- OUT2n
LE- OUT2n + 1
OE - OUT2n
OE - OUT2n + 1
CLK-SDO
CLK- OUT2n
CLK- OUT2n + 1
Propagation
Delay Time
(“H” to “L”)
LE- OUT2n
LE- OUT2n + 1
OE - OUT2n
OE - OUT2n + 1
Pulse Width
SYMBOL
TEST CONDITIONS
MIN
tpLH1
tpLH2
tPLH3
tPLH
tpHL1
tpHL2
tpHL3
VDD=5.0V, VDS=1.0V, VIH=VDD, VIL=GND
Rext=930Ω, VL=4.5V, RL=162Ω, CL=10pF
CLK-SDO
CLK
LE
tpHL
tw(CLK)
tw(L)
OE
tw(OE)
70
th(L)
tsu(L)
th(D)
tsu(D)
tr
tf
tr, SDO
tf, SDO
tor
tof
30
5
5
3
Hold Time for LE
Setup Time for LE
Hold Time for SDI
Setup Time for SDI
Maximum CLK Rise Time
Maximum CLK Fall Time
SDO Rise Time
SDI Fall Time
Output Rise Time of IOUT
Output Fall Time of IOUT
UNISONIC TECHNOLOGIES CO., LTD
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TYP MAX
UNIT
50
70
ns
35
55
ns
50
70
ns
35
55
ns
50
70
ns
35
55
ns
20
40
ns
90
110
ns
75
95
ns
90
110
ns
75
95
ns
90
110
ns
75
95
ns
20
40
ns
ns
ns
20
20
100
ns
10
10
40
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
500
500
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
Preliminary
CMOS IC
SWITCHING ELECTRICAL CHARACTERISTICS (VDD=3.3V)
PARAMETER
CLK- OUT2n
CLK- OUT2n + 1
Propagation
Delay Time
(“L” to “H”)
LE- OUT2n
LE- OUT2n + 1
OE - OUT2n
OE - OUT2n + 1
CLK-SDO
CLK- OUT2n
CLK- OUT2n + 1
Propagation
Delay Time
(“H” to “L”)
LE- OUT2n
LE- OUT2n + 1
OE - OUT2n
OE - OUT2n + 1
Pulse Width
SYMBOL
TEST CONDITIONS
MIN
tpLH1
tpLH2
tPLH3
tPLH
tpHL1
tpHL2
tpHL3
VDD=3.3V, VDS=1.0V, VIH=VDD, VIL=GND
Rext=930Ω, VL=3.0V, RL=100Ω, CL=10pF
CLK-SDO
CLK
LE
tpHL
tw(CLK)
tw(L)
20
20
OE
tw(OE)
100
th(L)
tsu(L)
th(D)
tsu(D)
tr
tf
tr, SDO
tf, SDO
tor
tof
30
5
5
3
Hold Time for LE
Setup Time for LE
Hold Time for SDI
Setup Time for SDI
Maximum CLK Rise Time
Maximum CLK Fall Time
SDO Rise Time
SDI Fall Time
Output Rise Time of IOUT
Output Fall Time of IOUT
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
TYP MAX
UNIT
50
70
ns
35
55
ns
50
70
ns
35
55
ns
50
70
ns
35
55
ns
20
40
ns
115
135
ns
100
120
ns
115
135
ns
100
120
ns
105
125
ns
90
110
ns
20
40
ns
ns
ns
130
ns
10
10
40
65
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
500
500
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
Preliminary
CMOS IC
APPLICATION INFORMATION
Constant Current
To design LED displays, UTC L16B45A provides nearly no variations in current from channel
to channel and from IC to IC. This can be achieved by:
1) The maximum current variation between channels is less than ±2.5%, and that between ICs is less than ±3%.
2) In addition, the current characteristic of output stage is flat and users can refer to the figure as shown below.
The output current can be kept constant regardless of the variations of LED forward voltages (VF). This performs as
a perfection of load regulation.
Adjusting Output Current
The output current of each channel (IOUT) is set by an external resistor, Rext. The relationship between IOUT and Rext
is shown in the following figure.
Also, the output current can be calculated from the equation:
VR-EXT=1.24V; IOUT=VR-EXT*( 1/Rext )x15; Rext=(VR-EXT/IOUT)x15
where Rext is the resistance of the external resistor connected to R-EXT terminal and VR-EXT is the voltage of R-EXT
terminal. The magnitude of current (as a function of Rext) is around 25mA at 744Ω and 10mA at 1860Ω.
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
Preliminary
CMOS IC
TEST CIRCUIT FOR DC ELECTRICAL CHARACTERISTICS
IDD
VDD
VDD
IIH, IIL
IOUT
OE
CLK
OUT0
LE
OUT15
SDI
R-EXT GND
VDS
SDO
VIH, VIL
Iref

TEST CIRCUIT FOR SWITCHING ELECTRICAL CHARACTERISTICS
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
Preliminary
CMOS IC
TIMING DIAGRAM
N=0
1
2
3
4
5
6
7
8
9
10
D8
D7
D6
D5
11
12
13
14
15
D2
D1
CLK
D15 D14 D13 D12 D11 D10 D9
D4
D3
D0
SDI
LE
OE
D0
OUT0
OFF
ON
OUT1
D1
OFF
ON
OUT2
D2
OFF
ON
OFF
OUT3
ON
D15
OUT15
OFF
ON
D15
SDO
don’t care

TRUTH TABLE
CLK
LE
OE
SDI
OUT0 … OUT7 … OUT15
SDO
H
L
Dn
Dn …… Dn - 7 …. Dn - 15
Dn-15
L
L
Dn+1
No Change
Dn-14
H
L
Dn+2
X
L
Dn+3
X
H
Dn+3
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Dn + 2 …… Dn - 5 ….
Dn - 13
Dn + 2 …… Dn - 5 ….
Dn - 13
Off
Dn-13
Dn-13
Dn-13
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
Preliminary
CMOS IC
TIMING WAVEFORM
tW(OE
OE
50%
50%
tPLH3
tPHL3
90%
50%
10%
OUTn
tof
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90%
50%
10%
tor
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
Preliminary
CMOS IC
EQUIVALENT CIRCUITS OF INPUTS AND OUTPUTS
OE
LE
terminal
terminal
VDD
IN
VDD
IN
CLK, SDI terminal
VDD
IN
SDO terminal
VDD
OUT
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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