LINEAR TECHNOLOGY OCTOBER 1994 IN THIS ISSUE . . . COVER ARTICLE The LT1372 500kHz Switching Regulator ....... 1 VOLUME IV NUMBER 3 The LT1372 500kHz Switching Regulator Bob Essaff Editor's Page ................... 2 Richard Markell LTC in the News............. 2 DESIGN FEATURES PCMCIA Card Socket Power Management ......... 3 Doug La Porte An Ultra-Selective Bandpass Filter with Adjustable Gain ........................................ 6 Philip Karantzalis New LT1182/1183 Dual CCFL/LCD Contrast Switching Regulator ....... 8 Anthony Bonte The LT1366 Family: Precision, Rail-to-Rail Bipolar Amplifiers ......... 13 William Jett and Sean Gold LTC1325 Battery Management System Offers Unparalleled Flexibility.. 17 by Bob Essaff Introduction The LT1372 is a 500kHz, constantfrequency, current-mode bipolar switching regulator with an on-chip power switch. The LT1372 is similar to the popular LT1172 but offers higher efficiency, and, due to the increased switching frequency, uses smaller external components, which save on board space, weight, and cost. An entire DC-to-DC converter based on the LT1372 consumes only 0.5 square inches. Packaged in an 8lead SOIC or DIP, it operates over a 2.5V to 35V input supply range and its current-limited switch can carry up to 1.5A with 0.45Ω on resistance. New design techniques increase the LT1372’s flexibility while maintaining ease of use. Switching is easily synchronized to an external logiclevel source. A logic low on the shutdown pin reduces supply current to 15µA. Unique error-amplifier SYNC 100k NFB LOW DROPOUT 2.3V REG ANTI-SAT & DRIVE BOOST LOGIC DRIVER NFB COMP + – FB EA Design Tools .................. 32 0.1Ω IA + 1.24V REF SWITCH – 50k New Device Cameos ....... 30 500kHz OSC SW 5:1 FREQUENCY SHIFT + (complete list on page 25) Sales Offices ................. 32 SHUTDOWN DELAY & RESET SD/SYNC Alan Rich DESIGN IDEAS ................................. 25–29 continued on page 20 VIN Anthony Ng, Teo Yang Long, and Robert Reay DESIGN INFORMATION Simple Thermal Analysis — A Real Cool Subject for LTC Regulators..................... 23 circuitry can regulate positive or negative output voltages while maintaining simple frequency-compensation techniques. Nonlinear error -amplifier transconductance reduces output overshoot on start-up or overload recovery. Oscillator frequency shifting protects external components during overload conditions. The LT1372 uses a new, high-speed process that is tailored to high-frequency switching regulators. Though slow when compared with state-ofthe-art digital technologies, this process is a compromise between speed and breakdown voltage, which is important for switching regulator design. Smaller device geometries allow for faster circuits at lower operating currents, increased circuit complexity, and lower parasitic resistance for a given die area. VC AV ≈ 6 – GND GND SENSE Figure 1. LT1372 Block diagram 1372_1.eps and LTC are registered trademarks and LT is a trademark of Linear Technology Corporation. EDITOR'S PAGE On Growing and Growth by Richard Markell Every year, things grow at their own pace: the beans grow up the trellis in August and the peppers and tomatoes ripen in September; the Great Pumpkin may not be ready until October. Linear Technology is different. The applications group has grown about sixfold in only six years. The ICdesign group has grown by a factor of more than three. We’ve got stacks and piles of scratched notes on customer problems on each applications engineer’s desk. Each and every designer is scratching his or her head trying to pack the most functionality into the smallest die size. There are now design centers in Boston and Singapore, in addition to the corporate headquarters in Milpitas. Analog circuit designers are difficult to find anywhere in the world, let alone where you’d like to find them. Growing a company is not like growing a single Jwala pepper, but more like growing the whole crop for salsa. Design and applications need fertilization (new parts) and new ideas to produce growth; more fabrication facilities must be built, packaging needs to be done, and these facilities must be provided on a worldwide basis in order to attract the type of talent required to grow the business in the direction that we’d all like. This issue is filled with morsels for the engineering palate. The LT1366 family is our first series of dual and quad bipolar operational amplifiers that combine rail-to-rail input and output specifications with precision offset-voltage specifications. This family maintains precision specifications over a wide range of operating conditions and capacitive loads. A feature article highlights (and backlights) the LT1182 and LT1183 dual CCFL/LCD contrast switching regulators. These parts are dual switching regulators that drive both the cold cathode fluorescent lamp and the liquid crystal display panels in portable computers and hand-held instruments. Another feature article examines the LTC1325 battery management system IC. This part offers the designer a complete solution to the problem of charging a wide variety of batteries, including NiMH, NiCad, lead-acid, and other battery chemistries. The part allows easy communications to a microprocessor by means of a four-wire interface. LT brings the future of switching regulators to the forefront by introducing the new LT1372 constant-frequency, current-mode switching regulator. The LT1372 saves board space, weight, and cost by combining a 500kHz switching frequency with an on-chip power switch (0.45 ohms) that can carry 1.5 amps. Linear Technology has entered the PCMCIA market with a variety of solutions. The LT1312 and LT1313 are micropower, single and dual 120mA PCMCIA VPP regulators/drivers to power and protect the VPP pins of PCMCIA slots. Also featured in the article on PCMCIA are the LTC1314 and LTC1315 single and dual VPP switching-matrix ICs with internal VCC N-channel gate drivers. The LTC1164-8 merits a feature article as it is the first completely integrated, high-Q, bandpass filter offered by Linear Technology. The part requires only an external operational amplifier and two resistors to implement very selective narrow bandpass filters with gains up to one thousand. We also present some timely information on thermal analysis. The article “Simple Thermal Analysis—A Real Cool Subject for LTC Regulators” gives thermal information and methods of calculating heat dissipation, heat sinking, and temperature rise. The Design Ideas section is full, as usual. The LT1585 regulator is featured in a circuit developed to power the new PentiumTM class of microprocessor. A novel circuit detailed in this section directly senses the negative output in a positive-to-negative converter. Additionally, we have many other new design ideas. LTC in the News... Linear Technology’s Annual Sales Cross $200 Million Thanks to the support of all of you who rely on the quality and performance of Linear Technology’s products, the company’s annual sales crossed the $200 million mark in fiscal 1994. Net sales for the fiscal year ended July 3, 1994 were a record $200,538,000, an increase of 33% over the previous year. The Company also reported record net income for the year of $56,827,000 or $1.51 per share, an increase of 56% over the $36,435,000 reported for fiscal 1993. Linear Technology has added Leo T. McCarthy and Richard M. Moley to its Board of Directors. Mr. McCarthy and Mr. Moley fill existing vacancies on the board. McCarthy is currently Lieutenant Governor of the State of California and has announced plans to retire from office at the end of 1994. Richard M. Moley is Chairman of the Board, President, and CEO of StrataCom, Inc., a telecommunications company. In its June 21 issue, Financial World magazine included Linear Technology on its list of “America’s 50 Best Mid-Cap Companies,” ranking the company 21st. In a very exclusive selection, WORTH magazine picked Linear Technology for its list of “50 New Blue Chip Stocks.” More than a thousand companies were considered before the final selection was made. The only other semiconductor company to make the list was Intel. LTC also made another prestigious current list: Financial World’s “America’s Best 200 Growth Companies.” We made this list last year, too, but this year LTC was 13th compared to 22nd on the list in 1993. In June the Entrepreneur of the Year Institute named Linear Technology President and CEO Robert H. Swanson, Jr. “Northern California Entrepreneur of the Year in Electronics.” Pentium is a trademark of Intel Corporaton 2 Linear Technology Magazine • October 1994 DESIGN FEATURES PCMCIA Card Socket Power Management by Doug La Porte Introduction A variety of products are designed with sockets to accept PCMCIA cards, such as extended memories, fax modems, network interfaces, wireless communicators, and a wide assortment of other devices. These products include personal digital assistants (PDAs), bar-code readers, palmtop computers, and portable medical equipment. The Personal Computer Memory Card International Association (PCMCIA) has released specifications that outline the general power requirements for these cards. The specification calls for an unusual amount of voltage switching. Host power delivery to the PC card socket flows through two paths: the main VCC supply pins and the VPP programming pins. Both supplies are switchable to different voltages to accommodate a wide range of card types. The VCC supply is the main supply and must be capable of providing up to 1A at either 3.3V or 5V, as well as a high impedance state. The 1A rating is an absolute maximum derived from the contact rating of 500mA per pin for both VCC pins. One of the most stringent actual requirements is during hard disk drive spin-up. Present hard drives require 5V at 500–600mA for a short dura- tion during spin-up. Current draw drops to 300–420mA during read and write operations. The VPP supply must source 12V at up to 120mA, 3.3V or 5V at lesser currents, 0V, and realize a high impedance state. The VPP supply is intended solely for flash-memory programming. The 120mA current requirement allows erasing two flash devices and writing to two devices simultaneously. These diverse, specific requirements call for specialized solutions. There are two general approaches to providing VPP power to PCMCIA card sockets: linear driver/regulators and a VPP switch matrix. The linear regulator approach utilizes a regulator that incorporates resistors and switches to program the output voltage to the appropriate level. This solution requires a voltage of about 13V or higher. At first this may seem undesirable but, as will be shown later, when designed as part of a portable system’s power supply from the beginning, this higher voltage is derived at little cost. The linear regulator also provides current and thermal limiting for short-circuit protection. The switch-matrix approach consists of several MOSFET switches arranged to route the input voltages to the VPP pins. This approach requires that all VLOGIC 13V TO 20V VCC A_VPP_PGM 51k EN0 VS VPPOUT A_VPP_VALID VALID VPP1 + VPP2 1µF EN1 LT1312 A_VPP_VCC VCC SENSE PCMCIA CARD SOCKET voltages be present at the matrix inputs. The switch approach has the advantages of simplicity and efficiency, but lacks built-in current limiting and short-circuit protection. LT1312: Linear VPP Driver/Regulator Figure 1 shows a space-efficient, cost-effective power-management solution for PCMCIA sockets. Power to the two VPP pins, usually tied together to reduce cost, is provided by the LT1312 single VPP driver/ regulator. The LT1312 is a linear regulator with programmable output, designed specifically for PCMCIA VPP drive applications. Figure 2 shows the circuit block diagram. The LT1312 takes a raw, unregulated 13–20V input supply and produces a clean, regulated, selectable output voltage in conformance with the PCMCIA standard. The VPP pins are programmable to provide either 0V, 3.3V, 5V, 12V, or a high-impedance state. Two enable inputs (EN0 and EN1) and the VCC sense inputs select among these five states, as shown in Table 1. When a VCC voltage is selected, a comparator in the LT1312 automatically switches the VPPOUT pin to 5V or 3.3V, depending on the voltage present at the SENSE pin. The SENSE pin connects to the PCMCIA socket VCC pin. A second comparator monitors the output voltage when the VPP pin requires 12V. This comparator drives GND 5V PCMCIA CONTROLLER Table 1. LT1312 truth table A_VCC_5 IN1 A_VCC_3 IN3 EN0 Q1 1/2 Si9956DY VS OUT1 LTC1165 IN2 OUT2 OUT3 GND + 10µF Q2 Si9956DY Q3 3.3V Figure 1. Typical single-socket power-management system Linear Technology Magazine • October 1994 PCMCIA_1.eps EN1 SENSE 0 0 X 1 0 X 0 1 3V–3.6V 0 1 4.5V–5.5V 1 1 X X = Don’t care VPP OUT VALID 0V 12V 3.3V 5V Hi-Z 1 0 1 1 1 3 DESIGN FEATURES VS + VCC SENSE VPPOUT LOW DROPOUT LINEAR REGULATOR – EN1 4V EN0 VALID + VOLTAGE CONTROL LOGIC – 11V PCMCIA_2.eps Figure 2. LT1312 Block diagram the open collector VALID pin low when VPP is greater than 11V. Many PCMCIA controllers require this signal for verification that flash memory programming can proceed safely. When switching the VPP signal to 12V, the output is clean and of moderate rise time to prevent voltage overshoot and subsequent damage to flash memory parts. The LT1312 also has a 200mA nominal output current capability with a 250mA short-circuit current limit and thermal shutdown. These protection features can be very important when considering the overall reliability and robustness of the main system. An additional feature of the LT1312 is its low 25µA quiescent current in 0V or high-impedance modes. LTC1148-3.3 OR VIN LTC1142 (3.3V REG) PDRIVE NDRIVE A dual VPP linear regulator, the LT1313, is also available. Three N-channel MOSFETs, driven by an LTC1165 triple inverting MOSFET gate driver, provide VCC pin power switching. P-channel MOSFETs can be used in place of the driver and Nchannel parts, at the expense of significantly higher on-resistance. This is of greater significance as VCC goes lower, as in the case of the two 3.3V switches. These very low-threshold P-channel parts are also much more costly and more difficult to obtain than the more common Nchannel parts. The LTC1165 provides a natural break-before-make action and smooth transitions due to the asymmetrical turn-on and turn-off 5.5V TO 14.5V + Q1 Q2 C1 22µF + D2 T1 22µH 3.38T D1 R1 100Ω SENSE+ C2 1000pF SENSE– + D3 18V C5 22µF 14V AUXILIARY SUPPLY R5 0.040Ω R2 100Ω R3 12k C4 C3 R4 1000pF 22µF 22Ω 3.3V + C6 100µF + C7 OUTPUT 100µF Q3 VN7002 TO SOCKET VPP PINS HC86 EN0 PCMCIA CONTROLLER VS VPPOUT LT1312 EN1 + 1µF VALID SENSE GND C1,C3, C5 = AVX 22µF, 25V TPSD226M025R0200 C6, C7 = AVX 100µF, 10V TPSD107M010R0100 D1 = MBRS140 D2 = MBRS1100 Q1 = Si9430DY Q2 = Si9410DY T1 = DALE LPE-6582-A086 DALE (605) 665-9301 FROM SOCKET VCC PINS Figure 3. Deriving 14V power from a 3.3V auxiliary winding 4 PCMCIA_3.eps of the MOSFET’s. A noninverting version, the LTC1163, is available for controllers with high asserted logic. Auxiliary Winding Power Supplies for Use with the LT1312 Because the LT1312 provides excellent output regulation, the input voltage may come from a loosely regulated source. One convenient and economic source of power is an auxiliary winding on the main switching regulator inductor of the system power supply. LTC1142 or LTC1148-3.3 Auxiliary Winding Power Supply for Low Input Voltages An auxiliary winding to the 3.3V inductor of an LTC1142 or LTC11483.3-based 3.3V power supply creates a loosely regulated 14V power supply, as shown in Figure 3. Diode D2 rectifies the 11V output from this additional winding, adding it to the main 3.3V output. (Note the phasing of the auxiliary winding, as shown in the figure.) Referencing the auxiliary winding to the main 3.3V output provides DC current feedback from the auxiliary supply to the main 3.3V section. Returning the lead of C5 to the 3.3V output as shown improves the AC transient response. A TTL logic high on the enable line (EN0) activates the 12V output. This will force the 3.3V section of the LTC1142 (or LTC1148-3.3) into the continuous mode of operation. A resistor divider, composed of R2, R3, and switch Q3, forces an offset to counteract the internal offset at the −SENSE input of the part. Burst ModeTM operation ceases when this external offset cancels the device’s built-in 25mV offset, forcing the switching regulator into continuousmode operation. (See the LTC1142 and LTC1148 data sheets for further detail.) In this mode, the LT1312 output can be loaded without regard to loading on the 3.3V output of the regulator. Burst Mode is a trademark of Linear Technology Corporaton Linear Technology Magazine • October 1994 DESIGN FEATURES + C1 47µF + VCC SELECT 13V TO 20V (MAY BE FROM AUXILIARY WINDING) D1 MBRS130LT3 L1 22µH SW SENSE C2 33µF VOUT 10µF LT1301 5V VIN + SHDN ILIM PGND GND NC 5V LT1121 SHDN ILIM PGND GND 100k EN0 EN1 DRV5 VCC0 VCC(IN) VCC1 VPP2 0.1µF Q2A PCMCIA CONTROLLER VCC + DRV3 EN0 PC CARD SOCKET Q1A 1/2 Si9956DY VPPIN VPPOUT LTC1314 VPP1 5V 10µF EN1 DRV5 VCC0 VCC(IN) VCC1 DRV3 VPP1 0.1µF 5V Q1A 1/2 Si9956DY VPP2 PC CARD SOCKET VCC + 10µF Q2A GND GND L1 = SUMIDA CD75-220K C1 = AVX TPSD476M016R0150 C2 = AVX TPSD336M020R0200 SUMIDA (708) 956-0666 56.2k VDD SHDN 2N7002 VPPIN VPPOUT LTC1314 PCMCIA CONTROLLER 1µF 5V VDD SHDN + 121k 200pF Q2B Q2B Si9956DY 3.3V 3.3V PCMCIA_4.eps Figure 4. LTC1314 switch matrix with the LT1301 boost regulator LTC1314: VCC switch driver and VPP switch matrix Figure 4 shows another approach that is very space and power efficient. Here the LTC1314 PCMCIA switch matrix, used in conjunction with the LT1301 DC-DC converter, provides complete power management for a PCMCIA card slot. The LTC1314 and LT1301 combination provide a highly efficient, minimal parts count solution. This circuit is especially useful for designers who are adding PCMCIA sockets to existing systems that currently have 5V or 3.3V available. Table 2 shows the truth table for the LTC1314. A dual version of this part, the LTC1315, is available in the 24lead SSOP package. The LTC1314 directly drives three inexpensive N-channel MOSFETs providing VCC pin power switching. An on-chip charge pump provides the necessary voltage to fully enhance the MOSFETs. With the built in charge pump, the MOSFET drive is available without the need for a constant 12V supply. The LT1301 switching regulator is normally in shutdown mode and consumes only 10µA, except during the brief flash memory-programming cycles where VPP0 is set to 12V. This method results in low onLinear Technology Magazine • October 1994 Si9956DY PCMCIA_5.eps Figure 5. LTC1314 with the LT1121 linear regulator resistance VCC switching while maintaining maximum efficiency. The VPP switching is accomplished by a combination of the LTC1314 and LT1301 DC/DC converter. As stated above, the LT1301 DC/DC converter is in shutdown mode to conserve power until the VPP pins request 12V. When VPP pins require 12V, the LT1301 is activated and the LTC1314’s internal switches route the VPPIN pin to the VPPOUT pin. The LT1301 is capable of delivering 12V at 120mA while maintaining high efficiency. The LTC1314’s breakbefore-make and slope controlled switching will control the output voltage transition to be smooth, of moderate slope and without overshoot. This is critical for flash memory products to prevent damaging parts from overshoot and ringing exceeding the 14V part limit. The LTC1314 with the LT1121 Linear Regulator Often, systems have supply voltages greater than 12V available. The LTC1314, in conjunction with the LT1121 linear regulator, supplies the PC card socket with all necessary voltages. Figure 5 shows this circuit, where Q1 is used to invert the shutdown logic signal. Any spare TTL inverter can also be used. The auxiliary winding technique shown earlier continued on page 19 Table 2. LTC1314 truth table EN0 EN1 0 0 0 1 1 0 1 1 X X X X X X X X X = Don’t care VCC0 VCC1 VPPOUT DRV3 DRV5 X X X X 1 0 0 1 X X X X 0 1 0 1 GND VCC IN VPPIN Hi-Z X X X X X X X X 1 0 0 0 X X X X 0 1 0 0 5 DESIGN FEATURES An Ultra-Selective Bandpass Filter with Adjustable Gain by Philip Karantzalis Introduction The LTC1164-8 is a monolithic, ultra-selective, eighth order, elliptic bandpass filter. The passband of the LTC1164-8 is tuned with an external clock; the clock-to-center-frequency ratio is 100:1. The stopband attenuation of the LTC1164-8 is greater than 50dB for input frequencies outside a narrow band defined as ±4% of the center frequency of the filter (see Figure 1). One Op Amp and Two Resistors Build an Ultra-Selective Filter The LTC1164-8 requires an external op amp and two external resistors. The filter’s gain at its center frequency is equal to 3.4R F/R IN. For optimum dynamic range with a gain equal to one, the external resistor R F should be 90.9k and the external resistor R IN should be 340k. For gains other than one, R IN = 340k/gain. Gains of up to 1000 are possible. The complete configuration is shown in Figure 2. Note that programming the filter’s gain with input resistor R IN is equivalent to providing the LTC1164-8 with noiseless preamplification, since the filter’s internal noise is not amplified. The wideband noise of the LTC11648 measures 400µVRMS at ±5V and is independent of the filter’s gain and RIN 340k VIN 1 14 2 13 3 5V 4 12 LTC1164-8 11 5 10 6 9 7 8 CF 160pF RF 90.9k –5V 100kHz 5V 2 – 3 + 7 LT1006 6 VOUT 4 –5V 11648_2.eps Figure 2. LTC1164-8 ultra-narrow, 1kHz bandpass filter with gain (gain = 340k/R IN, 1/2πRF C F = 10 fCENTER). center frequency. A capacitor, CF, across resistor R F reduces clock feedthrough and provides a smooth sine-wave output. Signal Detection in a Hostile Environment An outstanding feature of the LTC1164-8 is its ultra-selectivity. A bandpass filter with ultra-selectivity is ideal for signal detection applica- tions. One signal-detection application occurs when two signals are very closely spaced in the frequency spectrum and only one of the signals has useful information. The LTC1164-8 can extract the signal of interest and suppress its unwanted neighbor. For example, a small 1kHz, 10mVRMS signal is combined with an unwanted 950Hz, 40mVRMS signal. The two signals differ in frequency by only five 10 0 –10 GAIN (dB) –20 –30 –40 –50 –60 –70 –80 –90 0.90 0.95 1.00 1.05 FREQUENCY (kHz) 1.10 11648_1.eps Figure 1. LTC1164-8 Gain vs. frequency response 6 Figure 3. Narrow-band signal extraction showing input to and output from the LTC1164-8 filter. Filter center frequency set to 1kHz with gain = 100. Linear Technology Magazine • October 1994 DESIGN FEATURES percent and the 950Hz signal is four times larger than the 1kHz signal. To detect the 1kHz signal, the LTC11648 is set to a gain of 100 and the clock frequency is set to 100kHz. At the filtered output of the LTC1164-8 the following signals will be present: an extracted 1kHz, 1VRMS signal and a rejected 950Hz, 2.7mVRMS signal, as shown in Figure 3. In a narrow-band signal separation and extraction application, as described previously, the LTC1164-8 provides a simple and reliable detection circuit solution. A second signal-detection application occurs when a small signal is to be detected in the presence of noise. For example, a 1kHz, 10mVRMS signal is mixed with a wideband noise signal that measures 5mVRMS in a 400Hz frequency band. The signal-to-noise ratio is just 6dB. With the LTC11648 set for a center frequency of 1kHz (fCLK is equal to 100kHz) and a gain of 100, the 1kHz, 10mVRMS signal will be detected and amplified. The wideband noise will be band-limited by the very narrow band gain response of the LTC1164-8. At the output of a LTC1164-8, the 1kHz signal will be 1VRMS, as shown in Figure 4. The total band-limited noise will be 70mVRMS, with a signal-to-noise ratio of more than 20dB, as shown in Figure 5. In applications of signal detection in the presence of noise, the LTC1164-8 provides asynchronous detection. Signal detection circuits such as synchronous demodulators and lock-in amplifiers require the presence of a reference or carrier signal to provide phase and frequency information of the signal to be detected. With an LTC1164-8, signal detection is accomplished by selecting a very narrow signal detection band around the frequency of the desired signal, which is defined as f CLK divided by 100 (f CLK is the clock frequency of the LTC1164-8), and by selecting the filter gain by choosing the value of a resistor. Linear Technology Magazine • October 1994 Figure 4. Signal detection in the presence of noise example showing input to and output from the LTC1164-8 filter. Filter center frequency set to 1kHz with gain = 100. Figure 5. Wideband noise input to LTC1164-8 filter. Plots show input to and output from the filter. Filter center frequency set to 1kHz with gain = 100. 7 DESIGN FEATURES New LT1182/1183 Dual CCFL/LCD Contrast Switching Regulator by Anthony Bonte Introduction The current generation of portable computers and instruments use backlit liquid-crystal displays (LCDs). These displays also appear in other applications, including medical equipment, automobiles, gas pumps, and retail terminals. Cold-cathode fluorescent lamps (CCFLs) provide the highest available efficiency for backlighting the display. These lamps require high voltage AC to operate, mandating an efficient, highvoltage DC–AC converter. In addition to good efficiency, the converter should deliver the lamp drive in the form of a sine wave. This is desirable to minimize RF emissions. Such emissions can cause interference with other devices, and can also degrade overall operating efficiency. The sinewave excitation also provides optimal current-to-light conversion in the lamp. The circuit should also permit lamp intensity control from zero to full brightness with no hysteresis or “pop-on.” The LCD also requires a bias supply for contrast control. The supply’s output should be regulated, and variable over a considerable range. Manufacturers now offer an array of either positive or negative contrastvoltage displays. These displays differ in operating-voltage range, contrastadjust range and power consumption. The small size and battery-powered operation associated with LCD-equipped apparatus mandate low component count and high efficiency. Size constraints place severe limitations on circuit architecture, and long battery life is usually a priority. Laptop and hand-held portable computers offer an excellent example. The CCFL and its power supply are responsible for almost 50% of the battery drain. Displays found in newer color machines can have contrast power-supply battery drains as high as 20%. Additionally, all components, 8 including PC board and hardware, usually must fit within the LCD enclosure with a height restriction of 0.25". New LTC Parts Linear Technology has invested an enormous amount of time, resources, and technical capability in providing the premier backlight/contrast solutions for system designers. In continuing this commitment, Linear Technology introduces the LT1182/ LT1183. These new devices achieve a high level of system integration for a backlight/contrast solution. In addition, they reduce system power dissipation, maintain high efficiency operation, require fewer external components, and reduce overall system cost. The LT1182/LT1183 are dual, fixed-frequency, current-mode switching regulators that provide the control function for cold-cathode fluorescent lighting and liquid-crystal display contrast. Two high-current, high-efficiency switches are included on the die, along with an oscillator, reference, output-drive logic, control blocks, and protection circuitry. Separate analog and power grounds for the regulators minimize interaction. Combining both control functions onto one die and maximizing performance allows the IC to fit into a narrow-body 16-pin SOIC. Board space and insertion cost are reduced in comparison with devices that require two independent regulators. Also, external components required with previous solutions have been integrated onto the IC, providing a more economical solution. The LT1184 is also available and provides only the CCFL function. The LT1182/LT1183 operate with supply voltages from 3V to 30V and draw only 9mA quiescent current. An active low shutdown pin reduces total supply current to less than 50µA for standby operation. A 200kHz switching frequency minimizes the size of required magnetic components. The use of current-mode switching techniques with cycle-by-cycle limiting gives high reliability and simple loop frequency compensation. The CCFL switching regulator typically drives an inductor that acts as a switched-mode current source for a current-driven Royer-class converter with efficiencies as high as 90%. The control loop forces the regulator to pulse-width modulate the inductor’s average current to maintain constant current in the lamp. The constant current’s value, and thus lamp intensity, is programmable. This drive technique provides a wide range of intensity control. A unique lampcurrent programming block permits either grounded-lamp or floatinglamp configurations. Grounded-lamp circuits directly control one-half of actual lamp current. Floating-lamp circuits directly control the Royer’s primary-side converter current. Floating-lamp circuits provide differential drive to the lamp and reduce the loss from stray lamp-to-frame capacitance, extending illumination range. The LCD contrast switching regulator is typically configured as a flyback converter and generates a bias supply for contrast control. The supply’s variable output permits adjustment of contrast for the majority of available displays. Newer types of displays require a constant supply voltage and provide contrast adjustment through a separate digital control pin. A unique, dual-polarity error amplifier and the selection of a flyback converter topology allow either positive or negative LCD-contrast voltages to be generated with minor circuit changes. The LT1182 and LT1183 differ in their pinouts for the LCD-contrast error amplifier. The LT1182 brings out the individual Linear Technology Magazine • October 1994 DESIGN FEATURES VIN BAT 14 12 SHUTDOWN 6 SHUTDOWN UNDERVOLTAGE LOCKOUT 2.4V REGULATOR ROYER 13 THERMAL SHUTDOWN LCD VSW CCFL VSW 9 16 200kHz OSC Q2 DRIVE 2 LOGIC 2 ANTISAT2 Q5 1× GAIN = 4.4 0µA TO 100µA + – – + + V2 1.24V 7 + – Q6 2× ILIM AMP1 R1 0.125Ω – Q11 GAIN = 4.4 Q3 2× + Q4 5× CCFL – –10mV LCD 8 COMP1 R3 1k ILIM AMP2 – LCD LCD PGND VC gm D2 6V + Q1 DRIVE 1 ANTISAT1 + – COMP2 R2 0.25Ω LOGIC 1 R4 0.1Ω Q7 9× Q8 1× Q9 3× V1 0.45V Q10 2× D1 11 10 2 5 3 15 4 1 FBP FBN ICCFL AGND DIO BULB CCFL VC CCFL PGND LT1183: FBP AND FBN ARE TIED TOGETHER TO PIN 10 REFERENCE IS BROUGHT OUT TO PIN 11 1182_1.eps Figure 1. LT1182/LT1183 CCFL/LCD contrast top-level block diagram error-amplifier inputs for setting up positive- and negative-polarity contrast capability, whereas the LT1183 ties the error-amplifier inputs together and brings out an internal reference. The reference may be used in generating negative contrast voltages or in programming lamp current. Operation Fixed-frequency, current-mode switchers control switch duty cycle directly by switch current rather than by output voltage. Referring to the block diagram for the LT1182/LT1183 in Figure 1, the switch for each regulator is turned ON at the start of each oscillator cycle. The switches are turned OFF when switch current reaches a predetermined level. The control of output lamp current is obtained by using the output of a unique programming block to set current trip level. The contrast voltage is controlled by the output of a Linear Technology Magazine • October 1994 dual-input-stage error amplifier, which sets current trip level. The current-mode switching technique has several advantages. First, it provides excellent rejection of input voltage variations. Second, it reduces the 90° phase shift at mid-frequencies in the energy storage inductor. This simplifies closed-loop frequency compensation under widely varying input-voltage or output-load conditions. Finally, it allows simple, pulse-by-pulse current limiting to provide maximum switch protection under output overload or short-circuit conditions. The LT1182/LT1183 incorporate a low-dropout internal regulator that provides a 2.4V supply for most of the internal circuitry. This low-dropout design allows input voltage to vary from 3V to 30V with little change in quiescent current. An active low shutdown pin reduces total supply current to less than 50µA and locks out switching action for standby operation. The LT1182/LT1183 incorporate undervoltage protection by sensing regulator dropout and locking out switching below about 2.5V. The regulator also provides thermal-shutdown protection and locks out switching in the presence of excessive junction temperatures. A 200kHz oscillator is the basic clock for all internal timing. The oscillator turns on each output switch by means of its own logic and driver circuitry. Adaptive anti-saturation circuitry detects the onset of saturation in each power switch and adjusts base-drive current instantaneously to limit switch saturation. This minimizes driver dissipation and provides rapid turn-off of the switch. The CCFL power switch is guaranteed to provide a minimum of 1.25A and the LCD power switch is guaranteed to provide a minimum of 0.625A. The anti-saturation circuitry provides a 9 DESIGN FEATURES ratio of switch current to driver current of about 40:1. Simplified LampCurrent Programming A programming block in the L T1182/LT1183 controls lamp current, permitting either groundedlamp or floating-lamp configurations. Grounded configurations control lamp current by directly controlling one-half of actual lamp current and converting it to a feedback signal to close a control loop. Floating configurations control lamp current by directly controlling the Royer’s primary-side converter current and generating a feedback signal to close a control loop. Previous backlighting solutions have used a traditional error amplifier in the control loop to regulate lamp current. This approach converted an RMS current into a DC voltage for the input of the error amplifier. This approach used several time constants to provide stable loop frequency compensation. This compensation scheme meant that the loop had to be fairly slow and that output overshoot with start-up or overload conditions had to be carefully evaluated in terms of transformer stress and breakdown voltage requirements. The LT1182/LT1183 eliminate the error-amplifier concept entirely and replace it with a novel lamp-current programming block. This block provides an easy-to-use interface to program lamp current. The programmer circuit also reduces the number of time constants in the control loop by combining the error-signal conversion scheme and frequency compensation into a single capacitor. The control loop thus exhibits the response of a single-pole system, allows for faster loop transient response, and virtually eliminates overshoot under start-up or overload conditions. Finally, these parts include openlamp protection circuitry, with user control by means of a simple, external RC network. This significantly eases the breakdown requirements for the transformer and lowers the 10 cost associated with winding a highvoltage transformer. Lamp current is programmed at the input of the programmer block, the ICCFL pin. This pin is internally regulated to 450mV and accepts a DC input current signal of 0–100µA. This input signal is converted to a 0–500µA source current at the CCFL VC pin. By regulating the ICCFL pin, the input programming current can be set with DAC, PWM, or potentiometer control. In a grounded-lamp configuration, the low-voltage side of the lamp connects directly to the LT1182/LT1183 DIO pin. This pin is the common connection between the cathode and anode of two internal diodes. In previous grounded-lamp solutions, these diodes were discrete units; in the LT1182/LT1183, they are integrated onto the IC. Bidirectional lamp current flows in the DIO pin and thus the diodes conduct on alternate half cycles. Lamp current is controlled by monitoring one-half of the lamp current. The diode conducting on negative half cycles has one-tenth of its current diverted to the CCFL pin and nulls against the source current provided by the lamp-current programmer circuit. The compensation capacitor on the CCFL VC pin provides both loop compensation and an averaging function to the rectified sinusoidal lamp current. Therefore, input programming current is related to one-half of average lamp current. If a floating-lamp configuration is used, the DIO pin is grounded. In a floating-lamp configuration, the lamp is fully floating with no galvanic connection to ground. This allows the transformer to provide symmetric, differential drive to the lamp. Balanced drive eliminates the field imbalance associated with parasitic lamp-to-frame capacitance and reduces “thermometering” (uneven lamp intensity along the lamp length) at low lamp currents. Display designs should be carefully evaluated in relation to construction shape, materials, and asymmetric lamp wiring, as energy leakage terms degrading efficiency up to 20% have been noted in practice. Maintaining closed-loop control of lamp current now necessitates deriving a feedback signal from the primary side of the Royer transformer. Previous solutions have used an external precision shunt and high-side sense amplifier configuration. This approach has been integrated onto the LT1182/LT1183 for simplicity of design and ease of use. Primary-side Royer-converter current is related to lamp current by the turns ratio of the transformer and its reflected impedances. The Royer-converter current is monitored across an internal 0.1Ω resistor, which is connected across the input terminals of a high-side sense amplifier. The input terminals are represented by the BAT and Royer pins. A 0–1A Royer primary-side, center-tap current is translated to a 0–500µA sink current at the CCFL VC pin to null against the current source provided by the programmer circuit. Once again, the compensation capacitor on the CCFL VC pin provides both loop compensation and an averaging function to the error sink current; therefore, input-programming current is related to average Royer-converter current. Floatinglamp circuits operate similarly to grounded-lamp circuits, except for the derivation of the feedback signal. However, floating-lamp circuits permit the lamp to operate over a 40:1 intensity range without “thermometering,” whereas grounded-lamp circuits are usually limited to a 10:1 range. Open-lamp protection is provided by an internal, 7V-threshold comparator connected between the BAT and Lamp pins. This circuit sets a maximum voltage level across the primary side of the Royer converter and limits the maximum transformer output voltage under start-up or open-lamp conditions. This eases transformer voltage-rating requirements. The Lamp pin is connected to the junction of an external resistor divider network. The divider network connects from the center tap of the Royer transformer to the top side of the Royer inductor. A capacitor across the top of the divider network filters Linear Technology Magazine • October 1994 DESIGN FEATURES out switching ripple and sets a time constant that determines how quickly the clamp activates. When the comparator activates, current is generated to pull the CCFL VC pin down. This action transfers the entire regulator loop from current-mode operation into voltage-mode operation. Dual-Polarity Contrast Capability The LCD contrast regulator can be operated in many standard switching configurations. A dual-input-stage error amplifier can regulate either positive or negative contrast voltages. In fact, if a flyback configuration is chosen, divider networks can be implemented for both polarities of contrast. Output polarity is then determined by which side of the transformer secondary the output connector grounds. If only positive contrast voltages are to be generated, one can also use a boost converter topology for higher efficiency operation. The FBN pin is the noninverting terminal for the negative contrast-control error amplifier. The inverting terminal is offset from ground by −10mV to define the erroramplifier output state under startup conditions. The FBN pin acts as a summing junction for the resistor divider network. FBN input bias current is typically −1µA. The FBP pin is the inverting terminal for the positive contrast-control error amplifier. The noninverting terminal is tied to an internal 1.24V reference. FBP input bias current is typically 0.5µA. The LCD VC pin is the high-impedance current output (gm) for the contrast error amplifier. A series RC network to ground typically performs loop frequency compensation. Floating CCFL with Variable-Negative/FixedPositive Contrast Figure 2 is a complete floating CCFL circuit with variable-negative/fixedpositive contrast voltage generation based on the LT1182. Q1, Q2, L1, and C1 form the core of the Royer converter. The LT1182 CCFL VSW pin and UP TO 6mA LAMP ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3B WITH AN ESR ≥ 0.5Ω TO PREVENT LT1182 HIGH-SIDE SENSE RESISTOR DAMAGE DUE TO SURGE CURRENTS AT TURN-ON. 10 C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20 C2 27pF 3kV 6 L1 = SUMIDA EPS-207 OR COILTRONICS CTX110605. PIN NUMBERS SHOWN FOR COILTRONICS UNIT (C1 VALUE MAY REQUIRE ADJUSTMENT WITH COILTRONICS). 1 C5 1000pF R2 220k L3 = COILTRONICS CTX02-12403 COILTRONICS (407) 241-7876 SUMIDA (708) 956-0666 R3 100k Q2* V (CCFL) 0V TO 5V kHz PWM 1 R5, 40.2k, 1% 2 C7, 1µF 4 5 6 SHUTDOWN R7, 1k 5 7 8 CCFL PGND ICCFL CCFL VSW BULB 4 + R1 750Ω Q1* L2 100µH 3 C8 1µF 3 C3B 2.2µF 35V C1* 0.033µF *DO NOT SUBSTITUTE COMPONENTS 0µA TO 50µA ICCFL CURRENT GIVES ≈ 0mA TO 6mA BULB CURRENT. 2 + L2 = COILTRONICS CTX100-4 R4 34k 1% BAT 8V TO 28V L1 Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001 C6 4.7µF L2 form the switch-mode current source that drives the Royer. The 200kHz switching frequency allows the use of only 100µH for L2. Hookup for a floating-lamp configuration is as simple as placing the high-side sense resistor in series with the center tap of the Royer transformer and floating the lamp on the transformer secondary. The feedback signal generated by the Royer-converter current is converted to an error current at the CCFL VC pin. This current is then averaged by compensation capacitor C7 to null against the programming current source. C7’s value of 1µF provides stable loop compensation and excellent transient response under startup conditions. It is important to note that the catch diode D1 is returned to the BAT side of the high-side sense resistor. This connection maintains current flow in L2 when the switch is off, improves operating efficiency by returning current to the input supply, and ensures that the feedback signal is generated only by the Royer converter current. The transfer function between primary-side converter current and programming current C11 2.2µF 35V C3A 2.2µF 35V + POSCON D3 1N5934A 24V D1 1N5818 L3 C10 10µF 35V D2 1N914 16 + NEGCON N = 1:2 15 14 BAT LT1182 13 CCFL VC ROYER EITHER NEGCON OR POSCON MUST BE GROUNDED. GROUNDING NEGCON GIVES 15V FIXED. GROUNDING POSCON GIVES VARIABLE NEGATIVE CONTRAST FROM –10V TO –30V. D4 1N914 DIO AGND VIN SHDN FBP LCD VC FBN LCD PGND LCD VSW 12 + C4 2.2µF VIN ≥ 3V 11 10 9 R11 54.9k 1% R12 4.99k 1% R10, 120k, 1% R9, 20k, 1% V (CONTRAST) 0V TO 5V NOTE: SET V (CONTRAST) TO 5V IF ONLY POSITIVE CONTRAST VOLTAGES ARE GENERATED. 1182_2.eps Figure 2. 90% Efficient floating CCFL configuration with dual-polarity LCD contrast Linear Technology Magazine • October 1994 11 DESIGN FEATURES UP TO 6mA LAMP 2 C2 27pF 3kV 10 BAT 8V TO 28V L1 1 2 3 + C5 1000pF 5 4 C3 4.7µF 35V R2 220k + R3 100k Q2* C11 2.2µF 35V R1 750Ω C1* 0.033µF EITHER NEGCON OR POSCON MUST BE GROUNDED. GROUNDING NEGCON GIVES 15V FIXED. GROUNDING POSCON GIVES VARIABLE NEGATIVE CONTRAST FROM –10V TO –30V. POSCON Q1* D3 1N5934A 24V L2 100µH R5 84.5k 1% V (CCFL) 0V TO 5V 0µA TO 50µA ICCFL CURRENT GIVES ≈ 0mA TO 6mA BULB CURRENT. 1 2 C7 1µF 3 4 5 SHUTDOWN 6 R7, 1k 7 C8 1µF 8 CCFL PGND CCFL VSW BULB ICCFL BAT DIO LT1182 ROYER CCFL VC AGND VIN SHDN FBP LCD VC FBN LCD PGND LCD VSW Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001 L1 = SUMIDA EPS-207 OR COILTRONICS CTX110602 PIN NUMBERS SHOWN FOR COILTRONICS UNIT L2 = CTX100-4 L3 = COILTRONICS CTX02-12403 C10 10µF 35V D2 1N914 16 15 + NEGCON N = 1:2 D4 1N914 14 13 + 12 C4 2.2µF VIN ≥ 3V R11 54.9k 1% 11 R12 4.99k 1% 10 9 V (CONTRAST) 0V TO 5V C1 MUST BE A LOW LOSS CAPACITOR C1 = WIMA MKP-20 D1 1N5818 L3 *DO NOT SUBSTITUTE COMPONENTS COILTRONICS (407) 241-7876 SUMIDA (708) 956-0666 R9 20k 1% R10 120k 1% NOTE: SET V (CONTRAST) TO 5V IF ONLY POSITIVE CONTRAST VOLTAGES ARE GENERATED. THE ICCFL CURRENT REQUIRED FOR A GIVEN RMS BULB CURRENT IS: ICCFL ≈ (9 × 10–3)(IBULB) 1182_3.eps Figure 3. 90% Efficient grounded CCFL configuration with dual-polarity LCD contrast must be empirically determined and is dependent upon a myriad of factors such as lamp characteristics, display construction (which dominates radiated loss terms), transformer turns ratio, and the tuning of the Royer oscillator. The method used to generate the input programming current is shown in Figure 2. A 1kHz, 0–5V pulsewidth-modulated logic signal is converted to DC by the R4/C6 filter network. R5 then converts the DC voltage into programming current at the ICCFL pin. 0µA to 50µA ICCFL current produces 0mA to 6mA lamp current. 12 R2, R3, and C5 form the external divider network for the open-lamp protection circuit. The divider monitors the voltage across the Royer converter and compares it with the internal clamp voltage. In this example, the divider is set to limit the maximum Royer primary voltage to about 10V. Capacitor C5 filters out ripple at the emitters of Q1 and Q2, which have a ripple component of twice the Royer frequency. Efficiency with typical CCFL lamps ranges from 85–90% at full load, with lamp current being variable from 200µA to 6mA. Higher electrical efficiencies are obtainable by increasing the harmonic content in the wave- forms (lowering the value of C1) and increasing the magnetics size to decrease copper loss. The component values chosen were an interactive compromise in maximizing photometric output versus input power. Base drive for Q1 and Q2 is provided by the tickler winding and the value of R1. R1’s value must be chosen to guarantee sufficient base drive with minimum betas for Q1 and Q2. The battery supply range can extend from 8V to 28V, with a nominal battery voltage of 12V. The LT1182 is typically powered from a 5V or 3.3V logic supply. The LT1182 can also be powered from the battery supply, but continued on page 22 Linear Technology Magazine • October 1994 DESIGN FEATURES The LT1366 Family: Precision, Rail-to-Rail Bipolar Amplifiers by William Jett and Sean Gold Introduction The LT1366 family is Linear Technology’s first series of dual and quad bipolar operational amplifiers to combine rail-to-rail input and output specifications with precision VOS specs. The LT1366 family maintains precision specifications over a wide range of operating conditions. The devices will operate with supply voltages as low as +1.8V, and are fully specified for +3V, +5V, and ±15V operation. Offset voltage is typically 150µV when operating from a single 5V supply. Supply rejection is 115dB. Open loop gain, AVOL, is 2 million driving a 2k load. Common-mode rejection ratio is typically 86dB over the full rail-to-rail input range. The combination of precision specifications and rail-to-rail operation makes the LT1366 series versatile amplifiers, suitable for signal processing tasks that demand the widest possible common-mode range. The amplifiers are available in two versions, which differ in their ability to drive capacitive loads. The LT1366 dual and LT1367 quad have conven- tional compensation, and are stable with load capacitances of 1000pF or less. For use in low-frequency or DC applications, the LT1368 dual and LT1369 quad are compensated for use with a 0.1µF capacitor at the output. In a noisy environment, the large output capacitor cleans up the output signal by improving the supply rejection and providing a low output impedance at high frequencies. The LT1366/L T1368 dual amplifiers are available with industry-standard pin-out in either 8-pin SO or 8-pin mini-DIP packages. The LT1367/LT1369 quad amplifiers are available in the 16-pin narrow (150 mil width) SO16. The pinout for the SO16 is the same as the industry standard, but with two end pins (8 and 9) left open. Obtaining Rail-to-Rail Operation As might be expected, the LT1366 differs from a conventional op amp in the design of both the input and out- put stages. Figure 1 shows a simplified schematic of the LT1366. The input stage consists of two differential amplifiers, a PNP stage Q1–Q2 and an NPN stage Q3–Q4, which are active over different portions of the input common-mode range. Lateral devices are used in both input stages, eliminating the need for clamps across the input pins. Each input stage is trimmed for offset voltage. A complementary output configuration (Q23–26) is employed to create an output stage with rail-torail swing. The device is fabricated on Linear Technology’s proprietary complementary bipolar process, which ensures very similar DC and AC characteristics for the output devices Q24 and Q26. Since two separate input stages are used to obtain the rail-to-rail input range, there are also two sets of input specifications for the device. Linear Technology fully specifies the input characteristics for each stage and the difference in each parameter between stages. The specification for V+ D4 D5 D6 I1 D7 Q21 Q17 Q10 Q24 Q11 V– V– IN + Q23 Q16 Q5 Q1 Q2 C1 V+ CC V+ V– V+ V– OUT V+ C2 D1 IN – Q3 Q4 Q8 Q12 (VS –300mV) Q25 Q20 Q14 Q15 D2 Q7 Q9 Q26 Q22 D8 Q6 Q18 Q13 D3 Q19 D7 V– 1366_1.eps Figure 1. LT1366 Simplified schematic diagram Linear Technology Magazine • October 1994 13 DESIGN FEATURES maximum shift in offset voltage and input currents between the NPN and PNP input stages. Applications Figure 2a. LT1366 Power-supply rejection test Figure 2b. LT1368 power-supply rejection test input bias-current shift properly accounts for the opposite directions of the input current in the PNP and NPN stages. First, looking at the input stage, Q5 switches the current from current source I1 between the two input stages. When the input common mode voltage VCM is near the negative supply, Q5 is reverse biased, so the current from I1 becomes the tail current for the PNP differential pair Q1–Q2. At the other extreme, when VCM is near the positive supply, the PNPs Q1–Q2 are biased off. The current from I1 then flows through Q5 to the current mirror D3–Q6, furnishing the tail current for the NPN differential pair Q3–Q4. The switchover point between stages occurs when VCM is equal to the base voltage of Q5, which is biased approximately 1.3V below the positive supply. The collector currents of the two input pairs are combined in the second stage, consisting of Q7–Q11. Most of the voltage gain in the amplifier is contained in this stage. Differential amplifier Q14–Q15 buffers the output of the second stage, converting the output voltage to differential currents. The differential currents pass through current mirrors D4–Q16 and D5–Q17, and are converted to differential voltages by Q18 and Q19. These voltages are also buffered and applied to the output Darlington pairs Q23–24 and Q25–26. Capacitors C1 and C2 form local feedback loops around the output devices, lowering the output impedance at high frequencies. Two circuits prevent the output from reversing polarity when the input voltage exceeds the commonmode range. When the noninverting input exceeds the positive supply by approximately 300mV, device Q12 turns on, pulling the output of the second stage low, which forces the output high. For inputs below the negative supply, diodes D1–D2 turn on, overcoming the saturation of the input pair Q1–Q2. 14 Improved Supply Rejection—the LT1368 The LT1368 is a variation of the LT1366 offering greater supply rejection and lower high-frequency output impedance. The LT1368 requires a 0.1µF load capacitance for compensation. The output capacitance forms a filter, which reduces pickup from the supply and lowers the output impedance. This additional filtering is helpful in mixed analog/digital systems with common supplies, or in systems employing switching supplies. Figures 2a and 2b show the outputs of the LT1366 and the LT1368 with a 200mVP–P, 100kHz square wave added to the positive supply. Note that the signal on the output of the LT1368 is only 20mVP–P. Performance Table 1 summarizes the guaranteed DC performance of the LT1366. As mentioned before, the device is fully tested and guaranteed for +3V, +5V, and ±15V operation. In addition to the traditional op amp specs, Linear Technology also guarantees the The LT1366 series opens up a new range of possibilities for low-power and rail-to-rail applications. The following circuits demonstrate the LT1366’s versatility and precision in solving problems ranging from simple buffers to continuous-time active filters. Potentiometer Buffer It is often attractive in automotive and position-sensing applications to connect a potentiometer directly across a reference supply. Buffering a potentiometer connected in this way requires an op amp with rail-to-rail input and output swing (Figure 3). Despite the circuit’s simplicity, care must be taken in component selection. The potentiometer should present a load commensurate with the op amp’s supply current, yet be small enough to assure negligible input-bias-current induced offset errors. In the example shown, a 10kΩ potentiometer draws 500µA from the input supply and causes less than 50µV of error due to bias current. The offset-voltage error changes with the potentiometer setting, with the maximum error at mid-scale and the minimum error near the supply rails. When the op amp’s output saturates, the offset-voltage error becomes the difference between the input signal and the saturation voltage. The saturation voltage as a function of VCC RP 10k + 1/2 LT1366 – RL 1366_3.eps Figure 3. Rail-to-rail potentiometer buffer Linear Technology Magazine • October 1994 DESIGN FEATURES VCC RSENSE 0.2Ω 1000 1k SATURATION VOLTAGE (mV) LT1004 -1.2 RP 10k BOTTOM SIDE 10 1 0.001 0.0033µF – TOP SIDE 100 100Ω 1/2 LT1366 + Q1 MTP23P06 IOUT 40k Q2 2N4340 0.01 0.1 1 LOAD CURRENT (mA) 5V < VCC < 30V 1A > ILOAD > 160mA 10 1366_09.eps 1366_5.eps Figure 4. LT1366 VSAT vs. load current load current is shown in Figure 4. For light loads, such as an A/D converter, the op amp can swing to within 5mV of each rail. At 1mA of load current, the offset voltage error is less than 75mv; at 10mA of load current, it is less than 500mV. Topside Current Source The circuit shown in Figure 5 takes advantage of the LT1366’s rail-to-rail input range to form a wide-compliance current source. The LT1366 adjusts Q1’s gate voltage to force the voltage across the sense resistor (R SENSE ) to equal the voltage from the Figure 5. Topside current source supply to the potentiometer’s wiper. A rail-to-rail op amp is needed because the voltage across the sense resistor must drop to zero when the divided reference voltage is set to zero. Q2 acts as a constant current sink to minimize error in the reference voltage when the supply voltage varies. The circuit can operate over a wide supply range (5V < VCC < 30V). At low input voltage, circuit operation is limited by the MOSFET’s gate-drive requirements. At high input voltage, circuit operation is limited by the LT1366’s absolute maximum ratings and the output power requirements. Table 1. LT1366 guaranteed DC performance—25°C Max offset voltage VCM = VCC = VEE VCM = VCC = VEE VCM = VCC = VEE Max input bias current Max input offset current Max offset voltage shift over CMR Max input bias current shift Max input offset current shift Min open-loop gain (RL = 2k) Min channel separation Max output voltage—LOW Max output voltage—HIGH no load ISINK = 2.5mA no load ISOURCE = 2.5mA Min output current Max supply current per amp VS = 3V VS = 5V 450µV 450µV 35nA 35nA 6nA 6nA 400µV 70nA 6nA 500k 450µV 450µV 35nA 35nA 6nA 6nA 400µV 70nA 6nA 500k 12mV 200mV 8mV 250mV ±10mA 500µA 12mV 200mV 8mV 250mV ±15mA 500µA In this example, the circuit delivers 1A at 200mV of sense voltage. With a 5V input supply the power dissipation is 5W. For operation at 70°C ambient temperature, the MOSFET’s heat sink must have a thermal resistance of: θHS = θJA SYSTEM - θJC FET = 55°C/5W - 1.25°C/W = 9.75°C/W. This is easily achievable with a small heat sink. When input voltages are greater than 5V, the use of a larger heat sink or derating of the output current is necessary. The circuit’s supply regulation is about 0.03%/V. The output impedance is equal to the MOSFET’s output impedance multiplied by the op amp’s open-loop gain. Degradations in current-source compliance occur when the voltage across the MOSFET’s onresistance and the sense resistor drops below the voltage required to maintain the desired output current. This condition occurs when VCC − VOUT < ILOAD × [R SENSE + R ON ]. High Side CurrentSense Amplifier In power control, it is sometimes necessary to sense load current at low loss near the input supply. The current-sense amplifier shown in Figure 6 amplifies the voltage across a VS = ±15V small value sense resistor by the ratio of the current-source resistors (R2/ 650µV R1). The LT1366 forces the low-power 650µV MOSFET’s gate voltage such that the 35nA sense voltage appears across a cur35nA rent-source resistor R1. The resulting 6nA current in Q1’s drain is converted to 6nA 500µV 70nA 6nA 2000k 120dB 12mV 200mV 8mV 250mV ±30mA 550µA VCC R1 200Ω RS 0.2Ω – 1/2 LT1366 Q1 TPO610L + IIN R2 20k R2 VO = IIN R S R1 = IIN • 20Ω 1366_6.eps Figure 6. High side current-sense amplifier Linear Technology Magazine • October 1994 15 DESIGN FEATURES SECTION 1 SECTION 2 C1 10,000pF VIN R1 29.5k* C2 10,000pF R2 8.6k* – A1 1/4 LT1367 10,000pF – A2 1/4 LT1367 + + 10,000pF 11.8k* – A3 1/4 LT1367 21.5k* – A4 1/4 LT1367 + 29.5k* VOUT + 3.3V 11.8k* 20k 13k 1µF * = 1% RESISTORS 1366_7.eps Figure 7. 1kHz fourth-order Butterworth filter a ground-referred voltage at R2. (VO = IIN RS [R2/R1]) The circuit takes advantage of the LT1366’s ability to sense signals up to the supply rail, which permits the use of small-value, low-loss sense resistors. The LT1366 and the gain setting resistors are also biased at low current to reduce losses in the current sense. Single-Supply, 1kHz, FourthOrder Butterworth Filter The circuit shown in Figure 7 takes advantage of all four op amps in the LT1367 to form a fourth-order Butterworth filter. The filter is a simplified state-variable architecture consisting of two cascaded second-order sections. Each section uses the 360 degree phase shift around the two op amp loop to create a negative summing junction at A1’s positive input.1 The circuit has two-thirds the power dissipation and component count as the classic three op amp biquad,2 yet it has the same low component sensitivities for center frequency, w 0, and Q. For cutoff frequencies other than the 1kHz example shown, use the following formula for each section: w02 = 1/(R1 C1 R2 C2), where R1 = 1/(w0 Q C1) and R2 = Q/(w0C2) The DC bias applied to A2 and A4 for single-supply operation is not needed when split supplies are available. The circuit’s output can swing rail-to-rail and displays the maximally flat amplitude response with a 1kHz cutoff frequency with 80dB/ decade rolloff (Figure 8). References: 1. Hahn, James. 1982. State Variable Filter Trims Predecessor’s Component Count. Electronics, April 21, 1982. 2. Thomas, L.C. 1971. The Biquad: Part I—Some Practical Design Considerations. IEEE Transactions on Circuit Theory, 3:350–357, May 1971. Figure 8. Frequency response of fourth-order Butterworth filter 16 Linear Technology Magazine • October 1994 DESIGN FEATURES LTC1325 Battery Management System Offers Unparalleled Flexibility by Anthony Ng, Teo Yang Long, and Robert Reay Introduction NiCad and NiMH batteries may be classified according to how quickly they are designed to be charged. Fast charge rate batteries can be charged in as little as fifteen minutes, compared to an overnight wait for standard rate batteries. However, nothing comes for free. With fast batteries, overcharging must be limited or battery life will be adversely affected. The requirement to terminate charge complicates the design of fast chargers. There are basically two ways to limit overcharging: a battery can be charged in several stages, i.e., with the charging current reduced in later stages, or the proper charge-termination technique can be used. The complete charging algorithm depends on the battery type and takes into account the battery manufacturer’s specifications and recommendations. The charger circuit should also provide protection against faults (such as excessively high battery temperature or voltage) to safeguard the battery when normal termination fails. The LTC1325 is new fast charger IC designed to provide the user with all the functional blocks needed to implement a simple but sophisticated battery charger (see Figure 1). The main features of the LTC1325 may be summarized as follows: ❏ It has all the functional blocks needed to build a charger, including a 10-bit ADC, faultdetection circuitry, a switching buck regulator controller, a Pchannel MOSFET driver, a timer, a 3V regulator for powering external temperature sensors, and a programmable battery divider. ❏ The functional blocks are placed under the control of an external microprocessor for maximum flexibility and adaptability to different battery chemistries or charge rates. ❏ Communication with the microprocessor is via an easy-to-use, four-wire serial interface. ❏ It has stand-alone fault detection circuitry to protect the battery against temperature or voltage extremes. VDD (4.5V-16V) P1 IRF9Z30 MPU (e.g. 8051) REG DOUT p1.4 DIS p1.3 CS VBATT p1.2 CLK TBAT R2 CREG 4.7µF + R3 + VDD PGATE DIN R1 C2 10µF LTF TA MCV VIN HTF SENSE GND FILTER D1 1N5818 R5 R6 THERM 2 RDIS THERM 1 CF 1µF R4 RTRK L1 50µH IRFZ94 RSENSE 1325_1.eps Figure 1. LTC 1325 fast-charger circuit Linear Technology Magazine • October 1994 ❏ In addition to charging, the chip can discharge batteries for battery conditioning purposes and the part includes an accurate capacity monitoring function (gas gauge). ❏ It charges batteries using a switching buck regulator for higher efficiency and lower power dissipation. ❏ The supply range is 4.5 to 16V, so that the LTC1325 can be powered from the charging supply for up to ten cells. ❏ A shutdown mode drops the supply current to 50µA Charging Circuit Unlike most other charger ICs, which employ linear regulators, the LTC1325 charges batteries using a switching buck regulator. This approach improves efficiency and minimizes power dissipation, especially when charging high-capacity batteries. The only external components required are an inductor, a P-channel MOSFET switch, a sense resistor, and a catch diode (see Figure 2). A programmable battery divider that accommodates one to sixteen cells removes the need for an external divider. All the circuitry for controlling the loop is integrated on-chip; no external ICs are needed. The LTC1325 operates from 4.5V to 16V, so that it can be powered directly from the charging supply. The wide supply range makes it possible to charge up to ten cells without the need for an external regulator to drop the charging supply down to power the LTC1325. When charging is completed and the charging supply is removed, the chip does not load down other system supplies, because the microprocessor can program the LTC1325 into shutdown mode, in which the quiescent current drops to 17 DESIGN FEATURES VDD (4.5V-16V) CHARGE PGATE 3 P1 IRF9Z30 RTRK DUTY RATIO GENERATOR DR0-DR2 DIS DISCHARGE 111kHz OSCILLATOR L1 50µH D1 1N5818 RDIS ONE SHOT Q GG S S2 + R R1 500k S1 S3 C1 16pF A2 R2 125k RF 1k BATTERY N1 IRFZ94 SENSE S4 CL RSENSE – CF FILTER – TO ADC MUX A1 DAC GG VR1 VR0 VOLTAGE 0 0 0 15mV 0 0 1 30mV 0 1 0 60mV 0 1 1 160mV 1 X X 0mV REG (3.072V) + DAC VDAC 2 VR0, VR1 GAS-GAUGE (GG) 1325_2.eps CHIP BOUNDARY Figure 2. LTC1325 charge, discharge, and gas-gauge circuit 50µA. In shutdown mode, the digital inputs stay alive to await the wakeup signal from the microprocessor. The buck-regulator control circuit maintains the average voltage across the sense resistor (RSENSE) at VDAC. In addition, a programmable duty cycle modulates the P-channel MOSFET driver output PGATE to reduce average charging current. The average charging current is given by: ICHARGE = VDAC × (duty cycle)/RSENSE The microprocessor can set VDAC to one of four values(150mV, 50mV, 30mV or 15mV) and the duty cycle to one of five values (1/16, 1/8, 1/4, 1/2, 1) giving 20 possible ICHARGE values with a single RSENSE resistor. Charge Termination A plethora of charge termination techniques are used in the LTC1325. These are based on battery temperature (TBAT), cell voltage (VCELL), time (t), ambient temperature (TAMB) or a combination of these parameters. Unlike other fast charging ICs, the LTC1325 does not lock the user into a particular termination technique and its shortcomings. Instead, it provides the microprocessor a means to 18 measure TBAT, TAMB and VCELL. By keeping track of elapsed time, the microprocessor will have the means to calculate all existing termination techniques (including dTBAT/dt and d2BAT/dt2) and perform averaging to reduce the probability of false termination. This flexibility also means that a single circuit can charge both NiCad and NiMH batteries. The LTC1325 has an on-chip, 10-bit, successive-approximation ADC with a five-channel input multiplexer. Three channels are dedicated to TBAT, VCELL, and the gas gauge (see the section on capacity monitoring); the other two channels can be used for other purposes, such as sensing TAMB or another external sensor. The LTC1325 can be programmed into idle mode, in which the charge loop is turned off. This permits measurements to be made without the switching noise present when charging. Fault Protection The LTC1325 monitors battery temperature, cell voltage, and elapsed time for faults, and prevents the initiation or the continuation of charging should a fault arise. The fault detection circuit (see Figure 3) consists of comparators that monitor TBAT and VCELL to detect low temperature faults (LTF), high temperature faults (HTF), low cell voltages (BATR) and high cell voltages (MCV). The LTF, HTF, and MCV thresholds are set by an external resistor divider to maximize flexibility. The LTC1325 also includes a 32-bit counter that permits the microprocessor to limit the maximum charging time to one of eight time-out values (5, 10, 20, 40, 80, 160, 320 minutes or no time-out). It is possible to disable timer faults by selecting no time-out. Battery Conditioning Under some operating or storage conditions, NiCad and NiMH batteries may lose full capacity. It is often necessary to subject such batteries to repeated deep discharge and charge cycles to restore them to full capacity. The LTC1325 can be programmed into discharge mode, in which it automatically discharges VCELL to 0.9V. This voltage is defined as the end of discharge voltage (EDV). Fault protection is also active in discharge mode to protect the battery against temperature extremes (LTF, HTF) and Linear Technology Magazine • October 1994 DESIGN FEATURES to detect the EDV discharge termination point. Capacity Monitoring The LTC1325 may be programmed into gas gauge mode (GG = 1 in Figure 2). In this mode, the sense resistor senses the battery load current. The sense voltage is filtered by an 1kΩ × CF lowpass filter. Amplifier A1 is configured as an inverting amplifier with a gain of four. The output of A1 is the average sense voltage and is converted by the ADC when the gas-gauge channel is selected by the microprocessor. By accumulating gas-gauge measurements over time, the microprocessor can determine how much charge has left the battery and what capacity remains. VDD 1.6V – + BATP C1 VDD + 3.072V LINEAR REGULATOR REG VBATT – R1 BATTERY DIVIDER + FMCV R2 C2 SENSE – + FEDO REG MCV 900mV C3 – R3 RL R4 RT Conclusions By leaving all decisions (except fault detection) to the microprocessor, the LTC1325 does not lock the user into any charge algorithm or charge termination technique. Multistage charging algorithms or several charging algorithms can be implemented in software, so that a wide range of battery types can be charged with the same circuit. The design of the external charging circuit is made as simple as possible by incorporating all the functional blocks needed and minimizing external component count. In addition to charging batteries, the LTC1325 has provisions for conditioning batteries and measuring battery capacity. Each of these three functions is under the full control of the microprocessor. + BATR 100mV C4 – – FHTF C5 + HTF + FLTF C6 – LTF 1325_3.eps Figure 3. Fault-detection circuitry PCMCIA, continued from page 5 Conclusion with the LT1312 can be used to provide a rough 13V input to the LT1121 for an efficient system design. The LTC1314 will enable the LT1121 linear regulator only during flash memory programming intervals. In all other modes the LT1121 is in shutdown mode and consumes only 16µA. This LT1121 also provides thermal- and current-limiting features to increase the robustness of the socket. The PCMCIA specification requires a significant amount of voltage switching on both the primary supply (VCC) and the flash-memory programming supply pins (VPP). The complexity of these requirements mandates specific integrated solutions. Each of the two approaches for VPP switching, linear regulation and switch matrix, has its merits. Linear regulation provides current limiting and thermal- Linear Technology Magazine • October 1994 TBAT shutdown protection at some cost in efficiency. This small loss in efficiency can be balanced by considering the system efficiency and utilizing an auxiliary winding on the inductor of the primary power supply. The switchmatrix approach is the ultimate in simplicity but it requires all voltages to be present the inputs, since no voltages are generated. The best method depends on the application. 19 DESIGN FEATURES LT1372, continued from page 1 DEAD-TIME OSCILLATOR VOLTAGE BOOSTED 3-STATE SWITCH DRIVE CURRENT NOMINAL IDLE IDLE SWITCH OFF SWITCH VOLTAGE SWITCH ON T0 T1 T2 T3 T4 1372_2.eps Figure 2. Switch drive current Block Diagram A block diagram of the LT1372 is shown in Figure 1 (see page 1). The circuit includes an internal, low-dropout regulator, trimmed oscillator, trimmed reference, error amplifier, current amplifier, current comparator, and bipolar switch. Other unique LT1372 features shown in the diagram include a combined shutdown and synchronization function, 5:1 oscillator frequency shifting network, negative regulation feedback amplifier, and switch-drive boost circuitry. The Switch In order to operate effectively at high frequencies, the switch must have low AC switching losses. Switch R1 C1 VSW I1 D2 I2 D1 SWITCH Q1 1372_3.eps Figure 3. Simplified switch diagram 20 VIN 2.7V TO 11V C1 47µF L1* 10µH + L1 VIN stray capacitance, turn-on time, turnoff time, and control of drive current all contribute to AC losses. Although there is an inherent benefit with a high-speed process, there are circuit design techniques that can further decrease AC losses. Switch turn-on time can be reduced by increasing the switch drive-current level, but having excessive drive current after the switch has turned on is a waste of power. The LT1372 boosts drive current at switch turn-on time, senses when turn-on has occurred, and then reduces drive current to a lower level. Figure 2 shows the LT1372’s control of switch drive current. At T0, a new cycle begins with the start of oscillator “deadtime” (the time when the switch is guaranteed to be off). Deadtime provides a “look ahead” prior to switch turn-on time and allows the drive current to reach the boosted level before the switch is turned on. At T1, the drive current has attained the boosted level and the switch turn-on signal is set. At T2, the switch has turned on. The switch drive circuitry senses this condition and reduces drive current to the lower level for the duration of switch on time. The lower level of drive current more closely approaches the minimum current required to keep the switch on. At T3, the switch is turned off and the drive current is reduced to the idle level for the duration of the cycle. At T4, the cycle is complete and repeats from T0. Figure 3 is a simplified diagram of the switch circuitry used when the switch is being turned off. The primary path to turn the switch off is current source I1 and transistor Q1. I1 turns on Q1, which turns the switch off by pulling down on its base. Turnoff time is determined by the current Q1 pulls from the switch’s base. Q1’s collector current is limited to I1 times Q1’s hFE. To increase Q1’s collector current by simply increasing I1 would be a waste of power. This is because an increase in Q1’s collector current is beneficial only during the switch turn-off transition time and not the entire time the switch is off. In order to reduce switch turn-off time, a turn-off enhancement network is used. Referring to Figure 3, the network comprises C1, R1, D1, and D2. When the switch voltage begins to rise, its dV/dt feeds an additional current, I2, into Q1’s base, via R1 and D1. This increases Q1’s collector current and reduces switch turn-off time. This action is sustained through the entire switch turn-off transition time. R1 limits the amount of current fed back to Q1, and D2 discharges C1 when the switch is turned on. 5 ON 4 OFF VIN S/S VSW 8 D1 MBRS130T3 VOUT 12V LT1372 N/C 3 NFB VC FB GND 1 C2 0.047µF 6, 7 2 R2 10.7k R3 1.24k + C3 33µF X2 R1 2k *SUMIDA CD73-100KC SUMIDA (708) 956-0666 1372_4.eps Figure 4. Schematic diagram: LT1372 boost converter Linear Technology Magazine • October 1994 DESIGN FEATURES 95 VIN = 9V VOUT = 12V VIN 2.7V TO 16V 90 + EFFICIENCY (%) 85 C1 22µF 80 5 VIN = 5V ON 4 75 OFF N/C VIN = 3V 2 FB 1000 3 IOUT 0.3A 0.5A 0.75A 6, 7 C2 0.047µF 60 100 OUTPUT CURRENT (mA) 1 VIN 3V 5V 9V R3 2.49k T1 = COILTRONICS CTX10-2P COILTRONICS (407) 241-7876 R1 2k 1372_5.eps C3 47µF –VOUT R2 –5V 2.49k 3 NFB GND VC 1 10 8 VSW + D1 MBRS130LT3 LT1372 70 65 VIN S/S 2 T1 4 D2 P6KE-15A D3 MUR110 1372_6.eps Figure 5. Efficiency of boost converter shown in Figure 4 Figure 6. LT1372 Positive-to-negative converter with direct feedback Boost Converter Positive-to-Negative Flyback with Direct Feedback A unique feature of the LT1372 is its ability to directly regulate negative output voltages. As shown in the positive-to-negative flyback converter 1.24k in Figure 6, only two resistors are required to set the output voltage. The reference voltage on the NFB pin is −2VREF, making VOUT = −2VREF × (R2/R3 + 1). Efficiency for this circuit reaches 72% on a 5V input. Dual-Output Flyback with Overvoltage Protection Multiple-output flyback converters offer an economical means of producing multiple output voltages, but the power-supply designer must be aware of cross-regulation issues, which can cause electrical overstress on the supply and loads. Figure 7 is a dual-output flyback converter with overvoltage protection. Typically, in multiple-output flyback designs, only one output is voltage sensed and regulated. The remaining outputs are “quasi-regulated” by the turn ratios of the transformer secondary. Cross VIN = 5V 25 20 VOUT 15 10 5 0 –5 –10 –VOUT –15 –20 –25 –30 1 10 IOUT (mA) 100 1372_8.eps Figure 8. Cross regulation of Figure 7’s circuit. +VOUT and −VOUT evenly loaded. 30 2, 3 5 6, 7 4 8 + P6KE-20A FB S/S 47µF 5 VIN 8 VSW 1N4148 LT1372 NFB GND VC 1 3 MBRS140T3 47µF 1 –VOUT –15V 12.1k 6, 7 10 5 0 –5 –10 –15 –VOUT –20 –25 C2 0.047µF R1 2k + VOUT 15 VOUT (V) 2 20 VOUT 15V T1 100µF VIN = 5V 25 MBRS140T3 + OFF 30 13.3k VIN 2.7V TO 13V ON 4 regulation is a function of the transformer used, and is a measure of how well the quasi-regulated outputs maintain regulation under varying load conditions. For evenly loaded outputs, as shown in Figure 8, cross regulation can be quite good, but when the loads differ greatly, as in VOUT (V) The boost converter in Figure 4 shows a typical LT1372 application. This circuit converts an input voltage, which can vary from 2.7V to 11V, into a regulated 12V output. Using all surface-mount components, the entire boost converter consumes only 0.5 square inches of board space. Figure 5 shows the circuit’s efficiency, which can reach 87% on a 5V input. The reference voltage on the FB pin is trimmed to 1.24V, and the output voltage is set by the R2/R3 resistor divider ratio (VOUT = VREF × (R2/R3 + 1). R1 and C2 frequency compensate the circuit. T1 = DALE LPE-4841-A038 DALE (605) 665-9301 2.49k –30 1 10 IOUT (mA) 100 1372_9.eps 1372_7.eps Figure 7. LT1372 Dual-output flyback converter with over-voltage protection Linear Technology Magazine • October 1994 Figure 9. Cross regulation of Figure 7’s circuit. −VOUT unloaded; only +VOUT voltage sensed. 21 DESIGN FEATURES the case of a load disconnect, there may be trouble. Figure 9 shows that when only the +15V output is voltage sensed, the −15V quasi-regulated output exceeds −25V when unloaded. This can cause electrical overstress on the output capacitor, output diode, and the load when reconnected. Adding output-voltage clamps is one way to fix the problem, but the circuit in Figure 7 eliminates this requirement. This circuit senses both the +15V and −15V outputs and prevents either from going beyond its regulating value. Figure 10 shows the unloaded −15V output being held constant. The circuit’s efficiency, which can reach 79% on a 5V input, is shown in Figure 11. 30 The LT1372 does not exhibit the usual trade-offs between increased switching frequency and efficiency. In Figure 12, the efficiency of a LT1372 is compared to an LT1172, switching at 100kHz. The LT1372 has comparable efficiencies and uses less board space. 100 85 VOUT = ±15V VIN = 5V 20 EFFICIENCY (%) 10 5 0 –5 –10 VIN = 5V VOUT = 12V 80 VOUT 15 VIN = 9V –VOUT LT1372 90 VIN = 5V EFFICIENCY (%) 25 VOUT (V) Conclusion 75 VIN = 3V 70 LT1172 80 70 –15 65 –20 60 –25 –30 60 1 10 IOUT (mA) 100 5 10 100 200 OUTPUT CURRENT (mA) 1372_10.eps Figure 10. Cross regulation of Figure 7’s circuit. −VOUT unloaded; both −VOUT and +VOUT sensed. 1372_11.eps 50 10mA 100mA ILOAD 1A 1372_12.eps Figure 11. Efficiency of dual-output flyback converter in Figure 7. Figure 12. LT1372 versus LT1172 efficiency to isolate high-current paths from low-current signal paths. We recommend that separate power traces and ground traces be provided for each regulator to provide further isolation. High-current ground paths for each switch should meet only at the ground star. The compensation components for each regulator VC pin and the ground-referred feedback divider networks for the LCD contrast converter should connect directly to the analog ground pin for best regulation. and ROYER pins have been tied together. This ensures that the high-side sense amplifier is disabled and does not generate any feedback signal. Performance is similar to that of the floating circuit, with efficiencies ranging from 85–90% for typical CCFL lamps at full load. However, the lamp-current range is limited to 1–6mA. Thermometering becomes pronounced at currents below about 1mA. The battery supply range can extend from 8V to 28V, with a nominal battery voltage of 12V. The LT1182 is typically powered from a 5V or 3.3V logic supply. Programming of lamp current in this example has been simplified to a resistor and a variable 0–5V supply. CCFL, continued from page 12 with a corresponding loss in operating efficiency of about 3%. Lamp intensity is smoothly variable from minimum to full intensity. The LCD contrast regulator is configured as a flyback converter with divider networks set up to control either positive or negative contrast voltages. Grounding the negative side of the secondary produces a fixed +15V output. Grounding the positive side of the secondary produces a variable −10V to −30V output range at 30mA maximum load current. Output voltage varies in direct proportion to changes in V(CONTRAST). LCD contrast efficiency is about 80% at full power. The flyback converter runs in discontinuous mode to minimize the size of the magnetics. The LT1182 has separate power grounds for each switch and an analog ground in order to minimize interaction between the regulators. Pay special attention to power and ground traces on the PC board layout 22 Grounded CCFL with Variable-Negative/FixedPositive Contrast Figure 3 (see page 12) is a complete grounded CCFL circuit with variable-negative/fixed-positive contrast-voltage generation based on the LT1182. The circuit is almost identical to that of Figure 2, except that the lamp connects directly to the LT1182 DIO pin, thereby closing a feedback loop at the CCFL VC pin. Also, the BAT References: 1. Williams, Jim. 1992. Illumination Circuitry for Liquid Crystal Displays. Linear Technology Corporation, Application Note 49. 2. Williams, Jim. 1993. Techniques for 92% Efficient LCD Illumination. Linear Technology Corporation, Application Note 55. Linear Technology Magazine • October 1994 DESIGN INFORMATION Simple Thermal Analysis — A Real Cool Subject for LTC Regulators by Alan Rich As the temperatures go up... so go the problems with voltage regulators. Introduction Linear Technology Corporation applications engineers get lots of calls saying, “that $X%#@& voltage regulator is so hot I can’t touch it!” The purpose of the article is to show you, the design engineer, how to perform simple thermal calculations to determine regulator temperature and select the proper package style and/or heat sink. In addition, it will show an alternate method of specifying thermal parameters on LTC voltage regulators. Definition of Terms Power dissipation is the parameter that causes a regulator to heat up; the unit for power is watts. Power is the product of the voltage across a linear regulator times the load current (see Figure 1). Thermal resistance is a measure of the flow of heat from one surface to another surface; the unit of thermal resistance is °C/watt. Common terms for thermal resistance that show up on most LTC data sheets are: θJC—thermal resistance from the junction of the die to the case of the package. θJA—thermal resistance from the junction of the die to the ambient temperature. VIN VOUT ILOAD PDISS = (VIN – VOUT) ILOAD (WATTS) Cool_1.eps Figure 1. Typical linear regulator circuit Linear Technology Magazine • October 1994 Some typical LTC regulators and their thermal characteristics are shown in Table 1. There are several other common thermal resistance terms: θCS — thermal resistance from the case of the package to the heat sink. θSA — thermal resistance from a heat sink surface to the ambient temperature. The last two terms are determined by how a regulator is mounted to the heat sink and by the properties of the heat sink. Heat sinks are used to decrease the thermal resistance and therefore lower the temperature rise of the regulator. Temperature is a term with which we are all very familiar. All thermal calculations will use the Centigrade scale or °C. TJ — temperature of the junction of the regulator die. TC — temperature of the case of the regulator. TA — ambient temperature. The maximum operating junction temperature, TJ MAX for LTC regulators is shown on the device data sheet. What is Thermal Analysis? The goal of any thermal analysis is to determine the regulator junction temperature, TJ, to ensure that this temperature is less than either the regulator rating or a design specification. In the simplest case, temperature rise is calculated by multiplying the power times the total of all thermal resistance: TR = P × θtotal θTOTAL includes the thermal resistance junction-to-case (θJC), thermal resistance case-to-heat sink (θCS), and thermal resistance heat sink-to-ambient (θSA). TR represents the temperature rise above the ambient temperature; therefore, to determine the actual junction temperature of the regulator, the ambient temperature must be added to TR: Regulator junction temperature = Ambient Temperature + TR For example, consider a circuit using an LT1129CT operating in a 50°C enclosure with an input voltage of 8VDC, an output voltage of 5VDC, and a load current of 1 ampere1. The power dissipated by the LT1129CT is: P = (VIN - VOUT) × ILOAD = (8V - 5V) × 1 amp = 3 watts The first question is, does this circuit need a heat sink? Since we have assumed no heat sink on the LT1129CT for the purpose of this calculation, we must use thermal resistance from junction to ambient, θJA = 50°C/watt. TJ = P × θJA + TA = 3 watts × 50°C/watt + 50°C = 150°C + 50°C = 200°C The junction temperature, TJ that we just calculated is greater than the LT1129CT’s maximum junction temperature specification of 125°C; therefore this circuit must use a heat sink. Now the task at hand is to calculate the correct heat sink to use. The selected heat sink must hold the junction temperature at less than 125°C for the LT1129CT. Table 1. θJC and θJA for three LTC regulators. Device LT1005CT LT1083MK LT1129CT θJC (°C/watt) θJA (°C/watt) 5.0 1.6 5.0 50 23 DESIGN INFORMATION TJ = P × θTOTAL + TA 125°C = 3 watts × θTOTAL + 50°C θTOTAL = 25°C/watt and, θTOTAL = θJC + θCS + θSA For this configuration: θJC = 5°C/watt (LT1129CT data sheet) θCS = 0.2°C/watt (typical for heat sink mounting) θSA = heat sink specification Plugging in these numbers: 25°C/W = 5°C/W + 0.2°C/W + θSA θSA = 19.8°C/watt Therefore, the heat sink selected must have a thermal resistance of less than 19.8°C/watt to hold the LT1129CT junction temperature at less than 125°C. Obviously, the lower the heat sink thermal resistance, the lower the LT1129CT junction temperature. A lower junction temperature will increase reliability. Now, let’s consider a circuit using an LT1129CT operating in a 50°C enclosure with an input voltage of only 6VDC, an output voltage of 5VDC, and a load current of 1 ampere. The power dissipated by the LT1129CT is: P = (VIN - VOUT) × ILOAD = (6V - 5V) × 1 amp = 1 watt Does this circuit need a heat sink? Again, for the purposes of the calculation, we must use thermal resistance from junction to ambient, θJA= 50°C/watt for the LT1129CT. TJ = P × θJA + TA = 1 watt × 50°C/watt + 50°C = 50°C + 50°C = 100°C Table 2. Two examples showing thermal resistance of control and power sections of LTC regulators. Control Device θJC TJ MAX LT1083MK 0.6°C/W 150°C LT1085CT 0.7°C/W 125°C 24 Power θJC TJ MAX 1.6°C/W 200°C 3.0°C/W 150°C The junction temperature, TJ that we just calculated is now less than the LT1129CT’s maximum junction temperature specification of 125°C. Therefore this circuit does not need a heat sink. This illustrates the advantage of a low dropout regulator like the LT1129CT. To determine the control section junction temperature: TJ = P × θTOTAL + TA = 3 watts × 10.9°C/watt + 50°C = 82.7°C (TJ MAX = 125°C) To calculate the power section of the LT1085CT: θJC = 3°C/watt (LT1085CT data sheet) θTOTAL = θJC + θCA + θSA = 3°C/W + 0.2°C/watt + 10°C/watt = 13.2°C/watt An Alternative Method for Specifying Thermal Parameters Linear Technology Corp. has introduced an alternative method to specify and calculate thermal parameters of voltage regulators. Previous regulators, with a single thermal resistance junction-to-case (θJC), used an average of temperature rise of the control and power sections. This could easily allow excessive junction temperature under certain conditions of ambient temperature and heat sink thermal resistance. Several LTC voltage regulators include thermal resistance and maximum junction temperature specifications for both the control and power sections, as shown in Table 2. As an example, let’s calculate the junction temperature for the same application shown before, using an LT1085CT instead of the LT1129CT. Once again, we are operating in a 50°C enclosure; the input voltage is 8VDC, the output voltage is 5VDC, and the load current is 1 ampere. The power dissipated by the LT1085CT is the same as before, 3 watts. We will assume we have selected a heat sink with a thermal resistance, θSA of 10°C/watt. First calculate the control section of the LT1085CT: To determine the power section junction temperature: TJ = P × θTOTAL + TA = 3 watts × 13.2°C/watt + 50°C = 89.6°C (TJ MAX = 150°C) In both cases, the junction temperature is below the maximum rating for the respective section; this ensures reliable operation. Conclusion This article is an introduction to thermal analysis for voltage regulators; however, the techniques also apply to other devices, including operational amplifiers, voltage references, resistors, and the like. For the more advanced student of thermal analysis, it can be shown that there is a direct analogy between electronic circuit analysis and thermal analysis as shown in Table 3. All standard electronic network analysis techniques (Kirchhoff’s laws, Ohm’s law) and computer circuit analysis programs (SPICE) can be applied to complex thermal systems. 1 The LTC1192CT is guaranteed for 700mA, but could be selected to output 1 Amp. θJC = 0.7°C/watt (LT1085CT data sheet) θCA = 0.2°C/watt (typical) θSA = 10°C/watt θTOTAL = θJC + θCA + θSA = 0.7°C/watt + 0.2°C/watt + 10°C/watt = 10.9°C/watt Table 3. Analogy between thermal analysis and electronic circuit analysis Thermal World Electrical World Power Current Temperature differences Voltage Thermal resistance Resistance Linear Technology Magazine • October 1994 DESIGN IDEAS Low-Noise Portable Communications DC-to-DC Converter by Mitchell Lee DESIGN IDEAS Low-Noise Portable Communications DC-to-DC Converter....................... 25 Mitchell Lee Craig Varga Luma Keying with the LT1203 Video Multiplexer ...................................... 27 Frank Cox A Tachless Motor-Speed Regulator ...................... 28 Mitchell Lee Linear Technology Magazine • October 1994 ON + L1 CTX33-1 VIN SHUTDOWN OFF VSW R1 91k MBR0520L LTC1174CS8 IPGM C1 15µF/12.5V C2 6.8nF + C3 5V/120mA OUTPUT 33µF/20V FB GND R2 30k dI1174_1.eps C1 = PANASONIC SP SERIES (201-348-4630) C3 = AVX TPS SERIES (803-946-0690) L1 = COILTRONICS OCTAPAK (407-241-7876) Figure 1. Low-noise, high-efficiency, stepdown regulator for personal communications devices to minimize system noise compared to other chips that carry significantly higher peak currents, easing shielding and filtering requirements and decreasing component stress. To conserve power and maintain high efficiency at light loads, the LTC1174 uses Burst ModeTM operation. Unfortunately, this control scheme can also generate audio-frequency noise at both light and heavy loads. In addition to electrical noise, acoustical noise can emanate from capacitors and coils under these conditions. A feedforward capacitor (C3) shifts the noise spectrum up out of the audio band, eliminating these problems. C3 also reduces peak-topeak output ripple, which measures approximately 30mV over the entire load range. The interactions of load current, efficiency, and operating frequency are shown in Figure 2. High efficiency is maintained at even low current levels, dropping below 70% at around 800µA. No-load supply current is less than 200µA, dropping to approximately 1µA in shutdown mode. The operating frequency rises above the telephony bandwidth of 3kHz at a load of 1.2mA. Most products draw such low load currents only in standby mode with the audio circuits squelched, when noise is not an issue. The frequency curve depicted in Figure 2 was measured with a spectrum analyzer, not a counter. This ensures that the lowest-frequency noise peak is observed, rather than a faster switching frequency component. Any tendency to generate subharmonic noise is quickly exposed using this measurement method. 100 100 90 10 80 EFFICIENCY LT1585: New Linear Regulator Solves Load Transients ............................ 26 5-7 CELL INPUT FREQUENCY (kHz) Portable communications products pack plenty of parts into close proximity. Digital clock noise must be eliminated not only from the audio sections, but also from the antenna, which, by the very nature of the product, is located only inches from active circuitry. If a switching regulator is used in the power supply, it becomes another potential source of noise. The LTC1174 stepdown converter is designed specifically to eliminate noise at audio frequencies while maintaining high efficiency at low output currents. Figure 1 shows an all-surfacemount solution for a 5V, 120mA output derived from five to seven NiCad or NiMH cells. Small input and output capacitors are used to conserve space, without sacrificing reliability. In applications where it is desired, a shutdown feature is available; otherwise short this pin to VIN. The LTC1174’s internal switch, which is connected between VIN and VSW, is current controlled at a peak threshold of approximately 340mA. This low peak threshold is one of the key features that allows the LTC1174 70 1 60 0.1 0.1 1 10 OUTPUT CURRENT (mA) 50 100 dI1174_2.eps Figure 2. Parameter interaction chart for Figure 1’s circuit. 25 DESIGN IDEAS LT1585: New Linear Regulator Solves Load Transients The latest hot new microprocessors have added a significant complication to the design of the power supplies that feed them. These devices have the ability to switch from consuming very little power to requiring several amps in tens of nanoseconds. To add a further complication, they are extremely intolerant of supply voltage variations. Gone are the days of the popcorn three-terminal regulator and the 0.1µF decoupling capacitor. The LT1585 is the first low-dropout regulator specifically designed for tight output voltage tolerance (optimized for the latest generation processors) and fast transient response. Figure 1 shows the kind of response that can and must be achieved if these microprocessors are to operate reliably. Figure 2 details the first several microseconds of the transient in Figure 1. The load change in this case is 3.8 Amps in about 20ns. Two parasitic elements dominate the transient performance of the system. Both are controlled by the type, quantity, and location of the decoupling capacitors in the system. Anatomy of a Load Transient. The instantaneous droop at the leading edge of the transient is the result of the sum of the effects of the equivalent series resistance (ESR) by Craig Varga NOMINAL VO 23.6mV “A” 13.4mV “B” dI1585_2.eps Figure 2. Detailed sketch of first few microseconds of transient and the equivalent series inductance (ESL) from the output capacitor(s) terminal(s) to the load connection. Note that these contributions also include the lead trace parasitics from the capacitor(s) to the load. The resistive component is simply ∆I × ESR. The droop to point A, 23.6mV, is the ESR contribution. Calculating ESR: 23.6mV/3.8 Amps = 6.2mΩ The effects of inductance are predicted by the formula V = LdI/dt. The voltage from point A to the bottom of the trough is the inductive contribution (13.4mV). ESL is calculated to be 0.07nH. After the load current stops rising the inductive effects end, bringing the voltage to point B. At this point the curve settles into a gentle droop. The droop rate is dV/dt = I/C. There is about 1300µF of useful capacitance on the board in this case (see Figure 3). As the regulator output current starts to approach the new load current, the droop rate lessens until the regulator supplies the 1 5V C1 TO C2 220µF 10V SANYO OSCON ×2 + VIN full load current. This is the inflection point in the curve. Since the regulator now measures the output voltage as being too low, it overshoots the load current and recharges the output capacitors to the correct voltage. Faster Regulator Means Fewer Capacitors, Less Board Space The regulator has one major effect on the system’s transient behavior. The faster the regulator, the less bulk capacitance is needed to keep the droop from becoming excessive. It is here that the advantage of the LT1585 shows up. The response time of the LT1585 is about one-half that of the last generation three-terminal regulators. The response in the first several hundred nanoseconds is controlled by the careful placement of bypass capacitors. Figure 3 is a schematic diagram of the circuit, but the layout is critical, so consult the LTC factory for circuit and layout information. 3 U1 V LT1585CT OUT GND 2 C9 TO C18 1µF SMD × 10 + C3 TO C8 220µF 10V AVX TYPE TPS ×6 LOAD dI1585_3.eps Figure 1. Transient response of 200mA to 4 Amp load step 26 Figure 3. Schematic Diagram: LT1585 responding to fast transients Linear Technology Magazine • October 1994 DESIGN IDEAS Luma Keying with the LT1203 Video Multiplexer In video systems, the action of switching between two or more active video sources is referred to as a “wipe” or a “key.” When the decision to switch video sources is based on an attribute of the active video itself, the action is called keying. A wipe is controlled by a non-video signal, such as a ramp. The circuit presented in Figure 1 is referred to as a “luma key” because it switches between two sources when the luminance (“luma”) of a monochrome key signal reaches a set level. It is also possible to key on the color of the video source and this, not surprisingly, this is called “chroma keying.” Figure 1’s operation is very straightforward. A monochrome video source is used to generate the key signal. The LT1363 is used as a buffer and may not be needed in all applications. If by Frank Cox the key signal is to be used as one of the switched signals, it is convenient to “loop through” the input of this buffer. The LT1016 comparator switches when the video level exceeds the DC reference on its inverting input, which is controlled by the “key sensitivity” control. The TTL key signal controls an LT1203 video multiplexer. Any two video sources may be connected to the inputs of the LT1203, as long as they are gen locked and within the common-mode range (on ±5 volt supplies this is ±3 volts over 0–70°C) of the multiplexer. The LT1203’s fast switching speed, low offset, and clean switching make it a natural for an active video switching application like this one. Composite color signals can be used, but the best results will be obtained if the key signal’s horizontal sync is phase Figure 2. Two-level image of IC designer coherent with the color reference of the sources. The key-source video should be monochrome to prevent the key comparator from switching on the color subcarrier. +5 KEY VIDEO 3 + INPUT 6 LT1363 10k 2 2 15V – 1000Ω + 7 LT1016 3 10k 5 – 6 4 –5 LT1004 - 2.5 1000Ω 100k KEY SENSITIVITY 1 SOURCE 1 IN1 75Ω LOGIC 5 LT1203 2 GRD OUT IN2 EW 7 1 75Ω SOURCE 2 IN1 6 2 NC 5 COMPOSITE BLANKING (TTL LEVELS) LT1203 1000Ω 3 LOGIC GRD OUT 7 3 + LT1363 1000Ω 3 IN2 EW 6 2 NC 6 75Ω VIDEO OUT – 510Ω 1000Ω 2.2k 74AC04 300Ω 510Ω 5k 9.3µH COMPOSITE SYNC (TTL LEVELS) 36.5pF 232pF 300Ω dI1203_1.eps Figure 1. Schematic diagram: luma keyer Linear Technology Magazine • October 1994 27 DESIGN IDEAS Nonstandard video signals can be used for the inputs to the LT1203. For instance, it is possible to select between two DC input levels to construct a two-level image. Figure 2 is an example of an image constructed this way. A monochrome video signal is sliced and used to key between black (zero volts) and gray (approximately 0.5 volt) to generate this image of a famous linear IC designer. An image formed in this way is not a standard video output until the blank- ing and sync intervals are reconstructed. The second LT1203 blanks the video and an LT1363 circuit sums composite sync to the video and drives a cable. For more information on this part of the circuit, see AN 57, page 7. A clamp is not used, as the DC levels are arbitrarily set by the inputs, but one could be used, as in the figure on page 7 of AN57, if the sources were video. As another option, Figure 3 shows the same key signal used as one of the inputs to the multiplexer. Figure 3. Key signal used as input to the MUX A Tachless Motor-Speed Regulator by Mitchell Lee A common requirement in many motor applications is a means of maintaining constant speed with variable loading or variable supply voltage. Speed control is easily implemented using tachometer feedback, but the cost of a tach may be prohibitive in many situations, and adds mechanical complications to the product. A lower-cost solution with no moving parts is presented here. Motor speed changes under conditions of varying loads because of the effects of series loss terms in the motor. The effects of the predominant VTERMINAL − R2 • R S R3 RM IM = T/KT + – VREF R1 + R2 R1 SPEED REGULATOR + – VM = K V •n MOTOR dImotr_1.eps Figure 1. On the right is shown an equivalent circuit for a motor. On the left is the model for a circuit which will stabilize the motor’s speed against changes in supply voltage and loading. 28 contributors to loss, copper and brush/commutator resistance (collectively known as RM), are best understood by considering the circuit model for a motor (see Figure 1). A motor’s back-EMF (VM) is proportional to speed (n), and the motor current (IM) is proportional to the load torque (T). The following equation predicts the speed of the motor, for any given condition of loading: n= VTERMINAL KV − T× RM KT × KV (1) where KV and KT are constants of proportionality for rotational velocity and torque. For a fixed terminal voltage, the speed of the motor must decrease as increasing load torque is applied to the shaft. For a fixed load, the speed of the motor will also change if the supply (terminal) voltage is changed. A voltage regulator fixes the problem of a varying terminal voltage, but the only way to eliminate torque from Equation (1) is by reducing RM to zero. Physically this is impractical, but an electrical solution exists. If a motor is driven from a regulated source whose output impedance is opposite in sign and equal in magnitude to RM (see Figure 1), the result is a motor that runs at a constant speed—regardless of loading and power-source variations. Figure 2 shows a circuit that does it all. The LT1170 is configured as a buck-boost converter, which can take a wideranging 3-to-20V input source and produce a regulated output of, say, 6V. The circuit shown can deliver 1A at 6V with a 5V input, adequate for many small, permanent-magnet DC motors. To cancel the effects of the motor resistance, a negative output impedance is introduced with an op amp and a current-sense resistor (RS). As the motor current increases, the LT1006 responds by increasing the motor terminal voltage by an amount equal to IM × RM. Depending on the value of R3, the speed can be made to increase, decrease, or stay the same under load. If R3 is just right, the Linear Technology Magazine • October 1994 DESIGN IDEAS motor speed will remain constant until the LT1170 reaches full power and the circuit runs out of steam. Many small motors in the 1-to-10W class are not well characterized. In order to choose proper component values for a given motor, figures for RM and VM are necessary. Fortunately, these are easily measured using a DVM and a motor-characterization test stand. If you don’t have a motorcharacterization test stand, it is also possible to use a lathe or drill press to do the job. Chuck-up the candidate motor’s shaft in a variable speed drill press or lathe, which is set to run at the same speed you’re intending to operate the motor. Clamp down the motor frame so it won’t spin. Turn on the big machine, and measure the open-circuit motor terminals with a DVM. This is the motor voltage, VM, as shown in Figure 1. Switch the meter to measure the motor’s short circuit current, ISC. Motor resistance RM = VM/ISC. With these figures the other component values can be calculated: 3V TO 20V INPUT IMAX = motor current at full load VREF = 1.244V R1 = series combination of 619Ω + 619Ω = 1238Ω RS ≤ 1/IMAX (drops less than 1V at maximum load) R2 = (VM × R1/VREF) - R1 (2) R3 = (R2 × RS)/(RM + RS) (3) loading from the motor. Check the motor’s unloaded speed, and adjust R2 if necessary to set it precisely. With the motor driving a nominal load, decrease R3 until the motor commences “hunting.” R3 will be near the nominal calculated value. This threshold is very close to optimum motor-resistance cancellation. R5 and C5 offer a convenient means of compensating for frictional and inertial effects in the mechanical system, eliminating instabilities. System stability should be evaluated under a variety of loading conditions. The effect of R5 is to reduce the negative output impedance of the circuit at high frequencies. Systems with a net positive impedance are inherently stable. When the system stability is satisfactory, a final adjustment of R3 can be made to achieve the desired speed regulation under conditions of varying loads. These final values can be used in production. Note that R2 defines the regulated speed value and may be production trimmed in precision applications. The component values shown in Figure 2 are for a small motor with the following characteristics measured at 360RPM: VM = 7.8V, ISC = 3.7A, RM = 2.1Ω, IMAX ≈ 1A. RS, a copper resistor, is either located close to or wound around the motor to assist in tracking changes in armature resistance with temperature. Copper has a strong, 3930ppm/ °C temperature coefficient, matching the TC of the motor winding. Setup Procedure Initial tests should be performed with a potentiometer in place of, and twice the value of, R3. R5 and C5 should be disconnected; remove all L1 50µH + C1 C2 330µF MBRD340CT + 1000µF VIN R2 6490Ω 1% VSW LT1170 L2 50µH FB R1a 619Ω 1% GND R3 309Ω 1% VC R5 1k + LT1006 C5 2.2µF – R4 1k C4 1µF 10k 1% R1b 619Ω 1% + C3 1000µF RM + M VM – 10k 1% RS 100mΩ Cu L1 = L2 = 50-2-52 COILTRONICS (407-241-7876). CAN BE COUPLED AS INDICATED BY PHASING DOTS. LT1006 POWER SUPPLY PINS CONNECTED TO INPUT SUPPLY. dImotr_2.eps Figure 2. Tachless motor-speed regulator Linear Technology Magazine • October 1994 29 NEW DEVICE CAMEOS New Device Cameos LTC1147L-3.3 and LTC1148L- standard PCMCIA interface control- industry standard PCMCIA card 3.3: Extremely Low Dropout lers is provided through compatible controllers. Stepdown Controllers digital inputs. Both the LTC1314 and LTC1315 The LTC1147L-3.3 and LTC1148L3.3 are the industry’s first 3.3V, low-dropout, stepdown switching regulator controllers. The LTC1148L3.3 is a synchronous switching regulator controller available in a compact 14-lead SOIC. The LTC1147L-3.3 is a non-synchronous switching regulator controller, available in a space-saving 8-lead SOIC. Both controllers operate down to a minimum input voltage of less than 3.6V, providing extremely low dropout operation. Battery life is extended by providing high efficiencies at load currents from milliamps (when the device is in standby or sleep mode) to amps (under full power conditions). The 100% duty cycle characteristic in dropout mode allows maximum energy to be extracted from the battery pack, further extending operating time. Both devices use current-mode architecture with Burst ModeTM operation to provide extremely high efficiency over the entire load range demanded by the next generation of notebook, pen-based, and handheld computers. LT1312/LT1313 Micropower Single and Dual 120mA PCMCIA VPP Regulators/Drivers Both regulators boast micropower operation, with the quiescent current falling to just 30 microamps for the LT1312 and 60 microamps for the LT1313, when programmed to the 0V or Hi-Z modes. A single 1 microfarad capacitor is the only external component required to ensure smooth transitions between operating voltages. Both parts have no overshoot when supplying 12V to sensitive flash memory cards. Full 3.3V/5V compatibility is provided by an internal comparator that continuously monitors the PC card VCC supply and adjusts the regulated VPP output to match VCC when the VPP = VCC mode is selected. Both devices include VPP valid status outputs to indicate when the output voltage is in regulation at 12V. The combination of micropower operation and full card and socket protection make these parts ideal solutions for battery powered applications. The LT1312 and LT1313 will find application in palmtop, notebook, and desktop computers, instruments, handi-terminals, and bar-code readers. are designed for micropower operation and draw only 1 microamp when programmed to the Hi-Z or 0V operating modes. Built-in charge pumps, which drive both the internal and external N-FET switches, eliminate the need for continuous 12V power. In fact, the external 12V supply is only required when the VPP = 12V mode is selected. When not needed, the external 12V supply is shut down by a logic-compatible signal from the LTC1314, further reducing system power consumption. Internal break-before-make switch action and ramped gate drive ensure that the outputs of the LTC1314 and LTC1315 move smoothly between operating voltages, with no switch overlap or VPP overshoot. Small bypass capacitors are the only external components required. The combination of efficient operation and full card and socket control make the LTC1314/LTC1315 ideal solutions for battery-powered applications. These parts will find application in palmtop, notebook, and desktop computers, instruments, handi-terminals, and bar -code readers. LTC1314/LTC1315 Single and Dual PCMCIA VPP LTC1390: Serial-Controlled, Switching Matrix with BuiltEight-channel Analog N-Channel Gate Drivers in V Multiplexer The LT1312 single and LT1313 dual CC regulators power and protect the VPP pins of standard PCMCIA card slots. Built-in current limit and thermal shutdown ensure that a short-circuit condition on either side of a standard PCMCIA socket will not damage the host computer or PC card through the VPP pins. Further, the LT1312 and LT1313 produce clean, tightly regulated 0V, 3.3V, 5V, 12V, and Hi-Z outputs from any available unregulated 13V to 20V supply, thus eliminating the cost of an extra 12V regulator to generate clean VPP power. Direct connection with industry30 The LTC1314 single and LTC1315 dual power controllers provide all the switching necessary to control one or two PCMCIA card slots. Both devices boast 120mA VPP output current capability and provide 0V, VCC, 12V, and Hi-Z output states. VCC switching between OFF, 3.3V, and 5V is accomplished with inexpensive low RDS(ON) N-channel switches driven by an internal voltage multiplier, which generates 12V gate drive from the 5V logic supply. Both the LTC1314 and LTC1315 have logic-compatible inputs that interface directly with The LTC1390 is a low cost, eightchannel analog multiplexer featuring eight individual switches controlled by a three-wire digital interface. It has a bidirectional data retransmission capability, allowing it to be wired in series with a serial A/D converter using only one serial port. The interface also allows multi-input expansion with the connection of several LTC1390s, using only a single digital port. The specifications for each analog channel achieved at bipolar ±5V supply are full analog signal range, 75Ω Linear Technology Magazine • October 1994 NEW DEVICE CAMEOS maximum on-resistance (R ON), ±5 nanoamp maximum ON and OFF channel leakage current, and ±10 picocoulomb maximum charge injection. For dynamic switching between channels, a guaranteed break-beforemake operation is ensured. All pins can withstand repeated ±2kV ESD strikes and 100mA fault currents without latching-up. All digital inputs are TTL and CMOS compatible. The LTC1390 is also provided with a full set of specifications for operation on a +3V supply. The LTC1390 is available in 16-lead plastic DIP and SOIC packages. LTC1348 Ultra-low-power, 3.3V-Powered Threedriver, Five-receiver Transceiver with True RS232 Output Levels The LTC1348 is a new three-driver, five-receiver RS232 interface transceiver that supplies true RS232 output-voltage levels when operated from a single 3.3V power supply. The integral charge-pump power generator uses three 0.1µF commutating capacitors to generate ±8V power supplies for the driver stages. The charge pump provides sufficient output current to drive a serial-port mouse and 3kΩ2500pF loads at data rates up to 120kbaud. Power consumption is only 500µA in normal operation. Driver-enable and receiver-enable controls provide flexible power management capability to reduce power to as little as 0.2µA when the circuit is shut down. Receiver and driver outputs are high impedance when disabled or with power off. Driver outputs and receiver inputs are tolerant of the full ±25 volt levels that can occur on RS232 data lines. Like all Linear Technology RS232 transceivers, the LTC1348 is protected against ±10kV ESD strikes to the RS232 inputs and outputs. This integrated ESD resistance saves the expense and space of external protection devices. The circuit is available in 28-lead DIP, SOIC, and SSOP packages. All Linear Technology Magazine • October 1994 package configurations use a flowthrough pinout to simplify PC board layout. LTC1261: Regulated Switched-Capacitor Inverter Designed to generate a regulated negative supply from a low positive voltage, the LTC1261 is ideal for providing bias voltages for GaAs FET RF transmitters and other circuits that require a precisely regulated negative supply. The heart of the LTC1261 is a charge pump that can both double and invert the input voltage, allowing it to generate a −5V output from a +3V input. An on-board PWM regulation loop keeps the output within 5% of the set value at all times, with up to 15mA load current, even with variations in the input voltage. Output ripple is typically below 5mV. An open-drain output monitors the regulation loop and pulls down to indicate that the LTC1261 is in regulation, allowing external circuitry to monitor the output without additional components. A shutdown pin brings the output voltage to zero and cuts the quiescent current to only 5 microamps. An on-board resistor string allows the LTC1261CS14 to provide −3.5V, −4V, −4.5 V and −5V outputs with simple pin connections; other output voltages can be set using external resistors. The LTC1261CS8 is available with adjustable and fixed −4V and −4.5V options. The LTC1261CS14 is available in a 14-pin narrow SO package and requires only one or two external 0.1µF capacitors for operation, depending on the input voltage; input and output bypass capacitors are also required. The LTC1261CS8 offers all the same features with a standard inverting-only charge pump in an SO8 package. LTC1279: 12-Bit, 600ksps Sampling Analog-toDigital Converter The LTC1279 is the second in a series of high-speed, high-resolution analog-to-digital converters optimized for telecom digital-data transmission applications such as High-bit-rate Digital Subscriber Line (HDSL). Whereas the recently introduced LTC1278-4’s 400ksps conversion rate easily covers T1 data rates, the LTC1279’s 600ksps is ideal for HDSL’s faster E1 data rates. The parallel data bus provides an excellent, yet flexible and easy, interface to popular DSPs. The analog-signal input range is 0V to 5V when operating on a single 5V power-supply voltage or ±2.5V when operating on a split ±5V power-supply voltage. The LTC1279’s higher speed is achieved without sacrificing dynamic conversion characteristics. The improved S/(N+D) (SINAD) is a minimum of 70dB at fS = 600ksps and fIN = 100kHz. The high-performance conversion characteristics ensure that the bit-error rate is extremely low (<<10−12). Other key LTC1279 specifications include differential and integral linearity errors of ±1LSB (max), THD of −78dB (max), and a typical 4MHz full-power bandwidth, ideal for undersampling applications. Key features include low power dissipation of just 75mW (fS = 600ksps, +5V or ±5V supply voltage) during operation and just 5mW when power shutdown is active. The LTC1279 includes an internal voltage reference and conversion clock with synchronizing circuitry. The LTC1279 is available in a small-footprint SOIC package that results in efficient use of circuit-board space. For further information on the above or any of the other devices mentioned in this issue of Linear Technology, use the reader service card or call the LTC literature service number: 1-800-4-LINEAR. Ask for the pertinent data sheets and application notes. Burst ModeTM is a trademark of Linear Technology Corporation. Information furnished by Technology Corporation is believed to be accurate and reliable. However, Linear Technology makes no representation that the circuits described herein will not infringe on existing patent rights. 31 DESIGN TOOLS Applications on Disk NOISE DISK This IBM-PC (or compatible) progam allows the user to calculate circuit noise using LTC op amps, determine the best LTC op amp for a low noise application, display the noise data for LTC op amps, calculate resistor noise, and calculate noise using specs for any op amp. Available at no charge. SPICE MACROMODEL DISK This IBM-PC (or compatible) high density diskette contains the library of LTC op amp SPICE macromodels. The models can be used with any version of SPICE for general analog circuit simulations. The diskette also contains working circuit examples using the models, and a demonstration copy of Available at no charge. PSPICETM by MicroSim. Technical Books 1990 Linear Databook — This 1440 page collection of data sheets covers op amps, voltage regulators, references, comparators, filters, PWMs, data conversion and interface products (bipolar and CMOS), in both commercial and military grades. The catalog features well over 300 devices. $10.00 1992 Linear Databook Supplement — This 1248 page supplement to the 1990 Linear Databook is a collection of all products introduced since then. The catalog contains full data sheets for over 140 devices. The 1992 Linear Databook Supplement is a companion to the 1990 Linear Databook, which should not be discarded. $10.00 1994 Linear Databook, Volume III — This 1826 page supplement to the 1990 Linear Databook and 1992 Linear Databook Supplement is a collection of all products introduced since 1992. A total of 152 product data sheets are included with updated selection guides. The 1994 Linear Databook Volume III is a supplement to the 1990 and 1992 Databooks, which should not be discarded. $10.00 Linear Applications Handbook — 928 pages full of application ideas covered in depth by 40 Application Notes and 33 Design Notes. This catalog covers a broad range of “real world” linear circuitry. In addition to detailed, systems-oriented circuits, this handbook contains broad tutorial content together with liberal use of schematics and scope photography. A special feature in this edition includes a 22 page section on SPICE macromodels. $20.00 1993 Linear Applications Handbook Volume II — Continues the stream of “real world” linear circuitry initiated by the 1990 Handbook . Similar in scope to the 1990 edition, the new book covers Application Notes 41 through 54 and Design Notes 33 through 69. Additionally, references and articles from nonLTC publications that we have found useful are also included. $20.00 Interface Product Handbook — This 336 page handbook features LTC’s complete line of line driver and receiver products for RS232, RS485, RS423, RS422 and AppleTalk applications. Linear’s particular expertise in this area involves low power consumption, high numbers of drivers and receivers in one package, 10kV ESD protection of RS232 devices and surface mount packages. Available at no charge. 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The handbook contains over 20 data sheets, Design Notes and Application Notes. $40.00 SwitcherCAD Handbook — This 144 page manual, including disk, guides the user through SwitcherCAD—a powerful PC software tool which aids in the design and optimization of switching regulators. The program can cut days off the design cycle by selecting topologies, calculating operating points and specifying component values and manufacturer's part numbers. $20.00 1994 Power Solutions Brochure — This 52 page collection of circuits contains real-life solutions for common power supply design problems. There are over 45 circuits, including descriptions, graphs and performance specifications. Topics covered include micropower DC/DC, step-up and step-down switching regulators, off-line switching regulators, linear regulators, switched capacitor conversion and power management. Available at no charge. LINEAR TECHNOLOGY CORPORATION 1630 McCarthy Boulevard Milpitas, CA 95035-7487 (408) 432-1900 Literature Department 1-800-4-LINEAR AppleTalk is a registered trademark of Apple Computer, Inc. ©32 1994 Linear Technology Corporation/ Printed in U.S.A./27K Linear Technology Magazine • October 1994