V16N1 - MARCH

LINEAR TECHNOLOGY
MARCH 2006
IN THIS ISSUE…
COVER ARTICLE
Take the Easy Road to
Digitally Managed Power ...................1
Andy Gardner
Issue Highlights ..................................2
Linear Technology in the News….........2
DESIGN FEATURES
Cascadable, 7A Point-of-Load
Monolithic Buck Converter ..................6
Peter Guan
I2C Bus Buffer Resolves Stuck Buses,
Eliminates Heavy Load Limitations
and Provides Level Translation .........10
George Humphrey
Negative Voltage Hot Swap™
Controller with 10-Bit ADC
and I2C Monitoring ............................13
Zhizhong Hou
High Efﬁciency Nickel Charger
Operating to 34V is Easily
Conﬁgured to Deliver a
Safe Fast Charge...............................19
James A. McKenzie
Tiny Controller Makes It Easy
to Charge Large Capacitors ...............22
David Ng
MOSFETs Make Sense for Tracking
and Sequencing Power Supplies ........24
Thomas DiGiacomo
High Voltage Boost/LED
Controller Provides 3000:1
PWM Dimming Ratio ..........................31
Eugene Cheung
3A Monolithic Buck Regulator
in 4mm × 4mm QFN ...........................34
Theo Phillips
DESIGN IDEAS
....................................................37–45
(complete list on page 37)
New Device Cameos ...........................46
Design Tools ......................................47
Sales Ofﬁces .....................................48
VOLUME XVI NUMBER 1
Take the Easy Road to
Digitally Managed Power
Introduction
by Andy Gardner
Digital management of high availability q A 7-channel ADC multiplexer
power supplies holds great promise,
with four external differential
but it often comes at the cost of compliinputs, a 12V input, a 5V VDD incated multichip circuit solutions. For
put, and an input for the on-chip
example, an application with voltagetemperature sensor.
current monitoring and supply voltage q Two continuous time, 8-bit, curmargining can require a number of
rent output DACs with voltage
ICs, including a low-drift reference,
buffered outputs. The outputs of
a multichannel, differential input
the voltage buffers can be placed
ADC with at least 12 bits of resoluin a low leakage, high impedance
tion, an 8-bit DAC, and a dedicated
state.
microcontroller. Add to this the con- q A built-in, closed-loop servo
siderable software
algorithm that
development efadjusts the
The LTC2970
fort required for
point-of-load
simpliﬁes the design of
margining algovoltage of a
digitally managed power
rithms, voltage
DC/DC converter
and current monito the desired
supplies by incorporating
tor functions, and
value. The range
important features into one
the cost, comand resolution of
easy-to-use device.
plexity, spacious
the voltage servo
board real-estate
is user adjustrequirements and blossoming designable with two external resistors.
debug time can deter even the most q Extensive, user conﬁgurable
dedicated power supply designer from
overvoltage and undervoltage
trying digitally managed power.
fault monitoring.
The LTC2970 simpliﬁes the design q An I2C and SMBus compliant
of digitally managed power supplies
2-wire serial bus interface, two
by incorporating important features
GPIO pins, and an ALERT pin.
into one easy-to-use device: a dual q An on-chip, 5V, linear regulator
power supply monitor and controller.
that allows the LTC2970 to operFigure 1 shows a block diagram of the
ate from an external 8V to 15V
LTC2970, highlighting the following
voltage supply.
features:
q Another part in the family, the
q A 14-bit, differential input, ΔΣ
LTC2970-1, adds a tracking
ADC with a maximum total unadalgorithm that allows two or more
justed error (TUE) of ±0.5% over
power supplies to be ramped up
the industrial temperature range
and down in a controlled manner.
when using the on-chip reference.
continued on page 3
L, LT, LTC, LTM, Burst Mode, OPTI-LOOP, Over-The-Top and PolyPhase are registered trademarks of Linear Technology
Corporation. Adaptive Power, BodeCAD, C-Load, DirectSense, Easy Drive, FilterCAD, Hot Swap, LinearView, µModule,
Micropower SwitcherCAD, Multimode Dimming, No Latency ΔΣ, No Latency Delta-Sigma, No RSENSE, Operational Filter,
PanelProtect, PowerPath, PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT, True Color PWM,
UltraFast and VLDO are trademarks of Linear Technology Corporation. Other product names may be trademarks of the
companies that manufacture the products.
L EDITOR’S PAGE
Issue Highlights
D
igital management of high availability power supplies holds
great promise, but it often
comes at the cost of complicated multichip circuit solutions. The LTC2970
simpliﬁes the design of digitally managed power supplies by incorporating
important features into one easy-touse device.
See our cover article for more about
this breakthrough device.
Featured Devices
Below is a summary of the other devices featured in this issue.
The LTC3415 provides a compact, simple, complete and versatile
point-of-load power supply with 7A
capability. (Page 6)
The LTC4304 is a hot swappable
2-wire bus buffer that features pro-
prietary stuck bus protection circuitry
to unburden the MCU from the tasks
of monitoring, troubleshooting and
resolving stuck I2C buses. (Page 10)
The LTC4261 integrates a –48V
Hot Swap controller, 10-bit ADC
monitoring and I2C/SMBus communication. It monitors the real-time
board parameters such as current and
voltages and communicates the data
to the host. (Page 13)
The LTC4011 is a complete standalone nickel chemistry fast charger
that operates at high efﬁciency with an
input voltage of up to 34V, even with a
battery voltage that is much less than
the DC input supply. (Page 19)
The LT3750 is a current-mode
ﬂyback controller optimized for charging large value capacitors to a user
selected target voltage. (Page 22)
The LTC2926 MOSFET-controlled
power supply tracker provides exceptionally ﬂexible control of supply
tracking and sequencing. (Page 24)
The LTC3783 is a current-mode
boost controller optimized for constant-current True Color PWM™
dimming of high powered LEDs.
(Page 31)
The LTC3412A is a monolithic
buck regulator in a 4mm × 4mm QFN
that can deliver efﬁciencies to 95% and
operate at 4MHz. (Page 34)
Design Ideas and Cameos
Design Ideas start on page 37, including a, low noise, very low drift FET
ampliﬁer; a simple, digitally tunable
active RC ﬁlter; and a way to increase
the dimming range of an LED driver.
Cameos appear on page 46. L
Linear Technology in the News…
EDN Magazine Nominates
Linear for Innovation Awards
EDN magazine has announced
nominations for its annual EDN
Innovation Awards, honoring outstanding engineering professionals
and products.
Linear Technology’s LTM4600
high power DC/DC µModule is
nominated for an award in the Power
Systems and Modules category. The
LTM4600 is the ﬁrst in a new family
µModules from Linear Technology
that leverages the company’s core
strengths in power management
and conversion. The LTM4600 provides designers with a complete 10A
switching power supply in a tiny, low
proﬁle package that can be mounted
on either side of a PC board.
EDN has also nominated for Best
Contributed Article, Jim Williams’
article, “Minimizing Switching Regulator Residue in Linear Regulator
Outputs.” Winners will be announced
in the April issue of EDN.
2
Linear A/D Converters Nominated
for EE Times ACE Awards
EE Times announced that they have
nominated Linear Technology’s
family of A/D converters as an Ultimate Product Finalist in the Analog
category in the 2006 EE Times ACE
Awards. The publication highlights
the most signiﬁcant products of the
past year, with EE Times’ readers selecting ﬁnalists from a list of Ultimate
Products chosen by the publication’s
editors. EE Times will announce the
ACE Award winners in April.
Linear Technology now offers a
broad line of high performance A/D
converters. These ADCs at 10, 12,
14 and 16 bits, and up to 185Msps,
have the lowest noise and provide
extremely high bandwidth for undersampling. Linear’s A/D converter
family also includes 3V devices, featuring the lowest power consumption
and smallest solution size, spanning
sampling rates from 10 to 125Msps
at 10-, 12- and 14-bit resolution.
Electronic Products
Selects LTM4600 µModule
as Product of the Year
Electronic Products magazine selected Linear Technology’s LTM4600
µModule for their Product of the Year
Awards, honoring the most signiﬁcant new products of the past year.
The LTM4600 was highlighted in
a cover article in the January issue
of Electronic Products, as well as in a
February feature on how the product
came about.
Electronic Products’ editors commented, “Representing a new level
of device integration for DC/DC conversion, the LTM4600 µModule
synchronous switchmode DC/DC
converter from Linear Technology
is a complete power supply that
can be placed almost anywhere on
the board—even on the bottom—as
it offers a reduction in space and
circuit complexity of up to 60% over
solutions using multiple components.” L
Linear Technology Magazine • March 2006
DESIGN FEATURES L
LTC2970, continued from page 1
linear search algorithm that compares
the digitized point-of-load voltage
against the target. The current being
sourced by IDAC0 is then adjusted as
needed one LSB per servo iteration.
This current develops a point-of-load
ground referenced correction voltage
across resistor R40 which is buffered
to the VOUT0 pin. The resulting voltage differential between the VOUT0 pin
and the converter’s feedback node is
multiplied by a factor of –R20/R30 and
added to the nominal output voltage
of the DC/DC converter, thus closing
Margining and
Monitoring Application
Figure 2 shows a typical application
circuit for monitoring and margining
a DC/DC converter with external
feedback resistors.
The LTC2970’s VIN0_A differential
inputs sense the voltage directly at
the point-of-load while inputs VIN0_B
monitor the voltage across sense resistor R50. The DC/DC converter’s output
voltage can be margined to precise,
user-programmable set points by a
5V REGULATOR
VIN
VOUT
12VIN 10
2R
the servo loop. When voltage margining
is disabled, the converter’s feedback
node can be isolated from the LTC2970
by placing the VOUT0 pin in a high
impedance state.
Figure 3 shows the LTC2970 applied to a DC/DC converter with a
TRIM pin. As in Figure 2, two external
resistors are required: VOUT0 connects
to the TRIM pin through resistor R30
and IOUT0 is terminated at the DC/DC
converter’s point-of-load ground by
R40. Following power-up, the VOUT0
pin defaults to a high impedance
0µA TO 255µA
IDAC0
8 BITS
R
14 IOUT0
VDD
VDD
9
+
12VP
CMP0
12VM
VDDP
GND 25
+
VDDM
TEMP
SENSOR
–
VBUF0
VDD
TSNSP
11 VOUT0
–
UVLO
POR
TSNSM
VIN0_AP
1
CH0_AP
VIN0_AM
2
CH0_AM
VIN0_BP
3
CH0_BP
VIN0_BM
4
CH0_BM
VIN1_AP
5
CH1_AP
VIN1_AM
6
CH1_AM
VIN1_BP
7
CH1_BP
VIN1_BM
8
CH1_BM
REF 23
0µA TO 255µA
+
–
IDAC1
8 BITS
+
CMP1
ADC
CLOCKS
VDD
3.5k
7:1 MUX
RAM
ADC_Results
MONITOR LIMITS
SERVO TARGETS
SCL 18
ASEL0 22
POR
CLOCK
GENERATION
OSCILLATOR
ASEL1 21
GPIO_0 16
SERVO CONTROLLER
GPIO_1 15
DAC SOFT CONNECT FUNCTION
SERVO FUNCTION
MONITOR FUNCTION
MANAGE FAULT REPORTING
WATCH DOG
TRACKING CONTROL (LT2970-1)
ALERT 17
GPIO_CFG 20
7
12 VOUT1
VBUF1
–
REFERENCE
1.229V (TYP)
20Ω
I2C BUS INTERFACE
(400kHz, SMBUS COMPATIBLE)
–
+
6.65X
(TYP)
RGND 24
SDA 19
13 IOUT1
14-BIT
DELTA-SIGMA
A/D
18
REGISTERS
I/O CONFIGURATION
IDAC0
IDAC1
ADC MONITOR
FAULT ENABLE
INSTANTANEOUS FAULTS
LATCHED FAULTS
2
POR
Figure 1. Block diagram of the LTC2970
Linear Technology Magazine • March 2006
3
L DESIGN FEATURES
state allowing the DC/DC converter
to power-up to its nominal output
voltage. After power-up, the LTC2970’s
soft-connect feature can be used to
automatically ﬁnd the IDAC code
that most closely approximates the
TRIM pin’s open-circuit voltage before
enabling VOUT0.
Applications that need to be sequenced can be conﬁgured to hold
off the DC/DC converter when the
LTC2970 powers-up by tying the
GPIO_CFG pin high. This causes the
GPIO_0 pin to automatically pull the
DC/DC converter’s RUN pin low until
the SMBus compatible I2C interface
releases it.
The absolute accuracy of the
LTC2970 is demonstrated in Figure 4.
The LTC2970 is conﬁgured to servo
one of the outputs of a LTC3728 DC/
DC converter to 1V if the converter’s
voltage deviates by more than ±0.1%.
The LTC2970 is easily able to hold
the output voltage to within ±1mV
of 1V while both it and the DC/DC
converter are heated from –50°C to
100°C. When the LTC2970 is isolated
from the LTC3728, the output voltage
drifts between 1.002V and 1.0055V
over the same temperature range.
8V TO 15V
VIN
IN
OUT
VIN0_BM
I–
VIN0_BP
R30
R20
RUN/SS
0.1µF
GPIO_CFG
I+
DC/DC
CONVERTER
FB
R10
ALERT
VOUT0
SCL
VIN0_AP
SDA
I2C BUS
+
LOAD VDC0
–
GPIO_0
IOUT0
R40
VIN0_AM
GND SGND
REF
GND ASEL0 ASEL1
0.1µF
Figure 2. Application circuit for DC/DC converter with external feedback resistors
8V TO 15V
0.1µF
12VIN
VIN
VDD
VO+
1/2 LTC2970
0.1µF
GPIO_CFG
R30
TRIM
DC/DC
CONVERTER
VOUT0
ALERT
VIN0_AP
I2C BUS
SCL
SDA
VSENSE+
+
ON/OFF
LOAD VDC0
–
VSENSE–
GPIO_0
IOUT0
R40
VIN0_AM
VO–
The LC2970’s features offer several
beneﬁts that differentiate it from competitive solutions:
4
VDD
1/2 LTC2970
Features
REF
GND ASEL0 ASEL1
0.1µF
Figure 3. Application circuit for a DC/DC converter with a trim
attenuates ripple components that
have the potential to alias to DC.
The ADC’s differential inputs can
monitor supply voltages at the point
of load and sense resistor voltages.
The differential and common mode
input ranges span –0.3V to 6V. With
its 500µV/LSB resolution, the ADC
can resolve voltages for a wide range
of load current across sense resistor
values of only a few milliohms. For
1.006
LOAD CURRENT
1.004
R1
L
RL
RL = INDUCTOR DCR
R1 = R2 =10kΩ
C1 = C2 = 0.1µF
C1
UNCORRECTED
VOUT (V)
Delta-Sigma ADC
The LTC2970’s ADC is a second-order
delta-sigma modulator followed by a
sinc2 digital ﬁlter that converts the
modulator’s serial data into a 14-bit
word at a conversion rate of 30Hz. The
ADC’s TUE is less than ±0.5% when
using the on-chip reference.
One advantage delta-sigma ADCs
offer over conventional ADCs is on-chip
digital ﬁltering. Combined with a large
over-sampling ratio (OSR = 512), this
feature makes the LTC2970 insensitive
to the effects of noise when sampling
power-supply voltages. The LTC2970’s
sinc2 digital ﬁlter provides high rejection except at integer multiples of the
modulator sampling frequency, fs =
30.72kHz. Adding a simple RC lowpass ﬁlter at the input of the ADC
0.1µF
VIN
R50
R2
1.002
1
0.998
−50
DRIFT AND OFFSET
CORRECTED
C2
–
+
−25
50
0
25
TEMPERATURE (°C)
75
14-BIT
DELTA-SIGMA
A/D
100
Figure 4. Corrected and uncorrected DC/DC
converter output voltage vs temperature
Figure 5. Network for sensing load
current with inductor DCR
Linear Technology Magazine • March 2006
DESIGN FEATURES L
disturbance to the converter’s output
voltage.
There is no body diode from the
VOUT0 pin to the LTC2970’s VDD supply, and the VOUT0 pin goes into a high
impedance state when VDD drops below
the LTC2970’s undervoltage lockout
threshold. So no special precautions
need to be taken in the event the
DC/DC converter is still active when
the LTC2970 powers down.
DC/DC
CONVERTER
OUT
R20
–
+
11
R30
ADJUST
VOUT0
–
+
R10
Voltage Servo
The voltage servo feature can be
conﬁgured to trigger on under voltage and/or over voltage events, run
continuously, or run just once. The
LTC2970 relies on a simple linear
search algorithm to ﬁnd the IDAC code
that results in an ADC input voltage
that most closely corresponds to the
servo target. The polarity of the servo
algorithm can be programmed as inverting (default) or noninverting.
SOFT CONNECT
COMPARATOR
IDAC0
8 BITS
14
R40
GND
IOUT0
POINT OF LOAD
GROUND
Figure 6. DAC connections to DC/DC converter with an external feedback resistors
switching power supply applications
without sense resistors, measure the
load current via the DC resistance
of the inductor using the application
circuit shown in Figure 5.
The ADC inputs are also isolated
from the LTC2970’s internal supply.
So the user can measure differential
and common mode input voltages that
are greater than VDD without turning
on body diodes, and no special precautions need to be taken if the LTC2970
loses power while monitoring DC/DC
converter voltages powered from a
different supply.
Voltage Buffered IDACs
Figure 6 illustrates how each of the
LTC2970’s continuous-time IDACs
connects to a DC/DC converter with
an external feedback network. The
servo’d correction voltage is set by
resistor R40. Since R40 is terminated
at the point-of-load ground, the correction voltage is insensitive to load
induced ground bounce. The correction voltage is buffered to the VOUT0
pin by a unity-gain ampliﬁer whose
output can be placed in a low-leakage (<100nA), high impedance state.
Resistor R30 connects the VOUT0 pin
to the feedback node of the DC/DC
converter. The range and resolution
over which the correction voltage can
move the converter’s output is adjustable via resistor R30.
A “soft-connect” feature allows the
LTC2970 to automatically ﬁnd the
VOUT0 voltage that most closely approximates the DC/DC converter’s
feedback node voltage before enabling
the voltage buffer thus minimizing any
Voltage Monitor
The LTC2970 is able to perform ADC
conversions on any combination of
seven different input channels. Overvoltage and undervoltage threshold
continued on page 46
8V TO 15V
0.1µF
12VIN
VDD
10k
Q10, Q11: 2N7002
D10, D11: MMBD4448V
*SOME DETAILS OMITTED FOR CLARITY
0.1µF
GPIO_CFG
100k
GPIO_0
RUN/SS
D10
LTC2970-1
Q10
VOUT0
R30A
R30B
ALERT
I2C BUS
FB
R10
SCL
IOUT0
SDA
0.1µF
R31B
R20
FB
R11
IOUT1
VDC0
IN
VIN
DC/DC
CONVERTER
Q11
GND
OUT
RUN/SS
D11
R31A
VIN
R40
GPIO_1
VOUT1
IN
DC/DC
CONVERTER
OUT
VDC1
R21
R41
Figure 7. The LTC2970-1 enables supply tracking
Linear Technology Magazine • March 2006
5
L DESIGN FEATURES
Cascadable, 7A Point-of-Load
by Peter Guan
Monolithic Buck Converter
Introduction
Easy-to-use and compact point-ofload power supplies are necessary
in systems with widely distributed,
high current, low voltage loads. The
LTC3415 provides a compact, simple,
complete and versatile solution. It
includes a pair of integrated complementary power MOSFETs (32mΩ top
and 25mΩ bottom) and requires no
external sense resistor. A complete
design involves choosing an inductor
and input/output capacitors, and
that’s it. The result is a fast, constant
frequency, current mode, 7A DC/DC
switching regulator.
0.1µF
47µF
6.3V
3x
38
1
3
4
5
10pF
6
7
8
9
MODE
10
11
12
37
36
CLKOUT RUN
NC
PVIN
35
PVIN
34
SVIN
33
ITHM
SGND
32
ITH
NC
TRACK
PLLLPF
VFB
PVIN
PVIN
PVIN
PVIN
SW
SW
LTC3415EUHF
SW
SW
SW
SW
SW
SW
MODE
PGOOD
PGND (39)
CLKIN
BSEL
MGN
PHMODE
PGND PGND PGND PGND PGND PGND PGND
13
14
15
16
17
18
31
30
29
27
22pF
30.1k
26
25
24
23
22
21
10k
SVIN
20
19
100µF, 6.3V
2x
0.2µH
15k
SVIN
28
VOUT
1.8V/7A
Figure 1. Typical application of the LTC3415 in a 3.3V to 1.8V/7A step down converter
Operation
Figure 1 shows a typical application
of the LTC3415 in a 3.3V to 1.8V/7A
step down converter. Figure 2 shows
its efﬁciency and power loss vs load
current. Figure 3 shows its transient
response to a 5A load.
The LTC3415 uses a constant frequency, current mode architecture
to drive an integrated pair of complementary power MOSFETs. An internal
oscillator sets the 1.5MHz operating
95
10000
EFFICIENCY
90
EFFICIENCY (%)
85
VOUT = 1.8V
100mV/DIV
AC COUPLED
1000
80
75
100
70
65
POWER LOSS
60
VIN = 3.3V
VOUT = 1.8V
Burst Mode OPERATION
55
50
frequency of the device. The main
P-channel power MOSFET turns on
with every oscillator cycle and turns
off when the internal current comparator trips, indicating that the inductor
current has reached a level set by the
ITH pin. An internal error ampliﬁer, in
turn, drives the ITH pin by monitoring
the output voltage through an external resistive divider connected to the
VFB pin. While the P-channel power
MOSFET is off, the internal synchronous N-channel power MOSFET turns
on until ether the inductor current
10
100
1000
LOAD CURRENT (mA)
POWER LOSS (mW)
6
2
SGND
Features
The overall solution is extremely compact since the LTC3415’s QFN 5mm ×
7mm package footprint is small while
its high operating frequency of 1.5MHz
allows the use of small low proﬁle
surface mount inductors and ceramic
capacitors. For loads higher than 7A,
multiple LTC3415s can be cascaded
to share the load while running mutually antiphase, which reduces overall
ripple at both the input and the output.
Other features include:
q Spread spectrum operation to
reduce system noise,
q Output tracking for controlled
VOUT ramp-up and ramp-down,
q Output margining for easy system
stress testing,
q Burst Mode® operation to lower
quiescent current and boost efﬁciency during low loads,
q Low shutdown current of less
than 1µA,
q 100% duty-cycle for low drop out
operation, phase-lock-loop to allow frequency synchronization of
±50%,
q Easily cascadable for multi-device
load sharing with multiphase
operation
q Internal or external ITH compensation for either ease of use or
loop optimization.
1Ω
VIN
IINDUCTOR
STEP =
0A TO 5A
5A/DIV
IOUT
STEP =
0A TO 5A
5A/DIV
10
1
10000
Figure 2. Efﬁciency and power loss vs
load current for the circuit in Figure 1
VIN = 3.3V
40µs/DIV
L = 0.2µH
COUT = 2 × 100µF
Figure 3. Transient response to a
5A load for the circuit in Figure 1
Linear Technology Magazine • March 2006
DESIGN FEATURES L
10k
0.1µF
RUN
100pF
1000pF
0.1µF
1Ω
1Ω
VIN
VIN
38
1
SGND
2
3
4
5
6
7
8
9
10
11
SVIN
12
37
36
CLKOUT RUN PVIN
NC
35
PVIN
34
SVIN
33
ITHM
SGND
32
ITH
NC
TRACK
PLLLPF
VFB
PVIN
PVIN
PVIN
PVIN
SW
SW
LTC3415EUHF
SW
SW
SW
SW
SW
SW
MODE
PGOOD
PGND (39)
CLKIN
BSEL
PHMODE
MGN
PGND PGND PGND PGND PGND PGND PGND
13
14
15
16
17
18
38
22µF
6x
31
1
15k
30
VTRACK
29
10k
SGND
2
3
4
28
27
30.1k
10pF
100pF
26
5
6
25
7
24
8
23
9
10k
22
21
10
SVIN
11
BSEL
20
MGN
SVIN
12
36
35
PVIN
34
SVIN
33
ITHM
SGND
32
ITH
NC
TRACK
PLLLPF
VFB
PVIN
PVIN
PVIN
PVIN
SW
SW
LTC3415EUHF
SW
SW
SW
SW
SW
SW
MODE
PGOOD
PGND (39)
CLKIN
BSEL
PHMODE
MGN
PGND PGND PGND PGND PGND PGND PGND
13
19
37
CLKOUT2 RUN PVIN
NC
14
15
16
17
18
31
30
29
28
27
26
25
24
23
22
21
20
BSEL
MGN
19
100µF
6.3V
2x
VOUT
1.8V/14A
0.2µH
0.2µH
Figure 4. Dual-phase single output 3.3V to 1.8V 15A application using two LTC3415s running 180° out of phase with respect to each other.
Modes of Operation:
Burst, Pulse-Skip, and
Forced Continuous
Three modes of operation can be selected through the MODE pin. Tying
it to VIN enables Burst Mode operation
for highest efﬁciency. During low output loads, the peak inductor current
limit is clamped to about a quarter of
the maximum value and the ITH pin is
monitored to determine whether the
device will go into a power-saving Sleep
mode. Quiescent current is reduced
to 450µA in Burst Mode operation
because most of the internal circuitry
is turned off.
For applications that aim to reduce
output ripple and strive to maximize
operating time at constant frequency,
pulse-skip mode is a good solution.
Pulse-skip mode is enabled by letting
the Mode pin ﬂoat or tying it to VIN /2
or VOUT. Inductor current is still not
allowed to reverse as in Burst Mode operation, but the peak inductor current
limit is no longer clamped internally.
ITH has full control of output current
until ITH drops so low (at low output
Linear Technology Magazine • March 2006
loads) that minimum on-time of the
device is reached and the LTC3415
begins to skip cycles.
For applications that require constant frequency operation even at no
load, the LTC3415 can be put into
forced continuous mode operation
by tying the Mode pin to ground. In
this mode, inductor current is allowed
to reverse while the internal power
MOSFETs are always driven at the
same frequency.
Output Tracking
For applications that require controlled output voltage tracking between
100
95
90
EFFICIENCY (%)
starts to reverse, as indicated by the
SW pins going below ground, or until
the beginning of the next cycle.
85
80
1
75
2
3 4
6
70
65
60
55
50
1
10
LOAD CURRENT (A)
100
Figure 5. Combined efﬁciency of loadsharing in 1-phase, 2-phase, 3-phase,
4-phase, and 6-phase operation.
their various outputs in order to prevent excessive current draw or even
latch-up during turn-on and turnoff, the LTC3415 includes a Track
pin that allows the user to program
how its output voltage ramps during
start-up and shutdown. During startup, if the voltage on the Track pin is
less than 0.57V, the feedback voltage
regulates to this tracking voltage, thus
programming the output voltage to
follow along. Inductor current is not
allowed to reverse during tracking,
ensuring monotonic voltage rise. When
the tracking voltage exceeds 0.57V,
tracking is disabled and the feedback
voltage regulates to the internal reference voltage (0.596V). In other words,
output voltage is controlled by the
Track voltage until the output is in
regulation.
Taking the LTC3415’s Run pin
to below 1.5V would normally shut
down the part, but if the output also
needs tracking during shutdown,
then the LTC3415 must remain active even if the Run pin is low. So,
during shutdown, if Track is 0.5V or
more below SVIN, then even if Run is
low, the LTC3415 will not shutdown
until Track has fallen below 0.18V,
thus allowing the output to properly
7
L DESIGN FEATURES
0°
180°
90°
CLKIN CLKOUT
+90°
PHMODE
CLKIN CLKOUT
+90°
CLKIN CLKOUT
+90°
PHMODE
PHMODE
CLKIN CLKOUT
PHASE 4
PHASE 7
PHASE 10
120°
210°
300°
(420°)
60°
+90°
PHMODE
CLKIN CLKOUT
PHMODE
PHASE 5
PHASE 8
CLKIN CLKOUT
PHMODE
PHASE 11
+120°
PHASE 3
+90°
PHMODE
PHASE 2
150°
CLKIN CLKOUT
PHMODE
CLKIN CLKOUT
+90°
CLKIN CLKOUT
+90°
PHMODE
PHASE 6
330°
240°
CLKIN CLKOUT
+90°
+120°
PHMODE
PHASE 1
CLKIN CLKOUT
(390°)
30°
270°
+90°
CLKIN CLKOUT
PHMODE
PHMODE
PHASE 9
PHASE 12
Figure 6. Cascaded, 12-phase operation makes for efﬁcient high current load sharing
track the master voltage during its
ramp-down. For applications that
do not require tracking or externally
controlled soft start, simply tie the
Track pin to SVIN.
Output Margining
For convenient and accurate system
stress test on the LTC3415’s output,
the user can program the LTC3415’s
output to ±5, ±10, and ±15% of its
nominal operational voltage. The MGN
pin, when left ﬂoating, forces normal
operation. When MGN is tied to GND, it
forces negative margining, in which the
output voltage is below the regulation
point. When MGN is tied to SVIN, then
the output voltage is forced to above the
regulation point. The amount of output voltage margining is determined
by the BSEL pin. When BSEL is low,
it’s 5%. When BSEL is high, it’s 10%.
When BSEL is left ﬂoating, margin
percentage is 15%. To prevent system
glitches while margining, the internal
output overvoltage and undervoltage
comparators are disabled and thus
PGOOD remains pulled high by the
external resistor.
Multiphase Operation
For output loads that demand more
than 7A of current, multiple LTC3415s
can be cascaded to run out of phase
while equally sharing output load
8
current. Figure 4 shows a dual-phase
single output 3.3V to 1.8V 14A application using two LTC3415s running
180° out of phase with respect to each
other. Figure 5 shows the combined efﬁciency of 1-phase, 2-phase, 3-phase,
4-phase, and 6-phase operation.
The CLKIN pin allows the LTC3415
to synchronize to an external frequency
(between 0.75Mhz and 2.25Mhz) and
the internal phase-lock-loop allows
the LTC3415 to lock on to CLKIN’s
phase as well. The CLKOUT signal
can be connected to the CLKIN pin of
the following LTC3415 stage to line up
both the frequency and the phase of
the entire system. Tying the PHMODE
pin to SVIN, SGND, or SVIN/2 (ﬂoating)
respectively generates a phase difference (between CLKIN and CLKOUT) of
180°, 120°, or 90°, which respectively
corresponds to 2-phase, 3-phase, or
4-phase operation. A total of 12 phases
can be programmed by setting the
PHMODE pin of each phase to different
levels. For instance, a slave stage that’s
180° out of phase from the master can
generate a 120° CLKOUT signal that’s
300° (PHMODE = SGND) away from
the master for the next stage, which
then can generate a CLKOUT signal
that’s 420°, or 60° (PHMODE = SVIN/2)
away from the master for its following
stage. See Figure 6.
A multiphase power supply signiﬁcantly reduces the amount of ripple
current in both the input and output
capacitors. The RMS input ripple current is divided by, and the effective
ripple frequency is multiplied by, the
number of phases used (assuming
that the input voltage is greater than
the number of phases used times the
output voltage). The output ripple
amplitude is also reduced by, and the
effective ripple frequency is increased
by, the number of phases used.
Output Current Sharing
When multiple LTC3415s are cascaded
to drive a common load, accurate
output current sharing is essential
to achieve optimal performance and
efﬁciency. Otherwise, if one stage is
delivering more current than another,
then the temperature between the
two stages is different, and that can
translate into higher switch RDS(ON),
lower efﬁciency, and higher RMS
ripple. Each LTC3415 has a trimmed
peak current limit such that when the
ITH pins of multiple LTC3415s are tied
together, the amount of output current delivered from each LTC3415 is
nearly the same.
Different ground potentials among
LTC3415 stages, caused by physical
distances and switching noises, could
cause an offset to the absolute ITH value
Linear Technology Magazine • March 2006
DESIGN FEATURES L
Internal/External
ITH Compensation
During single phase operation, the
user can simplify the compensation
of the internal error ampliﬁer loop
(on the ITH pin) by tying it to SVIN to
enable internal compensation, which
connects an internal 50k resistor in
series with a 50pF cap to the internal
ITH compensation point. This is a tradeoff for simplicity and ease of use at the
expense of OPTI-LOOP® optimization,
where external ITH components can
be selected to optimize the loop transient response with minimum output
capacitance.
In multi-phase operation where
all the ITH pins of each phase are tied
together to achieve accurate load
sharing, internal ITH compensation is
disabled and external compensation
components need to be properly selected for optimal transient response
and stable operation.
Master/Slave Operation
In multiphase single-output operation, the user has the option to run
in multi-master mode where all the
FB, ITH, and output pins of the stages
are tied to each other. All the error
ampliﬁers are effectively operating in
parallel and the total transconductance (gm) of the system is increased
by the number of stages. The ITH
value, which dictates how much
current is delivered to the load from
each stage, is averaged and smoothed
out by the external ITH compensation
components. Nevertheless, in certain
applications, the resulting higher gm
from multiple 3415s can make the
system loop harder to compensate;
in this case, the user can choose an
alternative mode of operation.
Linear Technology Magazine • March 2006
–10
–20
–30
VIN = 5V
VOUT = 1.8V
RBW = 100Hz
–10
–14.1dBm
–20
–30
–40
AMPLITUDE (dBm)
AMPLITUDE (dBm)
seen by each stage. To ensure that
the ground level doesn’t affect the ITH
value, the LTC3415 uses a differential ampliﬁer that takes as input not
just the ITH pin, but also the ITHM pin,
which doesn’t connect to any other
circuitry except for the ITH differential
ampliﬁer. Therefore, the ITHM pins of
all the LTC3415 stages should be tied
together and then connected to the
SGND pin at only one point.
–50
–60
–70
–80
–50
–60
–70
–80
–90
–100
–100
a. The LTC3415’s output noise spectrum
analysis in free-running constant frequency
operation
–37.3dBm
–40
–90
1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
FREQUENCY (MHz)
VIN = 5V
VOUT = 1.8V
RBW = 100Hz
1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
FREQUENCY (MHz)
b. The LTC3415’s output noise spectrum
analysis in spread spectrum operation
Figure 7. Spread spectrum operation reduces EMI peaks
by spreading the EMI energy over a range of frequencies
The second mode of operation is
single-master operation where only
the error ampliﬁer of the master stage
is used while the error ampliﬁers of
the other stages (slaves) are disabled.
The slave’s error ampliﬁer is disabled
by tying its FB pin to SVIN, which
also disables the internal overvoltage
comparator and power-good indicator.
The master’s error ampliﬁer senses the
output through its FB pin and drives
the ITH pins of all the stages. To account for ground voltage differences
among the stages, the user should tie
all ITHM pins together and then tie it to
the master’s signal ground. As a result,
not only is it easier to do loop compensation, this single-master operation
should also provide for more accurate
current sharing among stages because
it prevents the error amplifer’s output
(ITH) of each stage from interfering with
that of another stage.
Spread Spectrum Operation
Switching r egulators can be
troublesome where electromagnetic interference (EMI) is a concern.
Switching regulators operate on a
cycle-by-cycle basis to transfer power
to an output. In most cases, the frequency of operation is ﬁxed or is a
constant based on the output load.
This method of conversion creates
large components of noise at the frequency of operation (fundamental) and
multiples of the operating frequency
(harmonics).
To reduce this noise, the LTC3415
can run in spread spectrum operation by tying the CLKIN pin to SVIN.
In spread spectrum operation, the
LTC3415’s internal oscillator is designed to produce a clock pulse whose
period is random on a cycle-by-cycle
basis but ﬁxed between 60% and 140%
of the nominal frequency. This has
the beneﬁt of spreading the switching
noise over a range of frequencies, thus
signiﬁcantly reducing the peak noise.
Figures 7 and 8 show how the spread
spectrum feature of the LTC3415
signiﬁcantly reduces the peak harmonic noise vs free-running constant
frequency operation. Spread spectrum
operation is disabled if CLKIN is tied to
ground or if it’s driven by an external
frequency synchronization signal.
Conclusion
With its many operational features
and compact total solution size, the
LTC3415 is an ideal ﬁt for today’s
point-of-load power supplies. It also
has the advantage of simple upgradeability: if the load requirement of a
power supply increases, no need to
dread the redesign of the whole system,
just stack on another LTC3415 and
keep going. L
for
the latest information
on LTC products,
visit
www.linear.com
9
L DESIGN FEATURES
I2C Bus Buffer Resolves Stuck Buses,
Eliminates Heavy Load Limitations
and Provides Level Translation
by George Humphrey
Introduction
The I2C bus is a 2-wire bidirectional communications bus primarily
used for system conﬁguration and
monitoring. A bus master, typically
a microcontroller unit (MCU), polls
system components for information
such as supply voltage and temperature, Vital Product Data (VPD) from
memories on removable cards, and
system conﬁguration. The master
can also use the bus to reconﬁgure
the system through general purpose
BACKPLANE
input/output ports (GPIOs) and other
programmable devices. Large-scale
telecommunication and data storage
systems are divided up into several
peripheral cards. Each card plugs
on to the I2C bus and communicates
its system information to the MCU
through the back plane.
Certain considerations must be
addressed to ensure a high level of reliability when designing a system using
the I2C bus. Primarily, systems must
BACKPLANE
CONNECTOR
STAGGERED
CONNECTOR
I/O PERIPHERAL CARD 1
VCC
R1
10k
C1
0.01µF
R2
10k
VCC
ACC
SDA
MCU
provide protection against a hung or
stuck bus. If for any reason the bus
is stuck low, there is the potential to
bring the entire system down. Another
consideration is dealing with heavy
capacitive loads on the bus. The I2C
standard speciﬁes a 400pF limit on the
bus. With systems becoming larger,
this speciﬁcation becomes problematic
because of so many devices connected
directly to the bus. Systems also
need to be robust, allowing cards to
SDAIN
SCL
SCLIN
ENABLE
LTC4304
GND
R4
10k
R5
10k
SDAOUT
I2 C
DEVICES
SCLOUT
READY
FAULT
10k
I/O PERIPHERAL CARD 2
C3
0.01µF
VCC
ACC
SDAIN
SCLIN
ENABLE
LTC4304
GND
R8
10k
R9
10k
SDAOUT
I2 C
DEVICES
SCLOUT
READY
FAULT
10k
• • •
I/O PERIPHERAL CARD N
C5
0.01µF
ACC
SDAIN
SCLIN
ENABLE
VCC
LTC4304
GND
R12
10k
SDAOUT
SCLOUT
R13
10k
I2 C
DEVICES
READY
FAULT
10k
Figure 1. Typical application of the LTC4304
10
Linear Technology Magazine • March 2006
DESIGN FEATURES L
be inserted or removed from a live
backplane without corruption of the
I2C bus data. Finally, cards must be
immune to ESD events that can occur
from human handling.
The LTC4304 is a multifunctional
device. It has a ﬂexible architecture
that allows it to be conﬁgured into
almost any system. The LTC4304
features proprietary stuck bus protection circuitry that unburdens the
MCU from the tasks of monitoring,
troubleshooting and resolving stuck
buses. Simplifying this task also saves
PCB board space and connector pins.
The LTC4304 provides bidirectional
capacitance buffering, isolating the
card bus from the backplane bus.
Rise time accelerators help heavily
capacitive-loaded buses meet I2C rise
time speciﬁcations. The LTC4304 also
enables cards to be inserted or removed
from the system without corrupting the
data on the I2C bus. Built-in ±15kV
of human Body Model ESD protection
provides a rugged front end for cards
that typically have the SDA and SCL
lines connected directly to the card
connector.
Circuit Operation
Startup and Hot Swap
To take full advantage of the LTC4304’s
Hot Swap features, a staggered connector must be used: where VCC and
GND are the longest pins, SDA and
SCL pins medium length and ENABLE
the shortest. After the card’s VCC and
GND connect with the live backplane,
the voltage on VCC starts to rise. At this
time, the LTC4304’s precharge circuitry charges the capacitance on the
SDA and SCL lines to 1V. Precharged
SDA/SCL lines minimize disturbances
on the bus when they connect to the
backplane. The remainder of the
LTC4304’s circuitry is disabled until
the supply voltage rises above 2.5V
(typical) and the voltage on ENABLE
is above 1.4V (typical). Making ENABLE the shortest pin insures that
SCL and SDA are ﬁrmly seated before
a connection is established on the bus.
When the VCC supply to the LTC4304
is valid, it assumes that the card is
connected to a live backplane and looks
Linear Technology Magazine • March 2006
SDAOUT
5V/DIV
SDAIN
5V/DIV
STUCK LOW > 30ms
RECOVERS
DISCONNECT AT TIMEOUT
AUTOMATIC CLOCKING
SCLOUT
5V/DIV
FAULT
5V/DIV
200µs/DIV
Figure 2. Stuck bus resolved with automatic clocking
for either a stop bit or a bus idle on the
backplane side on SDAIN and SCLIN.
When one of these conditions is met
and SDAOUT and SCLOUT are high,
the connection circuitry is activated,
connecting the card side bus with the
backplane bus. These requirements
ensure that the data on the bus is not
corrupted when the card is plugged
in. READY indicates the status of the
connection circuitry and is high when
the connection circuitry is active.
Bus Stuck Low Timeout
The LTC4304 monitors SDAOUT and
SCLOUT on the card side of the I2C
bus. When SDAOUT or SCLOUT is low,
an internal timer is started, only to be
reset when SDAOUT and SCLOUT are
both high. If SDAOUT or SCLOUT do
not go high within 30ms, the connection between the inputs and outputs
is automatically disconnected, and
FAULT asserts low indicating a stuck
bus. The LTC4304 also detects a fault if
powered up into a stuck bus condition.
In either case, the LTC4304 automatically generates up to 16 clock pulses
at 8.5kHz on SCLOUT. If SDAOUT and
SCLOUT go high, FAULT releases and
is pulled high. The LTC4304 then looks
for a stop bit or a bus idle before automatically reconnecting. While there
is a stuck bus condition, a connection
can be forced with a rising edge on
ENABLE, even if bus idle conditions
are not met.
Capacitance Buffering
The connection circuitry contains a
unique patent-pending architecture
that provides electrical isolation,
isolating the capacitance on the card
side bus from the backplane side bus,
while maintaining full I2C functionality. This means that the MCU only
sees the capacitance of the backplane
and the low input capacitance of
the LTC4304, <10pF guaranteed by
design. The LTC4304 drives the capacitance of the circuitry on the card
side. The LTC4304 regulates the voltage on the opposite side from which
it is being driven to a slightly higher
voltage. This voltage (call it VOS) is a
function of VCC, the pull-up resistor,
and an internally set constant terms
given by the equation:
VOS =
VCC
• 20 + 75mV
RPULLUP
For example: For a 2.7kΩ pull-up
and a VCC of 3.3V,
VOS =
3.3mV
• 20 + 75mV = 99.4mV
2.7kΩ
Rise Time Accelerators
Rise-time accelerators are included
on all four SDA and SCL pins. Once
activated, the accelerators switch in
3.5mA of current (typical at VCC = 2.7V)
into the SDA and SCL lines to make
them rise faster. This ensures that
rise-time requirements are met and
allows the use of larger pull-up resistors to reduce power consumption.
When ACC is connected to ground, all
four accelerators are ON. When ACC is
connected to VCC, all four accelerators
are OFF. And when ACC is ﬂoating,
only the accelerators on SDAOUT and
SCLOUT are activated. Accelerators
cannot be used on pins where the
pull-up voltage is less than VCC. The
ﬂexibility of the accelerators control
provided by ACC allows the LTC4304
11
L DESIGN FEATURES
to interface with buses not common
with its supply.
Applications
Stuck Bus Automatically Resolved
Independent of the MCU
The I2C bus protocol calls for bidirectional communication between
devices. A typical example is a
microcontroller unit (or MCU) communicating with a slave device. As the
slave device’s internal register is read
by the MCU, the MCU clocks the slave
device to receive each bit of data. A
problem occurs when the MCU is out
of sync with the slave device—the slave
device is waiting for another clock and
the MCU thinks it has already sent
out enough clocks. If the slave device
happens to be holding the data line
low, all further communications are
prevented and the I2C bus is stuck.
Figure 1 shows a card with a
resident LTC4304 that acts as the
interface between the devices on the
BACKPLANE
CONNECTOR
continued on page 18
STAGGERED
CONNECTOR
5V
C1
0.01µF
3.3V
R1
10k
card and the I2C bus, when the card is
plugged into the backplane. In normal,
plugged-in operation, a connection
is established between SDAIN and
SDAOUT, and SCLIN and SCLOUT.
Internal comparators monitor the
SDAOUT and SCLOUT nodes of the
circuit. When SDAOUT or SCLOUT
is low, an internal timer starts. The
timer is only reset when SDAOUT and
SCLOUT are both high. If they don’t
go high within 30ms, it is determined
that the bus is stuck low and the con-
R2
10k
ACC
SDA
SDAIN
SCL
SCLIN
5V
ENABLE
VCC
LTC4304
GND
R3
10k
R4
10k
SDAOUT
CARD_SDA
SCLOUT
CARD_SCL
READY
FAULT
R5
10k
a. VCC is higher than the pull-up voltage on SDAIN and SCLIN.
BACKPLANE
CONNECTOR
STAGGERED
CONNECTOR
3.3V
C2
0.01µF
5V
R6
10k
R7
10k
ACC
SDA
SDAIN
SCL
SCLIN
3.3V
ENABLE
VCC
LTC4304
GND
R8
10k
R9
10k
SDAOUT
CARD_SDA
SCLOUT
CARD_SCL
READY
FAULT
R10
10k
b. VCC is equal to the output side pull-up voltage, and less than input side pull-up voltage.
BACKPLANE
CONNECTOR
STAGGERED
CONNECTOR
2.5V
5V
C3
0.01µF
3.3V
R11
10k
R12
10k
ACC
SDA
SDAIN
SCL
SCLIN
3.3V
R15
10k
ENABLE
VCC
LTC4304
GND
R13
10k
R14
10k
SDAOUT
CARD_SDA
SCLOUT
CARD_SCL
READY
FAULT
c. VCC is greater than the pull-up voltages of both sides.
Figure 3. The LTC4304 can be the bridge between a backplane operating at one voltage and a card
operating at a different voltage. Here are three possible scenarios and appropriate conﬁgurations.
12
Linear Technology Magazine • March 2006
DESIGN FEATURES L
Negative Voltage Hot Swap Controller
with 10-Bit ADC and I2C Monitoring
by Zhizhong Hou
Introduction
High availability –48V power systems,
such as telecom and AdvancedTCA
systems, allow for circuit board
upgrade and replacement on a live
powered backplane. The primary role
of a Hot Swap controller is to make
this possible by limiting potentially
large inrush currents, which can cause
damage to the hot swapped board or
create disturbances on the backplane.
Traditionally, –48V Hot Swap controllers operate autonomously—the
Hot Swap controller shuts down an
abnormally operating board before
the host processor knows why. This
simpliﬁes system design, but gives
little in the way of diagnostic support
to the host.
A far more robust system would
use the Hot Swap controller to communicate the conditions of the board
to the host processor, and let the host
processor take action. To this end, the
LTC4261 integrates a –48V Hot Swap
controller, 10-bit ADC monitoring and
I2C/SMBus communication. It monitors the real-time board parameters
such as current and voltages and
communicates the data to the host.
Features
Figure 1 shows a simpliﬁed block
diagram of the LTC4261. Power is
derived from the –48V RTN using an
external dropping resistor connected
to the VIN pin. An internal shunt
regulator clamps the voltage at VIN to
11.2V above VEE (chip ground). This
ﬂoating architecture allows a wide
operating voltage range. The device
also provides a 5V linear-regulated
voltage at the INTVCC pin that can
source current up to 20mA for driving
external circuits.
Using an external N-channel pass
transistor, the negative Hot Swap circuit of the LTC4261 allows a board to
be safely inserted and removed from a
live –48V backplane. The device features a new inrush control technique
Linear Technology Magazine • March 2006
ADR0
SCL
ADR1
SDAI
SDAO
I2C
INTERFACE
ADIN
ADIN2
10-BIT ADC
ALERT
REGISTER
INTVCC
VIN
IN
5V
REGULATOR
11.2V
UVL
OUT
40×
UVH
NEGATIVE VOLTAGE
Hot Swap
OV
VEE
VEE
SENSE
SS
TMR
GATE
RAMP
DRAIN
Figure 1. Simpliﬁed block diagram of LTC4261
that minimizes stresses on the pass
transistor in all operating conditions.
Turning the device on or off can be
either autonomous or controlled by
a host processor through the I2C interface. Auto-retry following a fault is
programmable and fully controlled by
the host. Conﬁgurations of the device
are stored in the internal registers as
shown in Table 1.
The LTC4261 continuously monitors and registers board status and
fault conditions. With an onboard 10bit ADC and 3-channel multiplexer, it
accurately measures real-time board
current (through the voltage across the
sense resistor) and two external voltages. The data are stored in the ADC
registers (see Table 1). When polled
by a host processor, the LTC4261
reports the ADC data along with the
status and fault information using
the I2C interface. The real-time board
current and voltages provides a means
for the host to detect any early warn-
ing signal and to ﬂag the board for
maintenance before it fails. With the
ALERT pin, the LTC4261 interrupts
the host for speciﬁc fault conditions,
when conﬁgured to do so.
One unique feature of the LTC4261
is that the I2C interface can be easily
conﬁgured using the address pins
(ADR1 and ADR0) into a single-wire
broadcast mode that only uses a single
I2C signal, SDAO, to report the ADC
data and fault information. This mode
simpliﬁes the interface and saves
component cost by eliminating two
optoisolators.
The LTC4261 has additional features to sequence two power good
outputs, detect insertion of a board
and turn off the pass transistor if
an external supply monitor fails to
indicate power good within a timeout
period. Using the PGIO and FLTIN
pins along with the ADC, the device
can detect a speciﬁc fuse that is open
for up to four fuses.
13
L DESIGN FEATURES
–48V RTN
RIN
4× 1k IN SERIES
1/4W EACH
R3
453k
1%
UV = 38.5V
UV RELEASE
AT 43V
7
8
9
10
11
19
20
26
2
25
24
R2
16.9k
1%
OV = 72.3V
OV RELEASE
AT 71V
CUV
100nF
CIN
1µF
R1
CVCC
11.8k
0.1µF
1%
–48V INPUT
VEE
UVL
UVH
ADIN2
OV
SS
TMR
EN
ON
ADR1
ADRO
VEE
FLTIN
PGI
SCL
SDAI
SDAO
ALERT
14
15
RG
10Ω
16
+
VIN+
MODULE2
27 PWRGD1
PG
23
ADIN
SENSE GATE DRAIN RAMP
ON
VIN–
CL
330µF
100V
VIN+
MODULE1
ON
VIN–
18
RD
1M
RF
1k
CR
10nF
100V
5%
CF
RS
33nF 0.008Ω
1%
R10
10k 1%
22
1
6
5
4
3
PGIO 28 PWRGD2
CG 47nF
CTMR
47nF
VIN
LTC4261CGN
13
CSS
220nF
21
INTVCC
Q1
IRF1310NS
VOUT
R11
402k 1%
Figure 2. A –48V/200W Hot Swap controller (5.6A current limit, 0.66A inrush) using LTC4261 with current, input voltage and VDS monitoring
10-Bit ADC Provides Accurate
Measurement of Real-Time
Board Current and Voltages
Quantitative monitoring of real-time
board level voltage and current (and
thus power) provides signiﬁcant beneﬁts in high availability systems. Real
time operating data can be compared
to budgeted or historical data to detect whether a circuit board is using
its allotted power or if is operating
abnormally. By issuing early warning
to system management, an abnormally
operating board can be ﬂagged for
service even before it fails. This feature
greatly improves the reliability of high
availability systems.
The LTC4261 includes a 10-bit ADC
that accurately measure voltages at
the SENSE, ADIN2 and ADIN pins, all
referred to chip ground (VEE). With a
2.56V full scale and 2.5mV resolution,
the ADIN and ADIN2 pins are uncommitted inputs that allow monitoring of
any external voltages. With the sense
resistor, the SENSE pin voltage is used
to measure current ﬂowing through
the pass transistor. This voltage is
Table 1. LTC4261 registers
Register
Read/ Write
Description
STATUS
R
Provides pass transistor (on/off), EN (high/low) and PGIO
input conditions. Also lists ﬁve fault present conditions.
FAULT
R/W
Latches overcurrent, overvoltage, undervoltage, power
bad, FETshort faults and EN changed state. Also logs
FLTIN and PGIO inputs.
ALERT
R/W
Enables which faults interrupt the host using the ALERT
pin. Defaults not to alert on faults at power-up.
CONTROL
R/W
Controls on or off of the pass transistor and whether the
part auto-retries or latches off after a fault. Also conﬁgures
the PGIO pin and enables ADC register test mode.
SENSE
R/W
ADC data for the SENSE voltage measurement
ADIN2/OV
R/W
ADC data for the ADIN2 (on TSSOP) or OV (on QFN) pin
voltage measurement
ADIN
R/W
ADC data for the ADIN pin voltage measurement
14
internally ampliﬁed by 40 times resulting in a 64mV full scale and 62.5μV
resolution. The digital codes of the
three voltages after each conversion
are stored in corresponding ADC
registers (see Table 1) and updated
at a frequency of 7.3Hz. Setting the
test mode bit in the CONTROL register
halts the updating so that software
testing can be performed by writing to
and reading from the registers.
An example of using the ADC
monitoring is shown in Figure 2, where
current, input voltage and VDS of the
pass transistor are measured at the
SENSE, ADIN2 and ADIN pins, respectively. The latter two voltages can
be used to derive the output voltage
referred to RTN. Another application
of the ADC monitoring is to detect an
open fuse in a multi-feed system, which
is detailed later in this article.
Independently Adjustable
Inrush and Overcurrent
Limits Minimize Stress
on Pass Transistor
A typical –48V/200W Hot Swap application using the LTC4261 is shown
in Figure 2. Initial turn-on of pass
transistor Q1 is autonomous but
I2C can take over the control after
power-up. To protect the pass transistor from overstress, the LTC4261
independently controls inrush current
Linear Technology Magazine • March 2006
DESIGN FEATURES L
charge. This draws a current from the
RAMP pin that ﬂows through CR and
causes the GATE current to drop to
0. The RAMP pin is regulated at 1.1V
so the inrush is set by the ramp rate
of VOUT, which leads to:
–48V INPUT
50V/DIV
VOUT
50V/DIV
SENSE
0.5A/DIV
PG
50V/DIV
IINRUSH = 20µA
10ms/DIV
Figure 3. The LTC4261 start-up behavior
during power-up and overcurrent
upon a short circuit. As indicated in
Figure 2, the current limit and circuit
breaker threshold is set to 5.6A by the
sense resistor RS, while the inrush is
set to a much lower level (0.66A) by
controlling the ramp rate of VOUT with
an external capacitor CR connected
between VOUT and the RAMP pin. The
operation theory and the beneﬁts of
this inrush and overcurrent control
technique are demonstrated below.
Following a start-up debounce
delay, the turn-on sequence of the
LTC4261 starts with charging the SS
pin up with a 10µA current. The SS
voltage (VSS) is converted to a GATE
pull-up current. When the GATE voltage reaches the threshold voltage of the
pass transistor Q1, the inrush starts
to ﬂow through Q1. The output voltage
(VOUT) begins to move and CR begins to
CL
CR
The slew rate of VSS determines
dI/dt of the inrush current. Figure 3
shows the start-up behavior of the
LTC4261.
The LTC4261 provides 2-level
overcurrent protection: an active
current limit (ACL) ampliﬁer that also
serves as a circuit breaker comparator
with a threshold of 50mV±10%, and
a fast pull down comparator with a
threshold of 150mV. In the event of an
output short or a fast input step, when
VSENSE exceeds 150mV, the fast pull
down comparator immediately brings
the GATE down with a 110mA current.
Once VSENSE falls back below 150mV,
the ACL starts to servo the GATE and
maintains a constant output current of
50mV/RS. If the short-circuit condition
lasts longer than the circuit breaker
delay of 530µs, the pass transistor is
turned off and an overcurrent fault is
registered. The device defaults to latch
off upon an overcurrent fault but can
be conﬁgured to automatically re-try
after a cooling delay. Figure 4 illustrates the response of the LTC4261 to
the short-circuit condition. In the case
of an input step, the inrush control
circuit takes over following the fast
GATE pull-down and the current limit
loop is disengaged before the circuit
breaker timer expires. The device then
operates similarly to the start-up,
only with a difference that the current
through the pass transistor is now a
sum of inrush and load current.
By decoupling start-up inrush
from the current limit/circuit breaker
threshold, the LTC4261 makes it possible to optimize the safe operating
area (SOA) of the pass transistor in
all operating conditions. The short
circuit breaker timer substantially
reduces the stress on the pass transistor in a short-circuit condition.
Startup and input step typically impose the greatest stress on the pass
transistor. Setting the inrush current
much smaller than the current limit
relieves the SOA requirement during
start-up and input step. This allows
using smaller pass transistors for
large load applications, making selection of pass transistors much easier.
Using the dedicated RAMP pin that
is regulated separately from GATE
50mV
SENSE
530µs
INRUSH
10V
GATE
VOUT
1.77V
PWRGD1
DELAY
OC COOLING DELAY
TMR
4x
2x
PWRGD2
DELAY
2x
SS
PG
PGIO
Figure 4. Response of the LTC4261 to overcurrent fault in auto-retry mode
Linear Technology Magazine • March 2006
15
L DESIGN FEATURES
for inrush control, the LTC4261 does
not require a large capacitor between
GATE and VEE that relates to CR, so
the turn-off of the pass transistor upon
short-circuit can be fast even for large
load applications.
UVL/UVH
R1
11.8k
1%
0V
R1
11.8k
1%
UVL
0V
OV TURN-ON = 71V, OV TURN-OFF = 72.3V
UV TURN-ON = 43V
UV TURN-OFF = 38.5V
HYSTERESIS = 4.5V
UV TURN-ON = 43V
UV TURN-OFF = 41.2V
HYSTERESIS = 1.8V
UV TURN-ON = 46V
UV TURN-OFF = 38.5V
HYSTERESIS = 7.5V
c.
b.
a.
Figure 5. Adjustment of undervoltage thresholds and hysteresis
71V with UV turn-off at 38.5V and
OV turn-off at 72.3V.
The UV levels can be adjusted by
connecting a resistor RH between the
UVH and UVL pins, as illustrated in
Figure 5b (UVL tap above UVH tap for
a larger hysteresis) and Figure 5c (UVL
tap below UVH tap for a smaller hysteresis). In the latter case, the LTC4261
does not allow hysteresis to drop to
zero or negative values if a larger RH
is used. Instead, hysteresis reaches a
guaranteed minimum (15mV typical)
and increases with increasing RH,
preventing comparator oscillation.
Versatile On/Off Control
The LTC4261 provides various methods of on/off control using the ON, EN,
UVH/UVL/OV, PGIO or FLTIN pins
along with the I2C interface. Turning
on or off the pass transistor can be
either autonomous or controlled by the
system host through the I2C interface.
Furthermore, the LTC4261 may reside
on either the removable board or on
the backplane.
Even when operating autonomously, the host can exercise control
over the GATE output through I2C,
although EN and ON could subsequently override conditions set by I2C
1M
INTVCC
INTVCC
LTC4261
VEE
UVH
–48V INPUT
–48V INPUT
–48V INPUT
INTVCC
ON
R2
15k
1%
0V
R1
11.8k
1%
LOOP OR
SWITCH
47k
RH
1.91k
1%
UVH
R2
15k
1%
5V
1k
UVL
RH
1.91k
1%
R2
16.9k
1%
The LTC4261 provides two UV pins
(UVH and UVL) that can be used to precisely set the undervoltage threshold
and hysteresis. Each of the two pins
has an accurate threshold: 2.56V for
UVH rising (turn-on) and 2.291V for
UVL falling (turn-off), and both pins
have a small, built-in hysteresis of
15mV. With either a rising or falling
input voltage, both the UVH and UVL
pins have to cross their thresholds for
the comparator output to change state.
If both pins fall below their thresholds,
an undervoltage fault is registered.
The ratio between the UVH and
the UVL thresholds is designed to
precisely set 43V turn-on and 38.5V
turn-off UV thresholds popular in
telecom applications with minimum
external components, by tying UVH
and UVL together. Along with the OV
pin (with a threshold of 1.77V and a
hysteresis of 37.5mV), the 3-resistor
divider shown in Figure 5a sets an
accurate operating range of 43V to
R3
453k
1%
R3
453k
1%
R3
453k
1%
Adjustable Undervoltage
Comparator Offers Both
Precision and Flexibility
–48V RTN
–48V RTN
–48V RTN
100k
LTC4261
EN
ON
–48V
10nF
–48V
a. Optoisolator control
EN
EN
VEE
LTC4261
VEE
ON
–48V
c. Contact debounce delay upon
insertion for use with an ejector
switch or loop-through style
connection sense
b. Logic control
–48V
RTN
453k
INTVCC
INTVCC
SDAO
ON LTC4261 SDAI
SCL
VEE
EN
UVL LTC4261 ON
28.7k
UVH
VEE
EN
–48V
INPUT
–48V
d. Short pin connection sense to RTN
e.
I2C-only
INTVCC
SDAO
ON LTC4261 SDAI
SCL
VEE
EN
I2C
I2C
–48V
control (default off)
f. I2C-only control (default on)
Figure 6. The LTC4261 provides versatile on/off control
16
Linear Technology Magazine • March 2006
DESIGN FEATURES L
Broadcast Mode
Saves Cost and Space
To facilitate I2C communication between the LTC4261 and a system
host that are isolated from each other,
the SDA signal is split into SDAI and
SDAO. Separate pins allow the device
to drive optoisolators with a minimum
number of external components. Still,
three optoisolators (two for inputs on
SCL and SDAI, and one for output on
SDAO) are needed for typical I2C operations. To further reduce component
count, the LTC4261 provides a special
single-wire mode that only uses the
SDAO pin to continuously transmit
ADC data and fault information (Figure 7). This simple communication
mode saves component cost and board
space by eliminating two optoisolators
and is useful for applications where
only monitoring is needed.
The single-wire broadcast mode is
simply enabled by tying the ADR1 pin
to INTVCC and the ADR0 pin to VEE
(Figure 7). At the end of conversion of
each ADC channel, a serial data stream
is sent out to SDAO with a ﬁxed data
rate of 15.3kHz ±20% in the format
shown in Figure 8. The data stream
Linear Technology Magazine • March 2006
–48V RTN
6× 0.51k IN SERIES
1/4W EACH
1µF
0.1µF
VEE
5V
5.1k
INTVCC
VIN
ADR1
SDAI
ADR0 LTC4261
SCL
5.1k
SDAO
V
DIN DD
MICROCONTROLLER
–48V INPUT
Figure 7. The LTC4261 in single-wire broadcast mode reports ADC data
and fault information using a single optoisolator and the SDAO signal.
INTERNAL
CLK
PRTY
OV
PRTY
PRTY
UV
0C
OV
OV
UV
UV
OC
0C
ADC0
.. .. .. ADC0
ADC0
ADC9
ADC9
CH0
SDAO
CH0
ADC9
CH1
CH0
START DMY
CH1
DATA
CH1
command. Card insertion/extraction
can be conveniently detected with the
EN-changes-state bit in the FAULT
register. After power-up, UV, OV and
other fault conditions seize control as
needed to turn off the GATE output,
regardless of the state of EN, ON or
the I2C port.
Auto-retry following the faults can
be enabled or disabled by the host at
any time and the conﬁgurations are
stored in the CONTROL register (Table
1). Although PGIO (when conﬁgured as
an input) and FLTIN control nothing
directly, they are useful for I2C monitoring of connection sense or other
important signals. The host can then
use the information detected by these
two pins to take action.
Figure 6 shows some examples for
on/off control using the LTC4261.
The circuits in Figures 6a to 6d work
equally well in both backplane and
board resident applications. Circuits
in Figures 6e and 6f are for I2C-only
control.
START
Figure 8. Data format of the single-wire broadcast mode
consists of a start bit (STAT), a dummy
bit (DMY), two bits of ADC channel
labeling (CH1 and CH0), ten bits of
ADC data (ADC9:0), three fault bits
(OC, UV, OV) and a parity bit (PRTY).
The data are encoded with an internal
clock in a way similar to Manchester
encoding that can be easily decoded
by a microcontroller.
RTNA
RTNB
F1
D1
F2
D2
D3
D4
R1
150k
R2
301k
Which of the
Four Fuses is Open?
Some high availability systems such
as AdvancedTCA require dual feeds on
both –48V and RTN lines and a fuse
on each feed, resulting in four fuses.
Since the plug-in card is designed to
operate without interruption even if
one of the fuses is open, it can be dif-
R4
80.6k
RIN
4 × 1000Ω in series
R5
2k
CIN
1µF
R3
3.4k
VIN
ADIN2
ADIN
LTC4261
INTVCC
−48V A
−48V B
R6
100k
R8
100k
R7
10k
R9
10k
PGIO
FLTIN
F3
D5
F4
D6
SCL
SDAI
SDAO
VEE
I2C/SMBUS
ALERT
CVCC
0.1µF
Figure 9. LTC4261 makes it possible to determine which
of the four fuses is open in an AdvancedTCA system.
17
L DESIGN FEATURES
Table 2. The voltages at ADIN and ADIN2 (referred to VEE) indicate
which RTN fuse is open in the 4-fuse monitor in Figure 9
VADIN = VADIN2 = 0V
Both F1 and F2 are open
0.25 • VADIN2 ≤ VADIN < 0.7 • VADIN2
F1 is open
0.7 • VADIN2 ≤ VADIN < 1.1 • VADIN2
F2 is open
VADIN > 1.1 • VADIN2
Normal Operation
ﬁcult, without direct fuse monitoring,
to detect a single open fuse.
The integrated ADC, I2C monitoring, and general-purpose pins of the
LTC4261 make it possible to monitor
the individual fuses, as shown in
Figure 9. Fuses on the RTN side are
sensed using resistors R1, R2 and R3
with the output measured by the ADC
at the ADIN pin. At the same time, the
input voltage after the ORing diodes is
sensed using R4 and R5 and measured
at the ADIN2 pin. Diodes D3 and D4
are used to compensate the ORing
LTC4304, continued from page 12
nection between SDAIN and SDAOUT,
and SCLIN and SCLOUT is broken,
isolating the problem device from the
bus. FAULT pulls low indicating a
stuck bus. At this time it is assumed
that the MCU and the device it is
communicating with are out of sync.
The MCU sent out all of the clocks
necessary for the transaction, but
the device is still in the middle of the
transaction. The device is waiting for
more clocks to ﬁnish putting its data
on the bus, and the last bit it put on
the bus happened to be a low, hence
it holds the bus low until it gets more
clocks (bus is stuck). Because the connection is broken, the problem device
is now isolated from the I2C bus, and
the rest of the system is free to resume
normal operation.
After the connection is broken, the
LTC4304 automatically generates
up to 16 clock pulses at 8.5kHz on
SCLOUT, enough clocks to clear the
internal register on the problem device.
The device could be cleared with one
or any number of clocks (up to 16)
depending on how the fault occurred.
At anytime, if SDAOUT and SCLOUT go
high, FAULT is released to go high and
the automatic clocking is stopped, and
a connection is automatically enabled.
18
is open, PGIO is pulled high and the
PGIO input bit in the FAULT register
is set. If F4 is open, FLTIN is pulled
low and the FLTIN bit is set. In the
latter case, if the corresponding bit
in the ALERT register is also set, the
LTC4261 interrupts the host using
the ALERT pin.
diodes. Table 2 shows how the voltages
at ADIN and ADIN2 indicate which fuse
on the RTN side is open.
Using the input voltage as the reference ensures valid detection in the
full operating range.
Fuse monitoring on the –48V side is
more straightforward using the INTVCC
pin along with two logic input pins,
PGIO (when conﬁgured as input) and
FLTIN as shown in Figure 9. Fuse F3
is sensed with R6 and R7 at PGIO,
and fuse F4 is sensed with R8 and
R9 at FLTIN with inverted input. If F3
Conclusion
When the slave that was stuck sees a
START bit after connection, it will abort
the stalled communication and reset.
The fault is cleared independently of
the MCU. If the fault cannot be cleared,
the offending circuit remains isolated
from the system. Figure 2 shows an
example of a stuck bus being resolved
with automatic clocking.
enable all four rise time accelerators.
Finally, in Figure 3c, VCC is greater
than the pull-up voltages of both sides.
ACC is connected to VCC to disable all
four accelerators.
Supply Independence
and Level Translation
The LTC4304 can be the bridge between a backplane operating at one
voltage and a card operating at a different voltage. Figure 3 shows some
typical conﬁgurations. Notice that
VCC, the pull-up voltage on SDAIN and
SCLIN and the pull-up on SDAOUT
and SCLOUT are independent of each
other.
The rise time accelerators must be
disabled when the bus pull-up voltage
is lower than VCC. Figure 3a shows a
situation where the VCC is higher than
the pull-up voltage on SDAIN and
SCLIN. In this case ACC must be ﬂoating, disabling the rise time accelerators
on the inputs only. In Figure 3b, VCC is
equal to the output side pull-up voltage, and less than input side pull-up
voltage. ACC is connected to GND to
The LTC4261 is a full-featured,
intelligent Hot Swap controller that enhances the reliability and durability of
high availability –48V power systems.
The internal 10-bit ADC, I2C/SMBus
and registers make it easy to monitor
faults and real-time power and communicate with the system host. Its
unique inrush and overcurrent control
technique minimizes stresses on the
pass transistor in all operating conditions. L
Conclusion
The LTC4304 is a multifunctional
device with an impressive number
of features designed to increase the
reliability of an I2C bus. The ﬂexible
architecture allows the LTC4304 to
be conﬁgured into almost any system.
The LTC4304 isolates and resolves
stuck buses independently of the
MCU. Capacitance buffering, level
translation, Hot Swap features and
±15kV human body ESD protection
make the LTC4304 an ideal solution
for any I2C application.
The LTC4304 is offered in small
10 pin MSOP and DFN (3mm × 3mm)
packages.
A feature-reduced version of
the LTC4304 is also available. The
LTC4303 provides all of the functionality of the LTC4304 with the exception
of the FAULT output ﬂag and ACC
control pin. The LTC4303 is a drop in
replacement for the LTC4300A-1 and
its rise time accelerators are permanently enabled. L
Linear Technology Magazine • March 2006
DESIGN FEATURES L
High Efﬁciency Nickel Charger
Operating to 34V is Easily Conﬁgured
to Deliver a Safe Fast Charge
by James A. McKenzie
Introduction
Accurate, Rock-Solid
Fast Charge Termination
The LTC4011 implements a complete
fast charge control algorithm, best
suited for charge rates of C/2 to 2C
100
95
EFFICIENCY (%)
SINGLE CELL VOLTAGE (V)
DCIN = 5.5V
90
DCIN = 20V
85
80
75
70
1.65
36
1.60
34
1.55
32
SINGLE CELL
VOLTAGE
1.50
1.45
30
28
BATTERY
TEMPERATURE
1.40
26
1A
1.35
65
BATTERY TEMPERATURE (°C)
The LTC4011 is a complete standalone
nickel chemistry fast charger that operates at high efﬁciency with an input
voltage of up to 34V, even with a battery
voltage that is much less than the DC
input supply. Typical efﬁciency with a
5.5V and 20V input supply is shown
in Figure 1. An undervoltage lockout
of 4.25V ensures stable operation with
an input as low as 5V, assuming a 10%
tolerance. The IC offers a full range of
charge control features that are easy to
program with a minimal number of external components. Its multiple levels
of safety features provide reliable fault
protection that is also simple to conﬁgure. The LTC4011 functions without
the need for any host Microcontroller
Unit (MCU) support and requires no
software of ﬁrmware.
24
CHARGE CURRENT
60
0
2
4
1.30
6 8 10 12 14 16 18 20
BATTERY VOLTAGE (V)
0
20
40
60
22
80
TIME (MINUTES)
Figure 1. The LTC4011 charging
efﬁciency with 2A output current.
Figure 2. A 1C NiCd charge cycle
for NiMH batteries and C/3 to C, or
higher, for NiCd batteries. This means
fully discharged batteries can be recharged to 100% capacity in one hour
or less. Reliable charge termination
at these higher rates is controlled by
well-proven voltage and temperature
detection techniques tailored to the
selected nickel chemistry to ensure
minimum charge time without degradation of recharge cycle life. Various
internal and external ﬁlters, both
analog and digital, eliminate spurious
noise in the voltage and temperature
data channels used to determine both
general battery health and appropriate
charge termination.
Monitoring Battery
Voltage for –ΔV
The primary fast charge termination
technique employed by the LTC4011
involves detection of peak battery
10k
FROM
ADAPTER
4.5V TO 34V
3k
R
6V
3k
INFET
FAULT
CHRG
TOC
READY
R
VCC
TGATE
BGATE
LTC4011
PGND
20k
TO
SYSTEM
20µF LOAD
DCIN
TIMER
49.9k
SENSE
33mΩ
BAT
GND
VCDIV
CHEM
VCELL
VRT
INTVDD VTEMP
0.1µF
10µH
10k
0.033µF
R2
20µF
0.068µF
28k
9.76k
NiMH PACK
WITH 10k NTC
(3Ahr)
Figure 3. A 3A NiMH charger with full PowerPath control
Linear Technology Magazine • March 2006
19
L DESIGN FEATURES
voltage followed by a sufﬁcient drop in
that terminal potential (–ΔV detection).
The typical NiCd charge cycle shown
in Figure 2 is terminated by –ΔV.
To support a wide range of battery
pack conﬁgurations, the IC senses
the average cell voltage of the battery
pack. A simple resistive voltage divider
between the positive battery terminal
and the VCDIV pin, along with some
capacitance to eliminate residual PWM
switching noise, is all that is required
to provide this average cell voltage to
the VCELL input pin. This technique,
combined with the 5V to 34V input operating range, allows charging of from
1 to 16 in-series nickel cells. A negative
delta of only 10mV to 20mV per cell
indicates the battery is fully charged.
The VCELL voltage is also monitored as
a measure of basic battery health and
to detect catastrophic fault conditions,
as described below.
Monitoring Battery
Temperature for ΔT/Δt
The LTC4011 can also process battery temperature using information
provided by a negative temperature
coefficient (NTC) thermistor. The
thermistor should be in good thermal
contact with the cell casings located
most near the center of mass of the
battery pack. This thermistor is then
included in a voltage divider network
between the VRT pin and ground,
as shown in Figure 3, to provide a
linearized input to the VTEMP pin.
This conﬁguration is ﬂexible enough
to support a very wide range of NTC
thermistor types.
An external analog single-pole passive ﬁlter is recommended to eliminate
PWM switching noise. The voltage
on the VTEMP pin is then used by the
LTC4011 to qualify the charge process
according to an acceptable range,
roughly 0°C to 45°C. In addition, the
internal data acquisition subsystem
uses an on-board real-time clock to
monitor the rate of temperature increase of the battery (ΔT/Δt) during
fast charge. Values between 1°C/min
and 2°/min typically indicate a fully
charged nickel battery.
Figure 4 shows a NiMH charge
cycle at a 1C rate with the fast charge
20
portion of the charge cycle terminated
by ΔT/Δt. Temperature processing
is optional on the LTC4011 for all
chemistries. Simply tying VTEMP to VRT
disables all temperature-based charge
qualiﬁcation and termination.
Chemistry-Speciﬁc
Battery Proﬁling
The basic charging algorithm applied
by the LTC4011 is modiﬁed for the
selected battery chemistry. Tying the
CHEM pin to ground selects NiMH
charging parameters, while leaving the
CHEM pin open or tying it to VRT selects NiCd charging parameters. While
similar, these chemistries do require
slightly different fast charge termination to ensure maximum recharge
cycle life. The older NiCd chemistry
beneﬁts from slight overcharge. When
charging NiCd cells, the LTC4011 uses
threshold levels that favor –ΔV termination, resulting in a ﬁnal charge of
slightly more than the rated capacity
(100%) of the pack. In this case, ΔT/Δt
termination, if enabled, serves as a
secondary termination technique for
additional safety. This is shown in the
example of Figure 2.
Newer NiMH batteries are normally
designed to accept higher charge rates
than their older NiCd cousins, but
manufacturers often warn against any
amount of overcharge. So, for NiMH
cells, the LTC4011 selects internal
thresholds that favor ΔT/Δt termination at a point when the pack is charged
to about 95% capacity. In order to avoid
false termination on highly discharged
cells that have been inactive for a long
period of time, the IC can vary the
ΔT/Δt limit as the fast charge cycle
progresses. The –ΔV limit then serves
as secondary termination (safety), and
the IC applies a timed top-off charge
after fast charge termination to achieve
100% capacity, as shown in Figure 4.
Obviously, while optional, use of a
thermistor input for NiMH batteries
is strongly recommended.
In addition to these chemistryspecific measures, the LTC4011
applies some generic charge proﬁle
techniques. Battery open-circuit
voltage is measured at the beginning
of a new charge cycle to determine
the state of charge of the attached
pack. If the pack is initially heavily
discharged, the IC applies a smaller
conditioning current for a ﬁxed period
of time to recover the battery to a point
of suitable fast charge acceptance. If
the pack is initially discharged, the
LTC4011 applies a –ΔV termination
hold-off period to allow the internal
chemistry—and hence terminal potential—to stabilize after applying full
charge current. This avoids premature
termination. However, if the pack is
already moderately charged, the initial
terminal voltage is well-behaved and
–ΔV processing begins immediately to
avoid accidental overcharging of the
battery. If enabled, ΔT/Δt detection is
always active.
Automatic Recharge Keeps
Batteries Ready for Use
Nickel batteries exhibit a high selfdischarge rate of up to 3% per day.
Once a charge cycle has completed,
the LTC4011 continues to monitor the
open-circuit terminal voltage of the
battery for as long as an input power
source is connected. If the battery volt-
Table 1. LTC4011 time limit programming examples
RTIMER (Ω)
Typical Fast
Charge Rate
Precharge
Limit
(minutes)
Fast Charge
Stabilization
(minutes)
Fast Charge
Limit (hours)
Top-Off
Charge
(minutes)
24.9k
2C
3.8
3.8
0.75
15
33.2k
1.5C
5
5
1
20
49.9k
1C
7.5
7.5
1.5
30
66.5k
0.75C
10
10
2
40
100k
0.5C
15
15
3
60
Linear Technology Magazine • March 2006
1.60
42
1.55
40
1.50
38
SINGLE CELL
VOLTAGE
1.45
BATTERY
TEMPERATURE
1.40
1.35
CHARGE
CURRRENT
1.30
1.25
36
0
20
60
40
TIME (MINUTES)
34
2A
32
1A
TOP OFF
30
80
BATTERY TEMPERATURE (°C)
CELL VOLTAGE (V)
DESIGN FEATURES L
28
100
Figure 4. Typical NiMH charge cycle at 1C
age indicates a loss of more than about
15% capacity, a refresh fast charge
cycle is initiated to bring the stored
energy level back to 100%. The duration of the recharge cycle is normally
only a few minutes. This technique
replaces more traditional continuous
trickle charge methods. Trickle charge
operates the battery in a constant state
of overcharge, which can reduce the
cycle life of some NiMH cells, generates
continuous heat, and is somewhat less
efﬁcient that the LTC4011 automatic
recharge approach.
Multiple Safety Features
Many safety features are built into
the LTC4011. It monitors important
voltage and temperature parameters
during all charging phases.
If the VTEMP input has been enabled,
the sensed temperature is required to
lie between 0°C and 45°C, or charging
is suspended. After fast charge begins,
the battery temperature is allowed to
rise to 60°C. If this limit is exceeded,
however, the sensed temperature
must fall below 45°C before charging
can resume. The LTC4011 also tracks
its own die temperature and disables
charging if it rises above an acceptable limit.
Charging is not allowed to begin
until the necessary voltage headroom
to operate the PWM (about 500mV)
has been established between the
VCC and BAT pins. The battery voltage is also continuously monitored for
overvoltage. If the average cell voltage
on VCELL exceeds 1.95V, charging is
disabled and a fault is indicated. The
LTC4011 also proﬁles the battery
voltage during charging to ensure
Linear Technology Magazine • March 2006
proper charge acceptance, checking
open-circuit voltage at the beginning of
precharge and fast charge, and in-circuit voltage after about 20% of the fast
charge cycle has been completed.
Finally, the LTC4011 contains a
safety timer that limits the length of
time any single charge can continue.
This timer is easily programmed with
an external resistor connected between
TIMER and GND according the formula
R TIMER (Ω) = tMAX (hours)/30µs.
Timing Can be Everything
The LTC4011 uses the programming
of the safety timer to a variety of purposes by inferring a relation between
the set time limit, the programmed
charge current and the capacity of the
battery being charged. It assumes the
period of this timer is set to 150% of
the time normally required to deliver
100% charge to a fully discharged
battery at the programmed current
of RSENSE/100mV. The safety checkpoints discussed above, along with
top-off charge duration, are then
determined by intermediate intervals
of the safety timer. Table 1 shows suitable values for R TIMER for a range of
programmed fast charge rates.
A Smaller PWM Solution
The LTC4011 also embodies a
complete PWM controller. Its buck
regulator uses a synchronous pseudoconstant off-time architecture with
high-side PFET power switch. This
choice yields a PWM that is extremely
easy to conﬁgure with a minimum
number of external parts. Simply connect the external PFET power switch,
optional NFET synchronous diode, the
Schottky clamp and choke as shown in
Figure 3. No external loop compensation is required, and the charge current
is set by a single resistor connected
between the SENSE and BAT pins.
This resistor is in series between the
inductor output and the battery with
a value determined by the equation
RSENSE = 100mV/IPROG.
The LTC4011 PWM uses a unique
ﬂoating LV differential architecture to
deliver 5% current accuracy and low
cycle-to-cycle jitter with high inductor ripple current. That in turn allows
Figure 5. NiCD/NiMH charger layout
use of space-efﬁcient magnetics and
a smaller output ﬁlter capacitor. The
pseudo-constant off-time architecture
eliminates the need for cumbersome
slope compensation and allows full
continuous operation over a wide
VIN/VOUT range without generation
of audible noise, even when using
ceramic capacitors. Typical operating
frequency is 550KHz. An example of
the LTC4011 with a 2A PWM implementation is shown in Figure 5.
PowerPath Control
PowerPath™ control is a vital part of
proper termination when charging
nickel batteries. Because the differences being sensed for –ΔV termination
are so small, the series resistance of
the battery can easily cause premature
termination if varying load current
is drawn from the battery during
charging.
The LTC4011 provides integrated
PowerPath support for an input PFET
transistor between the DC input
(DCIN) and the host’s unregulated system supply (VCC). This FET then acts
as an ideal rectiﬁer with a regulated
forward drop as low as 50mV, requiring
less operating head room and capable
of producing less heat than a conventional blocking diode. The LTC4011
can provide up to 6V of gate drive to
this pass device. Select an input FET
with a low enough RDS(ON) at this gate
drive level so that the combination of
full charge current and full application
load current does not cause excessive
power dissipation.
As shown in Figure 4, the PFET
between BAT and VCC then serves to
automatically disconnect the battery
from the system load as long as a DC
input is present. A Schottky diode
continued on page 23
21
L DESIGN FEATURES
Tiny Controller Makes It Easy to
by David Ng
Charge Large Capacitors
Introduction
Emergency warning beacons, inventory control scanners, professional
photoﬂash and many other systems
operate by delivering a pulse of energy
to a transducer. This energy typically
comes from a large capacitor that has
been charged to some predetermined
voltage.
The LT3750 is a current-mode
ﬂyback controller optimized for charging large value capacitors to a user
selected target voltage. This target
voltage is set by the turns ratio of
the flyback transformer and just
two resistors in a simple, low voltage
network, so there is no need to connect components to the high voltage
output. The charging current is set
by an external sense resistor and is
monitored on a cycle-by-cycle basis.
The LT3750 is available in a space
saving MSOP-10 package.
The device is compatible with a
wide range of control circuitry, being equipped with a simple interface
consisting of a CHARGE command
input bit and an open drain DONE
status ﬂag. Both of these signals are
compatible with most digital systems,
yet tolerate voltages as high as 24V.
Simple 300V, 400µF Charger
Figure 1 shows the schematic of a
LT3750 circuit that charges a 400µF
capacitor to a target voltage of 300V.
The 1:10 turns ratio of T1 and the
R1, R2 resistors set the target voltage
to 300V, while the R4 power resistor
sets the peak charging primary current to 7.5A.
Operating from a 12V power source,
this circuit charges the 400µF capacitor to 300V in 1.04 seconds, as shown
in Figure 2.
Design Considerations
The architecture balances a high
degree of integration with ﬂexibility—leaving key parameters deﬁnable
by the user. The important issues to
22
T1
1:10
+
C1
150µF
VCC
12V
C3
10µF
VCC
DONE
VTRANS
RVOUT
DONE
C2 4, 5
22µF
×3
60.4k
D1
VOUT
300V
1
•
•
6, 7
+
CLOAD
400µF
10
40.2k
RDCM
LT3750
OFF ON
CHARGE
GATE
M1
SOURCE
GND
RBG
2.49k
C1: SANYO 35CV150AXA
C2: TDK C4532X7R1E226M (X3)
C4: RUBYCON 330FK400V22X38
C3
47pF
10mΩ
D1: DIODES INC. MURS160
M1: PHILIPS PH20100S
T1: TDK DCT20EFD-UXXS003
Figure 1. Simple circuit charges a 400µF capacitor.
consider in completing a design are
input capacitor sizing, transformer
design and output diode selection.
Power Stage Input Capacitor
Every switching cycle, the LT3750
measures the voltage at its RVOUT pin to
determine the transformer, T1, ﬂyback
voltage. It also measures the signal at
its VTRANS pin, which is the voltage at
the input of the power switching stage.
The difference of these two signals, accounting for the T1 transformer turns
ratio and the D1 rectifying diode, yields
the output voltage. In order to get an
accurate result, it is important that
the signal at the LT3750’s VTRANS input
optimally reﬂects the DC potential of
the power stage input. Consequently,
the capacitance at the input of the
power switching stage must be chosen such that the ripple voltage at
the VTRANS input is not excessive. The
capacitor bank in the circuit represented by Figure 1 is actually made of
ﬁve capacitors. C1 is a single 150µF
electrolytic capacitor to provide bulk
energy, C2 is three low ESR 22µF
ceramic capacitors to accommodate
the high switching currents, and C3
is low ESR 10µF ceramic capacitor
that provides local decoupling to the
LT3750. For best results, place C1 and
C2 as close as possible to T1, and C3
VOUT
50V/DIV
VOUT
50V/DIV
IIN
1A/DIV
IIN
1A/DIV
200ms/DIV
Figure 2. Output voltage and input current
waveforms of LT3750 capacitive charging
circuit
200ms/DIV
Figure 3. A transformer with a 51µH primary
inductance has a longer charge time and larger
input current ripple than a transformer with a
10µH primary inductance.
Linear Technology Magazine • March 2006
DESIGN FEATURES L
as close as possible to the VTRANS pin
on the LT3750.
Transformer
Other than the turns ratio, there are
two issues to remember when selecting a transformer. The ﬁrst is that
the transformer secondary must be
constructed to withstand potentials of
both the positive and negative voltages
associated with charging the capacitor.
This withstand voltage is not the same
as the isolation voltage rating. In the
case of the circuit shown in Figure 1,
there is no isolation voltage requirement, as the primary and secondary of
T1 are tied to the same ground reference. The secondary winding, however,
is subjected to the output potential,
or 300V, and care must be taken in
selecting for parameters relevant to
such high voltages, such as pin spacing and wire insulation.
The other transformer parameter
to keep in mind is the primary inductance. The primary inductance
determines the operating frequency
range, input current ripple and core
loss, all of which contribute to the
capacitor charge time and efﬁciency.
The charging proﬁle shown in Figure 2
is for a circuit using a transformer
with a primary inductance of 10µH.
Figure 3 shows the charging proﬁle
for the same circuit, but the primary
inductance is much larger, 51µH.
Note that the 51µH transformer has
a longer charge time than the 10µH
transformer.
LTC4011, continued from page 21
can be used in place of this MOSFET,
if the additional voltage drop can be
tolerated when running the application
from the battery.
Micropower Features Support
Extended Battery Use
The LTC4011 has a typical shutdown
supply current of 3µA and normally
draws much less than 1µA from
the SENSE/BAT pin combination
when the DC input supply has been
removed. In addition, the VCDIV pin
offers a means of disconnecting the
Linear Technology Magazine • March 2006
Table 1. Summary of input charging current and charge times for
LT3750 circuits for transformers with different primary inductances
Transformer
Primary
Inductance
Input Charging
Current
Input Charging
Current Ripple
Charge
Time
TDK
DCT20EFD-UXXS003
10µH
2.2A
0.5A
1040ms
Coiltronics
CTX02-17314
15µH
2.2A
0.4A
1000ms
Coiltronics
CTX02-17144
51µH
2A
1.4A
1120ms
Table 1 gives a summary of the input
charging current and charge times for
LT3750 circuits for three different T1
primary inductances, with the 15µH
device giving the best result.
Output Diode
Finally, it is important to consider the
high AC voltages when selecting the
output rectifying diode. The circuit in
Figure 1 has a 300V output, but the
output rectifying diode must withstand
the sum of the output voltage and the
voltage across the transformer secondary when the MOSFET Q1 is on.
In this case, that is about 500V. This
is a high voltage, but there are many
manufacturers that produce switching
diodes suitable for this application.
While it is important to minimize
board space, the designer must choose
a device that does not cause a violation
of the spacing requirements for both
safety and producibility. According to
VCELL resistor divider in the shutdown
state, eliminating the current drawn by
that circuit when charging is not possible. These features greatly minimize
the load applied to the battery by the
charger when disconnected from a DC
power source, increasing the useable
run time of the battery in portable
applications.
Conclusion
The LTC4011 is a nickel chemistry
charger that integrates a complete
high voltage PWM controller, allow-
table 6-1, “Electrical Conductor Spacing,” of IPC-2221, Generic Standard on
Printed Circuit Board Design (February
1998 release), the minimum spacing
between conductors that have a potential up to 500V must be no less than
2.5mm on an uncoated printed circuit
board operated below an altitude of
3050m. The output diode must be
chosen to ensure that the minimum
spacing between the diode pads is at
least 2.5mm.
The circuit shown in Figure 1
uses a MURS160, which is offered
by a number of manufacturers such
as Diodes Inc and Vishay. It is an
ultrafast recovery rectiﬁer and has a
peak repetitive reverse voltage rating
of 600V. The diode comes in an SMB
package, which allows the edge-toedge separation between the pads to
be as much as 3mm. L
Authors can be contacted
at (408) 432-1900
ing it to efﬁciently charge batteries
from a 34V input without the need
for additional current source control
ICs. True standalone operation and
ﬂexible control greatly simplify charger
design. The PWM operates at a high
frequency, enabling the use of surface
mount components to save space.
Reliable, robust charge termination
algorithms backed by solid safety features make the LTC4011 an excellent
choice for a wide range of fast charge
implementations, providing long life for
rechargeable nickel batteries. L
23
L DESIGN FEATURES
MOSFETs Make Sense for Tracking
and Sequencing Power Supplies
by Thomas DiGiacomo
Introduction:
Charge MOSFETs with the
Task of Supply Control
In electronic systems with multiple
supplies, the need for tracking and/or
sequencing is well established. On the
one hand, core and I/O power might
be required to ramp up and down together with less than a diode’s voltage
drop between them to avoid potentially destructive latch-up. Coincident
tracking, as shown in Figure 1a, solves
this problem. On the other hand, in a
distributed supply chain, some supplies might need to be fully operational
before others. Supply sequencing,
as shown in Figure 1d, solves that
problem. Other systems may require
simultaneous completion of supply
ramps (Figure 1b), voltage offsets or
time delays (Figure 1c), or combinations of such proﬁles.
Linear’s line of no-MOSFET tracking
and sequencing control products, the
LTC2923, LTC2925, and LTC2927,
work outstandingly well with DC/DC
converters and other supply generators that allow access to the feedback
nodes that set their output voltage. In
many applications, however, MOSFET
control of power supply tracking and
sequencing is necessary. Supply modules provide no access to their feedback
node, and some linear regulators also
resist the current-injection control
method employed by the LTC2923
family.
MOSFET-controlled tracking and
sequencing can improve power system
segmenting and allow reuse, which
reduces parts count and board area.
A single-output supply generator can
power different rails of the same voltage (e.g., analog power, digital power,
and housekeeping power) because
each rail’s tracking proﬁle can be set
independently. Multiple-output modules can replace several single-input
modules without the need for complex
ON/OFF pin signaling to implement
24
a. Coincident tracking
b. Ratiometric tracking
c. Offset tracking
d. Supply sequencing
Figure 1. Power supply voltage tracking proﬁles
sequencing or tracking. Furthermore,
a series MOSFET can be shut off,
which guarantees that the load is
disconnected when so desired.
The LTC2926 MOSFET-controlled
power supply tracker provides exceptionally ﬂexible control of supply
tracking and sequencing that can
realize all of the proﬁles in Figure 1,
and combinations of them. Each of
two “slave” supplies can be conﬁgured
independently to track a “master”
ramp signal using just an N-channel
MOSFET and a few resistors per supply. A single capacitor sets the slope of
a voltage ramp that may be employed
Linear Technology Magazine • March 2006
DESIGN FEATURES L
1.8V MODULE
as the master ramp signal (Figure 2),
or may be used to ramp a third supply
using an external MOSFET (Figure 3).
The LTC2926 is interoperable with
Linear’s no-MOSFET tracking and
sequencing products, and even offers
no-MOSFET control itself in some
applications (Figure 4); see “Direct
Supply Generator Control: ¡No Más
FETs, Mi Amigo!” in this article.
The LTC2926 also features automatic remote sense switching that
compensates for voltage drops across
the controlling MOSFETs, and two
I/O signals that transmit tracking
status and receive control input from
upstream and downstream devices.
The LTC2926 is available in 20-lead
DFN (4mm × 5mm) and 20-lead narrow SSOP packages.
Q1
IN OUT
VIN
RX1
SENSE
10Ω
2.5V MODULE
Q2
IN OUT
VIN
NC
SENSE
10Ω
RSGATE MGATE RAMP SGATE1 SGATE2
D1
D2
VIN
0.1µF
VCC
S1
RAMPBUF
S2
RFB1
RTB1
TRACK1
FB1
LTC2926
RTA1
RTB2
RFA1
RFB2
TRACK2
FB2
VIN
RTA2
VIN
10k
FAULT
FAULT
ON/OFF
Linear Technology Magazine • March 2006
2.5V
SLAVE2
CMGATE
RX2
How It Works:
Injection Controls Your Ramp-age
and Keeps You on Track
The LTC2926 achieves supply tracking and sequencing by inﬂuencing
the feedback node that sets a supply
voltage, as do the LTC2923, LTC2925,
and LTC2927. In all four products, a
tracking cell converts the master ramp
voltage into a ramping current that is
injected into the aforementioned feedback node. Whereas the latter products
control supply generators themselves
(those with accessible feedback nodes,
like DC/DC converters), the LTC2926
controls rudimentary voltage regulators whose inputs are the supply
voltages and whose outputs are the
tracked and sequenced supply rails.
In Figure 5, the integrated gate
controller cell, the external N-channel
power MOSFET (QEXT), and a resistive
voltage divider (RFA and RFB) form the
basic voltage regulator. In regulation,
the slave supply voltage equals the
reference voltage times (1 + RFB/RFA).
In drop out mode, the MOSFET becomes a closed switch, and the slave
supply voltage equals the input supply voltage.
The injection of current at the
feedback node of the gate controller regulator reduces the effective
value of its reference voltage. As the
master ramp rises, the ﬁxed ratio of
1.8V
SLAVE1
RFA2
10k
ON
PGTMR
GND
STATUS/PGI
STATUS
CPGTMR
Figure 2. Typical 2-supply tracking application. The master ramp signal is
created by connecting a capacitor from the MGATE and RAMP pins to ground.
3.3V MODULE
Q0
IN OUT
VIN
RX0
SENSE
Q3
10Ω
1.8V MODULE
VIN
MASTER
Q1
IN OUT
1.8V
SLAVE1
RX1
SENSE
10Ω
2.5V MODULE
Q2
IN OUT
VIN
2.5V
SLAVE2
CMGATE
RX2
SENSE
10Ω
RSGATE
MGATE RAMP SGATE1 SGATE2
D1
D2
VIN
0.1µF
VCC
S1
RAMPBUF
S2
RFB1
RTB1
TRACK1
RTB2
FB1
LTC2926
RTA1
RFA1
RFB2
TRACK2
VIN
FB2
RTA2
VIN
10k
FAULT
FAULT
ON/OFF
ON
RFA2
10k
GND
PGTMR
STATUS/PGI
STATUS
CPGTMR
Figure 3. Typical 3-supply tracking application. MOSFET Q0 creates
a ramping master supply that doubles as the master ramp signal.
25
L DESIGN FEATURES
SUPPLY MODULE
VIN
Q1
IN OUT
SLAVE1
RX1
SENSE
10Ω
SUPPLY MODULE
VIN
MASTER
IN OUT
RX0
SENSE
VIN
10Ω
CMGATE
0.1µF
VCC
MGATE
S2
RAMP SGATE1
ON
D1
VCC
0.1µF
RAMP
S1
IN
RAMPBUF
RFB1
RTB1
TRACK1
FB1
LTC2926
RTA1
RTB2
VIN
LTC2927
D2
VIN
SDO
RAMPBUF
FB
RTB3
OUT
FB
SLAVE3
TRACK
RFA1
GND
RTA3
TRACK2
DC/DC
RFA3
RFB3
FB2
RTA2
VIN
ON/OFF
ON
GND
IN
PGTMR
DC/DC
CPGTMR
OUT
FB
RFA2
SLAVE2
RFB2
Figure 4. LTC2926 and LTC2927 4-rail application. The second slave channel of the LTC2926 requires no MOSFET in this example.
the feedback resistors multiplies the
increasing reference voltage to create
a rising slave supply voltage that is
limited by the input supply voltage at
the drain of the MOSFET. With proper
selection of the feedback resistor
ratio, the gate controller cell drives
the SGATE pin to VCC + 5V when the
slave supply reaches it maximum. The
logic-level MOSFET becomes a simple
closed switch, able to pass input supply voltages of from 0V to VCC.
The relationship between the
master ramp and the slave voltage is
called the tracking proﬁle, and it is a
function of the input supply voltage,
the master ramp voltage, the track
resistors (R TA, R TB), and the feedback
resistors (RFA, RFB). All of the proﬁles
in Figure 1 can be realized by properly
selecting the track and feedback resisQEXT
INPUT SUPPLY
TRACKING CELL
LTC2926
GATE CONTROLLER CELL
VCC
+
RTB
RTA
LOAD
VCC + 5V
0.8V
–
MASTER
RAMP
0.8V
+
–
10µA
SGATE
10µA
TRACK
RFB
FB
ITRACK
SLAVE SUPPLY
IFB
RFA
Figure 5. Simpliﬁed tracking cell and gate controller cell combination
26
Linear Technology Magazine • March 2006
DESIGN FEATURES L
tors. Combinations are also possible
because each channel’s proﬁle is set
independently.
MOSFETs Make Remote Sense,
Too: Whip a Problem with a Switch
Even with the selection of a low RDS(ON)
MOSFET as the tracking control device, the load current causes a voltage
difference between the supply generator and the load. Worst yet, dynamic
load current produces a dynamic
voltage error. Without modiﬁcation,
the standard solution, to let the supply generator remotely sense the load
voltage and compensate for the drop,
does not work. During tracking up or
down, the load voltage is deliberately
SUPPLY
MODULE
+ VDS –
Q0
OUT
RX
SENSE
LOAD
MGATE OR SGATE
Q3
RSGATE
Figure 6. Functional schematic
for remote sensing the load
Tracking and Sequencing Supply Rails in Three Easy Steps
Any of the proﬁles shown in Figure 1 can be achieved
by using the following simple design procedure. Figure 3
shows a basic 3-supply application circuit.
1. Set the ramp rate of the master signal.
Solve for the value of CMGATE based on the desired
ramp rate (volts per second) of the master ramp
signal, SM, and the MGATE pull-up current.
CMGATE =
IMGATE
SM
(1)
where IMGATE ≅ 10µA
If the gate capacitance of the MOSFET is comparable to CMGATE, reduce the value of CMGATE to
account for it. If the master ramp signal is not a
master supply, tie the RAMP pin to the MGATE pin
2. Choose the feedback resistors based on the slave
supply voltage and slave load.
It is important that the feedback resistors are signiﬁcantly larger than the load resistance. Determine
the effective slave load resistance, RL (not shown), to
satisfy the following equation:
RFB ≥ 100 • RL (recommended),
RFB ≥ 23 • RL (required)
(2)
The LTC2926 must be able to fully enhance the
slave control MOSFET at the end of ramping. Select
RFA based on the resistor tolerance, TOLR, and the
absolute maximum slave supply voltage, VSLAVE(max):
 1− TOL R 
RFA < RFB • 

 1+ TOL R 
V
(max) 
 SLAVE
− 1
 VFB(REF ) (min) 
(3)
where VFB(REF)(min) = 0.784V
Note: Design with a value of VSLAVE(max) that covers the maximum possible slave supply voltage by
a good margin. If the slave generator exceeds that
voltage during operation, an overvoltage shutdown
can occur. The gate controller cell will turn off the
MOSFET in an attempt to reduce the over-range
supply voltage, which activates the STATUS/PGI
pull-down, and thus a fault can occur if the power
good timeout period has passed.
Linear Technology Magazine • March 2006
If no-MOSFET operation is desired and conditions for it are met, let the generator’s design set RFA
and RFB, substitute the generator’s reference voltage
for VFB(REF) in step 3.
3. Solve for the tracking resistors that set the desired ramp rate and voltage offset or time delay
of the slave supply.
Choose a ramp rate for the slave supply, SS. If the
slave supply tracks the master coincidently or with
only a ﬁxed offset or delay, then the slave ramp rate
equals the master ramp rate. Calculate the upper
track resistor, R TB, from:
S 
R TB = RFB •  M 
 SS 
(4)
Choose a voltage difference based on the type of
proﬁle to be implemented:
∆V = a voltage difference (offset tracking),
or
∆V = SM • tDLY (supply sequencing),
where tDLY is a delay time,
or
∆V = 0V (coincident or ratiometric tracking)
(5a)
(5b)
(5c)
Be sure that the slave ramp rate and its offset
or delay allow the slave voltage to ﬁnish ramping
before the master ramp reaches its ﬁnal value; otherwise, the slave supply voltage will be held below
its intended level.
Finally, determine the lower track resistor, R TA:
R TA =
VFB(REF )
RFB
VTRACK
VFB(REF ) VTRACK ∆V
+
−
+
RFA
R TB
R TB
where VTRACK = VFB(REF) = 0.8V
(6)
Note that large ratios of slave ramp rate to master
ramp rate, SS/SM, may result in negative values
for R TA. In such cases the offset or delay must be
increased, or the slave ramp rate must be reduced.
27
L DESIGN FEATURES
OUT
MASTER
SUPPLY
MODULE
LOAD
CGATE
OUT
SUPPLY
MODULE
SLAVE
RX1
LOAD
SENSE
MGATE
VCC
RAMP
CHARGE
PUMP
10µA
REMOTE
SENSE
SWITCH
10µA
D1
RAMPBUF
S1
1x
CHARGE
PUMP
10µA
RSGATE
+
VCC + 4.9V
–
1.23V
–
ON
ON|OFF
STATUS/PGI
+
MGATE
+
RAMP + 4.9V
–
RAMP
+
VCC
–
SGATE1
+
VCC + 4.9V
–
SGATE2
+
VCC + 4.9V
–
CHARGE
PUMP
10µA
RSGATE
10µA
CHARGE
PUMP
VCC
0.8V
10µA
+
SGATE1
–
RTB1
0.8V
TRACK1
RTA1
+
RFB1
10µA
–
FB1
GND
RFA1
Figure 7. Simpliﬁed functional block diagram for the LTC2926
28
Linear Technology Magazine • March 2006
DESIGN FEATURES L
not equal to the generator voltage, and
the feedback would send the generator
voltage higher and higher attempting
to equalize them.
The LTC2926 solves the voltage
drop problem with automatic remote
sense switching. In Figure 6, one of
the two integrated N-channel MOSFET
remote sense switches connects the
load to the supply generator’s sense
input. During ramp up and ramp
down, the switch is open, and resistor
RX provides local feedback to the sense
input. After tracking has completed,
the RSGATE signal closes the remote
sense switch, and the supply generator dynamically compensate out the
power MOSFET’s voltage drop. The
RSGATE signal is available on a pin
so that additional external switches
may be controlled if necessary.
Tracking Typical Behavior:
Supplies Inclined to Marry Loads;
Separation on the Decline
The operation of the LTC2926 in an
application can be understood by considering the simpliﬁed block diagram
with external components in Figure 7.
Assume that the supply generators’
outputs and the VCC supply have
reached their nominal values, and that
the ON input is low. In that case, the
STATUS/PGI pin is pulled-down, the
remote sense switch is open, and the
MGATE pin is pulled to ground, which
means the master load is disconnected
from the master supply. Track resistor
R TB1 is grounded by the ramp buffer
Q1
1.8V
SOURCE
10Ω
2.5V
SOURCE
IN
OUT
V2
V1
RST
S2
RST
S1
GND
TOL
10Ω
SGATE1 SGATE2
ON/OFF
output, so the injected feedback current (a duplicate of the track current)
is at its maximum, which forces the
FB1 pin voltage above 0.8V. Thus the
SGATE1 pin is pulled low, so the slave
supply is also disconnected.
When the ON pin voltage is brought
high, the MGATE pin sources current
into an external capacitor that sets
the incline rate of the master ramp
signal (see Figure 2). The master ramp
may be used to create a master supply with the addition of an N-channel
MOSFET (see Figure 3). The buffered
ramp output (RAMPBUF pin) allows
tracking resistors to be driven without
loading the MGATE pin current, and
keeps track currents from back feeding
the master load. As the master ramp
rises, the track current decreases,
and the gate controller brings up the
VIN
IN
OUT
RFB2
SLAVE
I/O an Explanation: It’s My Fault
That You’ve Separated …
The LTC2926 communicates with
other devices in the system via the ON
6
+
RAMPBUF SGATE
TRACK
NC
FB
GND
RFAB
RFAA
4
VSLAVE (V)
FB
′
RTB
CONTROL VIA
FB PIN AND
SPLIT RFA
RESISTOR
–
GND
′
RTA
CONTROL
VIA FB PIN
3
2
MOSFET
CONTROL ONLY
1
0
b.
Figure 9. Slave supply control without a MOSFET (a) generator reference
VFB(GEN) ≤ 0.75V, and (b) generator reference VFB(GEN) > 0.75V
Linear Technology Magazine • March 2006
LOAD VOLTAGE
MONITOR
(10% TOLERANCE)
5
LTC2926
a.
TOL
slave supply voltage until it reaches
the slave generator voltage, after which
point the MOSFET is fully enhanced.
As tracking has completed, the remote
sense switch then closes, and ﬁnally
the STATUS/PGI pin is asserted.
When ON is brought low, the
tracking proﬁle runs in reverse. The
STATUS/PGI pull-down activates, and
the RSGATE pin pulls down, which
opens the remote sense switches. Next,
the MGATE pin sinks current, which
reduces the master (supply) ramp
and slave supply voltages in reverse
order. As the master and slave supplies near ground, the slave supplies
(and master supply if implemented)
are disconnected, which completes the
ramp-down process.
RFB
NC
GND
S1
GND
Figure 8. External monitors control the LTC2926 via I/O pins
–
+
RTA
STATUS/PGI
RST
RFA2
RFA
FB
RFA1
V1
S2
CPGTMR
LTC2926
RAMPBUF SGATE
TRACK
FAULT
VFB(GEN)
FB
RFB1
FB1
V2
RST
GND PGTMR FB2
VFB(GEN)
RTB
ON
LTC2926
SUPPLY VOLTAGE
MONITOR
(10% TOLERANCE)
RFB
GND
2.5V
SLAVE2
LTC2904
SUPPLY GENERATOR
SLAVE
Q2
LTC2904
SUPPLY GENERATOR
VIN
1.8V
SLAVE1
0
0.25
0.50 0.75 1.00
VFB(GEN) (V)
1.25
1.50
Figure 10. Regions of possible
slave control without a MOSFET
29
L DESIGN FEATURES
input signal that initiates ramp up and
ramp down, and two input/output signals, FAULT and STATUS/PGI. Each of
the two I/O signals reports an aspect
of tracking status as its output, and
each accepts a shut-down command
as its input. Both the FAULT and
the STATUS/PGI pins include strong
N-channel MOSFET pull-down transistors, and weak pull-up currents,
which facilitates wired-OR signaling.
A high output at the STATUS/PGI
pin indicates that tracking/sequencing and automatic remote sense
switching have completed. It is typically connected to the RST inputs of
downstream devices such as an FPGA,
a micro-controller, or a load voltage
monitor (Figure 9). The weak pull-up
hangs from a charge-pumped rail,
which allows the STATUS/PGI output
to control external MOSFET switches,
as well as become a logic signal with
the addition of a pull-up resistor.
The input function of the STATUS/
PGI pin allows downstream devices
and the LTC2926 itself to force open
the remote sense switches and bring
about supply disconnect if the pin
voltage is low and the power good timeout period has expired. The MGATE,
SGATE1, SGATE2, and RSGATE pins
that control MOSFET gates are all
pulled low to effect immediate supply
disconnect and open the remote sense
switches. In addition, an internal fault
latch is set, which keeps the loads cut
off until it is reset and re-armed via
the ON pin. When connected as in
Figure 8, the LTC2904 supply monitor
forces supply disconnect if the programmed 10% load voltage tolerance
is exceeded after the timeout period
(set by CTIMER) expires.
The FAULT pin’s input aspect
allows upstream devices to set the
fault latch, open the remote sense
switches, and cause supply disconnect without a timeout period when
the pin is pulled low. In addition, the
STATUS/PGI pull-down is activated,
which informs downstream devices of
the fault. Under normal conditions,
a weak pull-up keeps the FAULT pin
voltage within a diode drop of VCC—the
internal Schottky diode allows the pin
to be pulled above VCC safely. Again,
30
the loads remain cut off until the fault
latch is reset and re-armed by toggling
the ON pin. The FAULT pin might typically be connected to the RST output
of upstream supply devices such as
voltage, current, or temperature monitors (Figure 8). Automatic fault retry is
possible by tying the ON and FAULT
pins together.
MOSFET-controlled tracking
and sequencing can improve
power system segmenting
and allow reuse, which
reduces parts count and
board area. A singleoutput supply generator
can power different rails
of the same voltage (e.g.,
analog power, digital
power, and housekeeping
power) because each rail’s
tracking proﬁle can be set
independently.
Direct Supply Generator Control:
¡No Más FETs, Mi Amigo!
The LTC2926 can even set a tracking
proﬁle without MOSFETs just like the
LTC2923, under certain conditions. As
is the case for no-MOSFET tracking
with the LTC2923 family, the supply
generator must allow access to the
feedback node that sets its output
voltage, and its reference voltage must
be ground-based. (MOSFET control
is required for many three-terminal
regulators, for example, because their
references are relative to their output
node.)
For tracking control when the
slave generator’s reference voltage is
low enough, VFB(GEN) ≤ 0.75, simply
connect the LTC2926’s FB pin to the
supply generator’s FB pin (Figure 9a).
Choose the track resistors based on
the tracking proﬁle and the generator’s
feedback resistors. When the master
ramp signal is low, the tracking current is high, and it keeps the slave
generator’s output low. When the
master ramp signal reaches its maximum, the LTC2926’s FB pin current is
zero, and it has no effect on the output
voltage accuracy, transient response,
or stability of the generator.
A generator with VFB(GEN) > 0.75V
may be controlled without a MOSFET
if the slave voltage is large enough; see
Figure 10. The R TA resistor must be
split to create a new injection point
for FB pin current, and the track resistor values must be scaled, as well
(Figure 9b); consult the LTC2926 Data
Sheet for details.
Conclusion: No Joke,
It’s a Great Product
The LTC2926 solves a host of tracking
and sequencing headaches and can
simplify design by means of MOSFET
control. MOSFET control separates
supply generator start-up and shutdown details from speciﬁc tracking
proﬁle requirements, which allows
for supply segmenting and generator
consolidation. Because the LTC2926
creates its own regulator to ramp the
rails, a multitude of supply generators
can now be tracked and sequenced,
including modules and 3-terminal
linear regulators.
The LTC2926 is interoperable
with Linear’s no-MOSFET tracker/
sequencers, and even provides that
functionality itself, which can keep
device count down and reduce parts
assortment. Its integrated automatic
remote sense switching eliminates
a problem associated with series
MOSFET control, and intelligent I/O
lets this device broadcast status as
well take shut-down commands from
upstream and downstream devices.
All of these features and ﬁne control
of start-up and shut-down of power
supply rails in a single package make
the LTC2926 powerful solution for
tracking and sequencing. L
For further information on any
of the devices mentioned in this
issue of Linear Technology, use
the reader service card or call the
LTC literature service number:
1-800-4-LINEAR
Ask for the pertinent data sheets
and Application Notes.
Linear Technology Magazine • March 2006
DESIGN FEATURES L
High Voltage Boost/LED Controller
Provides 3000:1 PWM Dimming Ratio
by Eugene Cheung
Performance, Accuracy,
Versatility: LEDs and Beyond
The LTC3783 is a current-mode boost
controller optimized for constantcurrent True Color PWM™ dimming
of high-powered LEDs. Proprietary
techniques provide extremely fast,
true PWM load switching with no
transient undervoltage or overvoltage
issues. High dimming ratios of 3000:1
(at 100Hz), important for such applications as video projectors and LCD
backlights, can be achieved digitally,
maintaining the color integrity of
white and RGB LEDs. The LTC3783
also provides an analog input for an
additional 100:1 dimming (300,000:1
total).
This versatile part can also be used
in a boost, buck, buck-boost, SEPIC, or
ﬂyback converter, and as a constantcurrent, constant-voltage regulator. No
RSENSE™ operation uses a MOSFET’s
on-resistance to eliminate the currentsense resistor, increasing efﬁciency.
Applications for the LTC3783 include
high voltage LED arrays and LED backlighting, as well as voltage regulators
in telecom, automotive, and industrial
control systems.
VIN
OSC
VREF
+
VITH
–
CITH
+
VOUT
VSW
S
–
LATCH
COMP
SW1
COUT
R
LOAD
RSENSE
VSENSE
PWMOUT
PWMIN
SW2
VS
IOUT
RSENSE
Figure 1. Simpliﬁed conventional boost converter with PWM dimming
The LTC3783 operates from input
supplies ranging from 3V to 36V, and
provides output overvoltage protection while regulating output current.
When a sense resistor is used, the
maximum output voltage is limited
only by external components. The
controller includes integrated drivers
for power and PWM MOSFET switches,
and a variable feedback voltage (0V to
1.23V) allows the designer full control
over load current accuracy vs efﬁciency. These features make the part
especially attractive for higher-power
LED lighting applications. One resistor
sets operating frequency from 20kHz
to 1MHz, and, to reduce switching
noise interference, the LTC3783 is
synchronizable to an external clock.
Programmable soft start limits inrush
current during startup, preventing input current spikes. In addition to boost
operation (VOUT > VIN), the controller
offers an alternate constant-current,
constant-voltage operating mode for
buck-boost or buck applications. In
these cases, the achievable PWM dimming ratios are generally lower.
VIN
OSC
VREF
+
SW3
–
VITH
S
–
CITH
+
LATCH
COMP
R
VOUT
VSW
GATE
SW1
COUT
LOAD
VSENSE
RSENSE
PWMOUT
PWMIN
SW2
VS
IOUT
RSENSE
Figure 2. Simpliﬁed boost converter with True Color PWM dimming
Linear Technology Magazine • March 2006
31
L DESIGN FEATURES
A Novel, Simple,
yet Highly Effective
PWM Dimming Scheme
VIN
6V TO 16V
(< TOTAL VF OF LEDs)
10µF
×2
1M
2.2µH
ZETEX ZLL51000
LTC3783
Why PWM, Anyway?
The brightness of an LED is a function of the current through it. Analog
dimming simply reduces the DC current ﬂowing through the LED, while
digital, or PWM, dimming alters the
duty cycle of an otherwise-constant
LED current, thus varying the effective average current. The problem with
analog dimming is that the chromacity
of the LED also changes with current.
PWM dimming avoids this problem
because the on-current is constant,
allowing the light intensity, i.e. average current, to be varied without a
color shift.
Enter True Color PWM
A simpliﬁed conventional currentsource boost controller is shown in
Figure 1, where IOUT is the regulated
current source. When the output load
is abruptly disconnected by PWMIN via
SW2, the feedback loop cannot adjust
the inductor current IL, controlled by
ITH (cycle-to-cycle current threshold),
instantaneously. Consequently, VOUT
rises due to excess current being
fed into COUT, causing an output
overvoltage condition while the error
amp slews its ITH compensation capacitor CITH down to the appropriate
zero-current level. When the load is
reconnected, VOUT is pulled lower by
the load current as the compensation capacitor is slewed up to match
output current demand. Depending
on the particulars of the application
105k
0.1µF
10µF
6.04k
10k
1µF
4.7µF
20k
M1
M2
12.4k
0.3Ω
COUT
10µF
GND
*LUMILEDS LXHL-BW02
Figure 3. PWM-dimmed boost LED application
(compensation, load parameters, and
component values) with respect to
PWMIN on-time, the load current will
generally overshoot or undershoot,
causing a color shift with varying light
intensity.
True Color PWM dimming, as
implemented in the LTC3783, is depicted in simpliﬁed form in Figure 2.
When PWMIN goes low, the output
load is disconnected (SW2), switching is simultaneously disabled (SW1),
and compensation capacitor CITH is
disconnected (SW3). Disabling SW1
switching with PWMIN low prevents
the VOUT overvoltage condition from
occurring, and disconnecting CITH preserves the appropriate steady-state ITH
value. When PWMIN goes high again
and the load is reconnected, VOUT and
VITH are already at their respective
full-load values, and load current is
restored virtually instantaneously.
This new technique allows the
load to be quickly connected and
disconnected. This results in a higher
10µF, 50V
×2
UMK432C106MM
RUN
VIN
PWMIN OV/FB
ITH PWMOUT
SS
ILIM
VREF
GATE
FBP
SENSE
FBN
INTVCC
FREQ
GND
SYNC
10µH
SUMIDA
CDRH8D28-100
PMEG6010
LTC3783
100k
LED*
STRING
4.7µF
0.05Ω
M1, M2: SILICONIX Si4470EY
1M
PWM
5V AT 0Hz TO 10Hz
237k
RUN
VIN
PWMIN OV/FB
ITH PWMOUT
SS
ILIM
VREF
GATE
FBP
SENSE
FBN
INTVCC
FREQ
GND
SYNC
VOUT
<25V
effective PWM dimming ratio, since, for
a given PWM frequency, the dimming
ratio is constrained by the shortest
pulse duration (hence, lowest duty
cycle) that can be delivered.
Applications
Boost PWM LED Driver
Multi-LED systems usually connect
the LEDs in series to ensure that the
current through each LED is the same,
regardless of the varying I-V characteristics of each LED. In such systems,
the cumulative LED string voltage is
often higher than the system supply,
thus calling for a boost converter (VOUT
> VIN). Figure 3 shows such a solution
with PWM dimming.
VFBP across RL sets the LED load
current level. VFBP is set (via R1 and
R2) to 0.1V in the interests of higher
efﬁciency in light of load current accuracy. Setting the load current sense
resistor voltage to 0.1V allows for
only 35mW power dissipation in the
VIN
9V TO 26V
RL
0.28Ω
LED STRING 1-4 EA
LUMILEDS LXHL-BW02
EACH LED IS 3V TO 4.2V
AT 350mA
VOUT
40.2k
0V TO
1.23V
FAIRCHILD
FDN5630
10µF, 50V
C5750X7R1H106M
CERAMIC
4.7µF
0.05Ω
1k
GND
Figure 4. Buck-boost LED application
32
Linear Technology Magazine • March 2006
DESIGN FEATURES L
CIN
10µF, 25V
×2
1M
•
• • •
PWM
169k
1%
1k
0.01µF
10k
1%
30.1k
1%
RUN
VIN
PWMIN OV/FB
ITH PWMOUT
SS
ILIM
VREF
GATE
FBP
SENSE
FBN
INTVCC
FREQ
GND
SYNC
0.22µF
250V
×2
•
LTC3783
100pF
D1
T1
VIN
8V TO 16V
1.21M
1%
LED+
VOUT
130V
150mA
•
100pF
200V
NPO
1206
20Ω
Q1
4.7µF
10V
12.4k
1%
0.05Ω
LED–
Q2
0.47Ω
1%
CIN: TDK C3225X7R1E106K
COUT: TDK C3225X7R2E224K
D1: PMEG6010
Q1: Si4486EY
Q2: FAIRCHILD FDC2512 (TSOP6)
T1: COILTRONICS VP3-0055
Figure 5. PWM-dimmed ﬂyback LED application
resistor, as compared to 430mW for a
1.23V sense voltage. A worst-case VFB
offset of <3mV ensures better than
3% load current accuracy as well.
Additional analog dimming could be
accomplished by replacing R1 and R2
with a potentiometer or other variable
voltage source.
Resistor R T on the FREQ pin determines GATE switching frequency.
The 6.04kΩ value chosen sets the
system up for 1MHz switching, which
permits a higher PWM dimming ratio
than the standard 300kHz switching
frequency allows. In case the LEDs
are disconnected while the supply is
running, resistors R3 and R4 set the
maximum output overvoltage shutdown threshold, nominally at VOV/FB
= 1.32V. Overvoltage protection is
essential in current-source boost
applications because with an openload fault, capacitor and FET drain
voltages can easily exceed maximum
device ratings.
Because of the True Color PWM
topology, and the 1MHz clock rate, this
boost application circuit can achieve
a PWM dimming ratio in excess of
3000:1.
Authors can be contacted
at (408) 432-1900
Linear Technology Magazine • March 2006
Buck-Boost PWM LED Driver
In some LED applications, the desired
VIN and VOUT overlap, thus requiring
buck-boost or SEPIC functionality.
Figure 4 depicts such a system. In this
setup, LED current is returned to VIN,
and the LEDs actually see a voltage
of VOUT – VIN, allowing a nominally
boost conﬁguration to function as
a buck-boost. In contrast, a SEPIC
conﬁguration would require a 2-inductor- or transformer-based solution,
resulting in increased complexity and
lower efﬁciency. However, a true SEPIC
would also provide for a grounded
load, which may be desirable in some
applications.
In this mode, PWM dimming is available through the PWM input, albeit not
at a dimming ratio comparable to the
one in the boost conﬁguration. Lack
of a PWMOUT-controlled load switch
means transient response cannot be as
rapid, since the output voltage is then
allowed to sag when PWMIN is low,
necessitating some recovery period
when PWMIN goes high again.
The ILIM pin provides analog dimming, as the ILIM range (0.12V < VILIM
< 1.23V) controls the (VFBP – VFBN) differential proportionally from 10mV to
100mV. This allows the LED current
to be linearly varied by an additional
10:1 ratio.
High Voltage (130V OVP)
Flyback LED Driver
The 130V application shown in Figure 5 is similar to that of Figure 3, but
because of the extremely high boost
ratio, a 3:1 transformer is added in
order to reduce the GATE duty cycle
such that the part’s maximum duty
cycle is not violated.
This circuit is capable of driving a
string of LEDs at 150mA, which can
add up to less than 130V total forward
voltage, at which point the OV/FB
pin is activated to stop all switching.
This prevents a potential overvoltage
condition at the output.
As presented, the application circuit
can provide a PWM dimming ratio of
500:1.
Other Functionality
In the 130V application above, because VFBP > 2.5V, the LTC3783 is in
constant-current, constant-voltage
operation, meaning the control loop
seeks to regulate the load sense resistor voltage (VFBP – VFBN) at 100mV.
This is distinct from the pure voltage
mode of the boost application, in which
VFBP = VFBN. Also, in constant-current,
constant-voltage mode the OV/FB
pin becomes a linear feedback input,
which regulates VOV/FB at 1.23V if (VFBP
– VFBN) < 100mV. L
33
L DESIGN FEATURES
Introduction
The LTC3412A is much more than a
drop-in replacement for the popular
LTC3412 monolithic buck switching
regulator. Though still offered in a
thermally enhanced 16-lead TSSOP,
the LTC3412A is also squeezed into
a smaller footprint 4mm × 4mm
QFN, reducing the package height to
0.75mm from 1.1mm. At the same
time, the maximum load current has
risen to 3A from the LTC3412’s 2.5A,
and the minimum input voltage has
been pared down to 2.25V from the
earlier 2.625V. The LTC3412A can
still deliver efﬁciency as high as 95%,
accept input voltages up to 5.5V, and
switch at frequencies up to 4MHz,
making it a compact and efﬁcient
solution for portable electronics that
require low supply voltages (down to
0.8V) converted from typical battery
voltages.
Like its predecessor, the LTC3412A
employs a constant frequency, current-mode architecture. The switching
frequency can be set between 300kHz
and 4MHz by an external resistor, or
each switching cycle can commence
with the falling edge of an external
clock signal fed into the Sync/Mode
pin. The LTC3412A’s high switching
frequency permits the designer to use
tiny, low value inductors while holding
output voltage ripple to a minimum.
Choice of Operating Modes
The LTC3412A can be conﬁgured for
Burst Mode operation, forced continuous operation, or pulse skipping. In
mobile applications where battery life
is of paramount importance, Burst
Mode operation boosts efﬁciency by
reducing gate charge losses at light
loads, and so reducing supply current to just 64µA at no load. Forced
continuous operation switches at
constant frequency regardless of load
current; this simpliﬁes ﬁltering of the
switch noise. Pulse skip mode provides
a good compromise between light load
efﬁciency and output voltage ripple.
During Burst Mode operation,
switching cycles are skipped during
light loads to reduce switching losses.
The LTC3412A provides for external
VIN
3.3V
CFF 22pF X5R
CIN3**
100µF
R1 392k
1
CITH 330pF X7R RITH
17.4k
3
4
RSS
2.2M
16
CIN1
22µF
PGOOD
ITH
VFB
SW
3000
2500
2000
1500
1000
500
0
0.1
0.2
0.3
0.4
0.5
VBURST (V)
0.6
0.7
control of these cycles’ peak current
(the burst clamp level) by varying
the DC voltage at the Sync/Mode
pin within a 0V–1V range. Figure 1
shows the relationship between this
DC voltage (which is generally tapped
off of the feedback resistor network)
and the burst clamp level. Higher
peak currents deliver more energy, so
fewer bursts are required to maintain
the output voltage. If the minimum
peak inductor current delivers more
energy than the load current demands,
the control loop causes the internal
power switches to skip more cycles.
Lower burst frequencies can improve
efﬁciency at light load, at the expense
5
ROSC
294k
6 SYNC/MODE
7
15
90
Burst Mode
80 OPERATION
14
SW
LTC3412A
13
EFE
PGND
R2
69.8k
CSS
1000pF X7R 8
RT
PGND
SW
RUN
SW
SGND
PVIN
L1*
0.47µH
VOUT
2.5V
3A
12
11
COUT**
100µF
×2
10
9
CIN2
22µF
X5R 6.3V
*VISHAY IHLP-2525CZ-01
**TDK 4532X5R0J107M
Figure 2. A 2.5V, 4A step-down regulator in Burst Mode operation
34
3500
100
2
CC
47pF
R3
115k
PVIN
4000
Figure 1. By tying the Sync/Mode pin to a
point on the feedback voltage divider, as in
Figure 2, the designer can freely adjust the
peak current of the bursts (See Figure 4).
GND
EFFICIENCY (%)
PGOOD
RPG
100k
SVIN
MAXIMUM PEAK INDUCTOR CURRENT (mA)
3A Monolithic Buck Regulator
by Theo Phillips
in 4mm × 4mm QFN
70
FORCED
CONTINUOUS
60
50
40
30
20
10
0
0.01
VIN = 3.3V
VOUT = 2.5V
FIGURE 4 CIRCUIT
0.1
1
LOAD CURRENT (A)
10
Figure 3. Efﬁciency vs load current for the
circuit of Figure 2, VIN = 3.3V, VOUT = 2.5V
(Burst Mode operation). If Sync/Mode were
tied to ground, the efﬁciency would be lower
(pulse skip mode), but output voltage ripple
would be greatly reduced.
Linear Technology Magazine • March 2006
DESIGN FEATURES L
ther reduction in the battery voltage
forces the internal P-channel MOSFET
to remain on for more than one cycle,
and ultimately to remain on 100% of
the time. This dropout state extends
the useful operating input voltage over
the run-time of the battery. Output
voltage simply follows the input voltage
as the battery continues to discharge,
reduced by drops across the inductor
and P-channel MOSFET.
VOUT
20mV/DIV
INDUCTOR
CURRENT
1A/DIV
5µs/DIV
Figure 4. Burst Mode operation, showing
output voltage ripple associated with bursts of
inductor current. The peak currents are held
to 1.1A because the Sync/Mode voltage is set
to 0.49V.
The LTC3412A can
deliver efﬁciency as high
as 95%, accept input
voltages up to 5.5V, and
switch at frequencies
up to 4MHz, making it
a compact and efﬁcient
solution for portable
electronics that require
low supply voltages (down
to 0.8V) converted from
typical battery voltages.
CIN3**
100µF
C1 22pF X5R
VIN
5V
R1 634k
1
PGOOD
RPG
100k
CITH 820pF X7R RITH
7.5k
2
3
CC
47pF
R2
200k
ROSC
137k
ITH
VFB
5
6
CSS
1000pF X7R 8
PVIN
PGOOD
4
7
RSS
2.2M
SVIN
SW
16
CIN1
22µF
X5R 6.3V
15
14
SW
LTC3412A
13
EFE
PGND
RT
SYNC/MODE
PGND
SW
RUN
SW
SGND
PVIN
Figure 2 shows a 2.5V step-down
DC/DC converter that is conﬁgured
for Burst Mode operation. This circuit
provides a regulated 2.5V output at
up to 3A from a 3.3V input. Figure 3
shows that efﬁciency peaks at 94%,
and remains high across the load
spectrum. The measured output voltage ripple is around 25mVP–P at loads
from 10mA to 200mA, and drops to
around 5mV at heavier loads. Lower
ripple (5mV–10mV) can be maintained
at the lightest loads with pulse skip
mode, with some sacriﬁce in light load
efﬁciency. The switching frequency for
this circuit is set at 1MHz by a single
external resistor, ROSC. Operating at
frequencies this high allows the use
of a low value (and physically small)
inductor.
In this application, Burst Mode operation maintains the high efﬁciency
at light loads. This powers down the
majority of the internal circuitry during
the intervals between switching cycles.
The peak inductor current is set by the
R2-R3 voltage divider, which generates
100
L1*
0.47µH
90
VOUT
3.3V
3A
12
11
COUT**
100µF
×2
10
9
CIN2
22µF
X5R 6.3V
80
70
60
50
40
30
20
GND
*VISHAY IHLP-2525CZ-01
**TDK C4532X5R0J107M
Figure 5. A 2MHz regulator, 5V to 3.3V at 3A, operating in forced continuous mode
Linear Technology Magazine • March 2006
A High Efﬁciency 2.5V, 3A
Step-Down Regulator with
All Ceramic Capacitors
EFFICIENCY (%)
of a slight increase in output voltage
ripple. Conversely, lowering the minimum peak inductor current increases
the burst frequency and reduces the
output voltage ripple.
Burst Mode operation dissipates
minimal power in light load applications, but sometimes noise
suppression takes priority over efﬁciency. To reduce noise and RF
interference, the LTC3412A can be
set up for forced continuous operation by connecting the Sync/Mode pin
to the Signal Input Voltage pin. This
mode maintains a constant switching frequency regardless of output
load, dovetailing with noise sensitive
applications in which it is necessary
to avoid switching harmonics in a
particular signal band.
In pulse skip mode, the burst clamp
is set to zero current, which limits the
minimum peak inductor current to a
level set by the minimum on-time of
the control loop. Pulse skip mode is
implemented by connecting the Sync/
Mode pin to GND. Pulse skipping has
lower ripple than Burst Mode operation
and has better light-load efﬁciency
than forced continuous mode.
As the battery voltage decreases
toward the output voltage, the duty
cycle and the on-time increase. Fur-
10
0
0.01
VIN = 5V
VOUT = 3.3V
FIGURE 5 CIRCUIT
0.1
1
LOAD CURRENT (A)
10
Figure 6. Efﬁciency of the circuit in Figure 5
reaches well into the 90s at moderate loads.
35
L DESIGN FEATURES
VOUT
100mV/DIV
AC
COUPLED
VIN
2V/DIV
0V
VOUT
2V/DIV
0V
INDUCTOR
CURRENT
2A/DIV
VSW
5V/DIV
VIN = 5V
40µs/DIV
VOUT = 3.3V
f = 2MHz
LOAD STEP = 300mA TO 3A
0V
VIN = 3.3V
VOUT = 2.5V
f = 1MHz
RLOAD = 1.5
100µs/DIV
Figure 7. The circuit of Figure 5 delivers
a clean transient response when the load
is stepped from 300mA to 3A.
Figure 8. If the circuit of Figure 2 experiences
a dip in VIN, a regulated output is maintained
until the LTC3412A goes smoothly into
dropout. Below that level, VOUT follows VIN
anywhere above the undervoltage lockout. For
output voltages programmed below the UVLO,
the LTC3412A can maintain its output voltage
even when the input sinks to 2.25V.
a 0.49V reference at the Sync/Mode
pin. This corresponds to approximately
1.1A minimum peak inductor current,
as shown in Figure 1.
Figure 4 illustrates how Burst Mode
operation produces a burst of inductor current pulses that are repeated
periodically. Each inductor current
pulse increases to approximately 1.1A
during each switching period before
the main power MOSFET is shut
off. The process repeats for multiple
switching cycles until the charge on
the output capacitor is refreshed. Once
this is accomplished, both the main
and synchronous power MOSFETs
are held off while the load current
is supplied solely by the charge on
the output capacitor. This sleep state
continues until the output voltage
drops low enough to initiate another
burst cycle. Varying the voltage on the
Sync/Mode pin affects the amplitude
of the group of current bursts as well
as the frequency at which they are
repeated.
tion near an AM radio receiver, since
it operates above the broadcast band
and the switch noise can be ﬁltered
in a predictable manner. Efﬁciency for
this circuit, shown in Figure 6, is as
high as 95% at moderate loads.
Ceramic capacitors offer low cost
and low ESR, but many switching regulators have difﬁculty operating with
them because the extremely low ESR
can lead to loop instability. The phase
margin of the control loop can drop to
inadequate levels without the aid of the
zero that is normally generated from
the higher ESR of tantalum, niobium,
or special polymer capacitors. The
LTC3412A, however, includes OPTILOOP compensation, which allows it
to operate properly with ceramic input
36
Lower Minimum
Input Voltage
Sagging input voltages are handled
well by the LTC3412A. Figure 8 shows
the response of VOUT to a substantial
hit to VIN. Until VIN drops to VOUT, the
effect on VOUT is negligible; below that
point the P-channel FET turns on
100% of the time (dropout), and VOUT
follows VIN right down to the guaranteed 2.25V undervoltage lockout.
Output voltages set below the UVLO
can be maintained while maximizing
battery life, or where input rails are
just loosely regulated.
Conclusion
The LTC3412A is a monolithic, synchronous step-down DC/DC converter
that is well suited for applications
requiring up to 3A of output current.
OPTI-LOOP compensation allows
diverse transient responses to be
optimized with ceramic capacitors.
For excellent thermal handling, the
LTC3412A is offered in two tiny
packages, each with an exposed pad
to facilitate heat sinking (Figure 9).
Its high switching frequency, low
undervoltage lockout and internal
low RDS(ON) power switches make the
LTC3412A an excellent choice for
compact, high efﬁciency power supplies. L
For further information on any
of the devices mentioned in this
issue of Linear Technology, use
the reader service card or call the
LTC literature service number:
2MHz, High Efﬁciency 3.3V,
3A Step-Down Regulator with
All Ceramic Capacitors
Figure 5 shows a 3.3V step-down DC/
DC converter using all ceramic capacitors. Switching at 2MHz, this circuit
provides a regulated 3.3V output at
up to 3A from a 5V input voltage. This
converter is an ideal choice for opera-
and output capacitors. The LTC3412A
allows loop stability to be achieved
through a wide range of loads and
output capacitors with proper selection of compensation components on
the ITH pin. Figure 7 shows the stable
transient response associated with the
circuit of Figure 5.
1-800-4-LINEAR
Figure 9. The LTC3412A is offered in two
thermally enhanced packages: the 16-lead
TSSOP (both sides shown) and the ultra-thin
4mm × 4mm QFN (shown in tweezers).
Ask for the pertinent data sheets
and Application Notes.
Linear Technology Magazine • March 2006
DESIGN IDEAS L
3A Converter Drives LEDs
with 500:1 Dimming
by Jaino Parasseril
Introduction
DESIGN IDEAS
3A Converter Drives LEDs
with 500:1 Dimming .........................37
Jaino Parasseril
40nVP–P Noise, 0.05µV/°C Drift,
Chopped FET Ampliﬁer .....................39
Jim Williams
100
VIN = 5V
4 LEDs
fPWM = 100Hz
10
1
0.1
0.1
10
1
PWM DUTY CYCLE (%)
Save Board Space with a High
Efﬁciency Dual Synchronous,
400mA/800mA, 2.25MHz
Step-Down DC/DC Regulator ..............44
Damon Lee
Linear Technology Magazine • March 2006
Figure 3), resulting in a wide dimming
range of 500:1 at a PWM frequency
of 100Hz.
The LED current can be controlled
by feeding a PWM signal with a broad
range of frequencies. Dimming below
80Hz is possible but not desirable due
to perceptible ﬂashing of LEDs at lower
frequencies. The LED current can be
controlled at higher frequencies, but
the dimming range decreases with
increasing PWM frequency.
In high temperature applications,
the leakage of the Schottky diode D1
increases, which in turn, discharges
the output capacitor during the PWM
“off” time. This results in a smaller
with the addition of a few external
components results in a wider dimming range of 500:1. The technique
requires a PWM logic signal applied
to the gate of both NMOS transistors
(refer to Figure 2). When the PWM
signal is taken high the part runs in
normal operation and ILED of 100mV/
RSENSE runs through the LEDs. When
the PWM input is taken low the LEDs
are disconnected and turn off. This
unique external circuitry produces a
fast rise time for the LED current (see
L1
2.0µH
VIN
5V
C1
3.3µF
C1: TAIYO YUDEN EMK316BJ335ML
C2: TAIYO YUDEN UDK325BJ106MM
D1: ZETEX ZLLS1000
D2: DIODES INC. 1N4148
L1: TOKO D53LC (PN A915AY-2ROM)
NMOS1: ZETEX 2N7002
NMOS2: FAIRCHILD FDG327N
LED1 TO LED4: LUMILEDS LXHL-BW02
ISN1
ISP1
D1
VIN
IADJ1
IADJ2
SHDN
FBN
75k
LT3477
ISP2
5V
0V
PWM
100Hz
FBP
NMOS1
100k
RC
2.49k
CC
10nF
LED1
RT
GND
300mA
RSENSE
0.33Ω
ISN2
VREF
D2
C2
10µF
1M
SW
VC
Mayur Kenia
Philip Karantzalis
100
Figure 1. The average LED current changes
proportionally with PWM duty cycle. Many LED
manufacturers specify PWM dimming because
it offers wider dimming ranges and better LED
performance than analog dimming.
SC70 LED Driver Drives Six White LEDs
from a Single Li-Ion Battery ..............40
A Simple Digitally Tunable
Active RC Filter .................................42
PWM dimming offers
several advantages over
analog dimming and is the
method preferred by LED
manufacturers. With PWM
dimming, the chromaticity
of the LEDs remains
unchanged and a wider
dimming range is possible.
ILED (mA)
For LED applications where a wide
dimming range is required, two competing methods are available: analog
dimming and PWM dimming. The
easiest method is to simply vary the
DC current through the LED—analog
dimming—but changing LED current
also changes its chromaticity (color
shift), undesirable in many applications (such as LCD backlights).
The better method is PWM dimming,
which switches the LED on and off, using the duty cycle to control the average
current. PWM dimming offers several
advantages over analog dimming and
is the method preferred by LED manufacturers. By modulating the duty
cycle of the PWM signal, the average
LED current changes proportionally as
illustrated in Figure 1. The chromaticity of the LEDs remains unchanged in
this scheme since the LED current is
either zero or at programmed current.
Another advantage of PWM dimming
over analog dimming is that a wider
dimming range is possible.
The LT3477 is a 3A DC/DC converter that is ideally suited for LED
applications. For the LT3477, analog
dimming offers a dimming ratio of
about 10:1; whereas, PWM dimming
SS
LED2
CSS
33nF
6.81k
LED3
LED4
NMOS2
Figure 2. A 5V input drives four white LEDs in boost mode with PWM dimming
37
L DESIGN IDEAS
PVIN
32V
PWM
5V/DIV
C1
2.2µF
RSENSE
0.33Ω
IL
1A/DIV
LED1
ILED
200mA/DIV
VIN = 5V
4LEDs, 300mA
fPWM = 100Hz
BOOST MODE
C1: NIPPON UNITED CHEMICON NTS40X5R1H225M
C2: TAIYO YUDEN GMK316BJ105ML
C3: TAIYO YUDEN LMK316BJ335KL
L1: TOKO D53LC (PN A915AY-100M)
D1: ZETEX ZLLS400
D2: DIODES INC 1N4148
NMOS1, NMOS2: ZETEX 2N7002
PMOS: SILICONIX SI2303BDS
LED1 TO LED6: LUMILEDS LXHL-BW02
10µs/DIV
Figure 3. Rising LED current for the circuit in
Figure 2 settles in under 20µs, thus allowing
short pulse widths, and high dimming ratios.
effective LED dimming ratio. Consequently, the dimming range decreases
to about 200:1 at 85°C.
PWM dimming can be used in boost
mode (Figure 2), buck mode (Figure 4)
and buck-boost mode (Figure 5). For
the typical boost topology, efﬁciency
exceeds 80%. Buck mode can be used
to increase the power handling capability for higher current LED applications,
A buck-boost LED driver works best in
applications where the input voltage
ﬂuctuates to higher or lower than the
total LED voltage drop. L
LED6
•
•
•
6-LED 300mA
STRING
NMOS2
ISP1
D1
VIN
IADJ1
IADJ2
C3
3.3µF
FBN
10k
LT3477
SHDN
ISP2
ISN2
VC
VREF
D2
5V
0V
RT
FBP
PWM
GND
SS
CSS
33nF
NMOS1
100k
100Hz
280k
SW
ISN1
PWM
C2
1µF
PMOS
L1
10µH
VIN
3.3V
1k
1k
6.81k
CC
0.1µF
Figure 4. Buck mode converter drives six white LEDs with PWM dimming from a 32V input
1k
NMOS2
PWM
1k
300mA
LED1 LED2
PMOS
VIN
10V
C1
3.3µF
ISP1
L1
4.7µH
ISN1
FBN
49.9k
LT3477
ISP2
VC
5V
0V
FBP
PWM
100Hz
ISN2
VREF
D2
NMOS1
100k
1M
SW1
VIN
IADJ1
IADJ2
SHDN
RSENSE
0.33Ω
D1
RT
GND
SS
CSS
33nF
6.81k
C2
10µF
RC
1.5k
CC
10nF
C1: TAIYO YUDEN LMK316BJ335ML
C2: TAIYO YUDEN UDK325BJ106MM
D1: ZETEX ZLLS1000
D2: DIODES INC. 1N4148
L1: TOKO D53LC (PN A915AY-2ROM)
NMOS1, NMOS2: ZETEX 2N7002
PMOS: SILICONIX Si2303BDS
LED1, LED2: LUMILEDS LXHL-BW02
Figure 5. Buck-boost mode converter drives two white LEDs with PWM dimming from a 10V input
38
Linear Technology Magazine • March 2006
DESIGN IDEAS L
40nVP–P Noise, 0.05µV/°C Drift,
by Jim Williams
Chopped FET Ampliﬁer
Figure 1’s circuit combines the
5V rail-to-rail performance of the
LTC6241 with a pair of extremely low
noise JFETs conﬁgured in a chopper
based carrier modulation scheme to
achieve extraordinarily low noise and
DC drift. This circuit’s performance
suits the demanding transducer signal conditioning situations such as
high resolution scales and magnetic
search coils.
The LTC1799’s output is divided
down to form a 2-phase 925Hz
square wave clock. This frequency,
harmonically unrelated to 60Hz, provides excellent immunity to harmonic
beating or mixing effects which could
cause instabilities. S1 and S2 receive
complementary drive, causing the A1based stage to see a chopped version
of the input voltage. A1’s square wave
output is synchronously demodulated
by S3 and S4. Because these switches
are synchronously driven with the
input chopper, proper amplitude and
polarity information is presented to
DC output ampliﬁer A2. This stage
integrates the square wave into a DC
voltage, providing the output. The output is divided down (R2 and R1) and
fed back to the input chopper where
it serves as a zero signal reference.
Gain, in this case 1000, is set by the
VERT = 20nV/DIV
HORIZ = 5s/DIV
Figure 2. Noise measures 40nVP–P in 50s sample period
TO LTC201 V + PIN
5V
18.5kHz
V+
5V
74C74 ÷ 2
74C90 ÷ 10
DIV LTC1799 OUT
RSET
Q
925Hz
54.2k*
TO
Ø1
POINTS
5V
Ø1
–5V
TO LTC201 V – PIN
1µF
+
1µF
+
5V
5V
R1-R2 ratio. Because the input stage
is AC coupled, its DC errors do not
affect overall circuit characteristics,
resulting in the extremely low offset
and drift noted.
Figure 2, noise measured over a 50
second interval, shows 40nV in a 0.1Hz
to 10Hz bandwidth.This low noise is
attributed to the input JFET’s die size
and current density. L
Q
TO
Ø2
POINTS
8
INPUT
3k
909Ω**
909Ω**
6
7
S1
S2
0.47µF
1µF LSK389
Ø2
11
10
9
499Ω**
Ø2
1µF
A1
LTC6241HV
+
1µF
1
–
10M
–5V
2
100k
S3
S4
3
240k
14
15
16
100k
10k
0.001µF
Ø1
1µF
* = 0.1% METAL FILM RESISTOR
** = 1% METAL FILM RESISTOR
= LTC201 QUAD
= LSK389
= LINEAR INTEGRATED SYSTEMS
FREMONT, CA
NOISE = 40nVP-P 0.1Hz TO 10Hz
OFFSET = 1µV
DRIFT = 0.05µV/°C
R2 +1
GAIN =
R1
OPEN-LOOP GAIN = 10 9
I BIAS = 150pA
–
A2
LTC6241HV
OUTPUT
+
R2
10k
R1
10Ω
Figure 1. 40nV noise chopper ampliﬁer
Linear Technology Magazine • March 2006
39
L DESIGN IDEAS
SC70 LED Driver Drives Six White LEDs
from a Single Li-Ion Battery by Mayur Kenia
Introduction
The highly integrated LT3491 provides
a compact, simple solution for driving
backlight circuits in battery-powered
portable devices, such as cellular
phones, PDAs, and portable GPS
devices. It features internal compensation, open-LED protection, a 32V
power switch and a 32V Schottky diode
all inside a tiny SC70 package.
Speciﬁcally, the LT3491 is a ﬁxed
frequency step-up DC/DC converter
that drives up to six white LEDs in
series from a Li-Ion cell. Series connection of the LEDs provides identical
LED currents resulting in uniform
brightness without the need for ballast resistors. In addition, the 2.3MHz
switching frequency allows the use of
tiny inductors and capacitors.
Figure 1 shows how easy it is to drive
six white LEDs from a Li-Ion battery.
Figure 2 shows the efﬁciency of the six
white LED application circuit.
SHUTDOWN AND
DIMMING CONTROL
VIN
3V TO 5V
CTRL
VIN
L1
10µH
CAP
LT3491
SW
C1
1µF
RSENSE
10Ω
LED
GND
C1: TAIYO YUDEN LMK212BJ105MD
C2: TAIYO YUDEN GMK316BJ105ML
L1: MURATA LQH32CN100
Figure 1. Li-Ion powered
driver for six white LEDs
C2
1µF
side sense moves the sense resistor
to the top of the LED string.
Figure 3 shows the advantage of
high side sense in a cell phone where
the LEDs are placed some distance
away from the driver. The technique
eliminates the return wire thereby
reducing the number of wires running
through the hinge. Also, it allows the
LEDs to be placed further away from
the converter without compromising
performance.
Dimming & Shutdown Control
A single pin performs both shutdown
and accurate LED dimming control.
The dimming range of the part extends
High Side Sense
The LT3491 features a unique high
side LED current sense that enables
the part to function as a “one wire”
current source—one side of the LED
string can be returned to ground
anywhere, allowing a simpler “one
wire” LED connection. Traditional
LED drivers use a grounded resistor to
sense LED current requiring a 2-wire
connection to the LED string. High
80
VIN = 3.6V
6 LEDs
75
LED
DRIVER
EFFICIENCY (%)
70
LT3491
65
60
55
50
45
40
0
5
10
15
20
LED CURRENT (mA)
Figure 2. Efﬁciency of the circuit in Figure 1
40
Figure 3. Traditional sense (left) and high side sense (right) implemented solutions in a cell
phone. The high side solution reduces the number of connections through the hinge.
Linear Technology Magazine • March 2006
DESIGN IDEAS L
100
L1
10µH
SENSE VOLTAGE (mV)
200
VIN
160
C1
1µF
120
SW
CAP
RSENSE
10Ω
LT3491
LED
GND
80
CTRL
C2
1µF
40
0
0
500
1000
1500
2000
VCTRL (mV)
5V
0V
Figure 4. LED sense voltage
versus CTRL pin voltage
from 1.5V at the CTRL pin for full LED
current down to 100mV. The CTRL pin
directly controls the regulated sense
voltage across the sense resistor that
sets the LED current. Figure 4 shows
the regulated sense voltage versus
CTRL pin voltage.
In addition to using a DC voltage
at the CTRL pin, either a ﬁltered PWM
signal or a direct PWM signal can
be used to control the LED current.
Direct PWM dimming achieves wider
dimming compared to using a ﬁltered
PWM or a DC voltage. Direct PWM dimming uses a MOSFET in series with
the LED string to quickly connect and
disconnect the LED string. Figure 5
presents direct PWM dimming in a
Li-Ion to four white LED application.
The PWM signal controls both the turn
on and turn off of the part through the
CTRL pin and the MOSFET. Figure 6
shows the linearity of PWM dimming.
The available dimming range depends
on the settling time of the application
PWM
FREQ
NORMALIZED SENSE VOLTAGE (%)
VIN
3V TO 5V
240
10
1
0.1
Q1
2N7002
and the PWM frequency used. The
application in Figure 5 achieves a
dimming range of 300:1 using a 100Hz
PWM frequency. Figure 7 shows the
available dimming range for different
PWM frequencies.
Torch and Flash Mode
LED Control
White LEDs are quickly gaining popularity as the illumination source for
camera phones. White LEDs provide
a simple compact solution for ﬂash
and torch lighting in cell phone applications. The LT3491 provides a
small overall solution to ﬂash and
torch control.
Torch and ﬂash applications typically use a single high power white
LED. The LED driver cannot be setup
as a boost because the input voltage
in camera phones is very close to, if
not higher, than the forward voltage
of the LED. A higher input voltage
creates a DC path to ground that will
drain the battery. High side sensing
allows the LT3491 to drive a single
LED from higher inputs, thus avoiding this problem. Figure 8 shows the
application circuit for torch and ﬂash
control powered from two Li-Ion cells.
The voltage at the control pin can be
moved between two DC levels to toggle
between torch and ﬂash operation.
Conclusion
The LT3491 provides a highly integrated solution to drive backlight
applications up to six LEDs from a
Li-Ion cell input with the added advantage of high side sense in a tiny
SC70 package. L
C2
4.7µF
VIN
6V TO 9V
10k
RSENSE
1Ω
PWM DIMMING RANGE
PULSING MAY BE VISIBLE
D1
1k
CAP
FLASH MODE
ILED = 200mA V
CTRL
1.5V
100
C1
1µF
10
1000
100
PWM FREQUENCY (Hz)
10000
Figure 7. Dimming range vs frequency
LED
L1
10µH
VIN
LT3491
CTRL
VCTRL
680mV TORCH MODE
ILED = 100mA
10
1
100
Figure 6. Linearity of PWM dimming
for a 100Hz PWM frequency and the
application of Figure 5
100k
Figure 5. Li-Ion to four white LEDs
with direct PWM dimming.
10
1
PWM DUTY CYCLE (%)
0.1
SW
GND
C1: TAIYO YUDEN LMK212BJ105MD
C2: TAIYO YUDEN LMK212BJ475MG
D1: AOT-2015 HPW1751B
L1: MURATA LQH32CN100
Figure 8. A 2-Cell Li-Ion driver for torch and ﬂash mode control
For more information on parts featured in this issue, see
http://www.linear.com/designtools
Linear Technology Magazine • March 2006
41
L DESIGN IDEAS
A Simple Digitally Tunable
Active RC Filter
Introduction
It can be tuned to a few cutoff frequencies via a Serial Peripheral Interface
(SPI)1. This is a simpler alternative
to using switches with resistor or capacitor arrays or multiple DACs that
require a large number of active and
passive components.
Digital control through an SPI is
useful in a variety of applications to
control band-limiting for sensor and
transducer signals. Typical applications are: accelerometers for vibration
analysis, hydrophones for sonar
detection, LVDTs for linear motion
measurements and microphones for
sound reception and recording.
The tuning of the cutoff frequency
(fCUTOFF) of an active RC ﬁlter can be
implemented using switched-capacitor circuits or continuous time circuits.
In applications that require inﬁnite
tuning resolution of an any-order ﬁlter
in a single IC package, a switched-capacitor approach is preferable (simply
changing the clock frequency tunes
fCUTOFF). In applications that require
tuning a continuous time ﬁlter to just
a few cutoff frequencies, tuning can be
implemented using op amps, CMOS
switches and resistor or capacitor
arrays.
Continuous time ﬁlters can also be
tuned with high resolution over a large
frequency range via digital control by
using DACs to multiply the RC time
constant of op-amp-based integrators
(for example, an 8-bit DAC-based tuner
allows for 256 frequency steps). Figure 1 shows a simple, low order and
low cost continuous time ﬁlter circuit.
An SPI-Tunable
Second Order Filter
The Figure 1 circuit is a state-variable
second order ﬁlter using two ICs, a low
noise CMOS quad op amp (LTC6242)
and a low noise dual Programable
Gain Ampliﬁer, PGA (LTC6912-X).
The gains of the two LTC6912-X
by Philip Karantzalis
ampliﬁers (GA and GB) are independently programmed via SPI control.
The SPI controlled gain settings of
an LTC6912-1 are 1, 2, 5, 10, 20,
50 and 100 and for an LTC6912-2 1,
2, 4, 8, 16, 32 and 64. The Figure 1
ﬁlter has three inverting outputs
providing a highpass, bandpass and
lowpass frequency responses. An optional inverting ampliﬁer connected
to one of the three outputs provides
for a noninverting or a differential
ﬁlter output. The ﬁlter’s second order
transfer function is a function of the
circuit’s resonant frequency, f0 and
Q values. The f0 frequency is equal to
the integrator’s RC constant, the dual
PGA gain and the ratio of resistors R4
and R2 (if R4 = R2 and GA = GB = Gain
then f0 = Gain/2πRC). The ﬁlter’s Q
value is equal the ratio of resistors R3
and R2 and the two PGA gains (if R4
= R2 and GA = GB then Q = R3/R2).
The ﬁlter’s passband gain is equal to
the ratio of R4/R1, R3/R1 and R2/R1
R4
10k
10k
R3
–
10k
C
1/4 LTC6242
R
+
–
1/4 LTC6242
INA
+
R2
10k
VIN
R1
–
1/4 LTC6242
+
OUT A
LTC6912-1
OR
LTC6912-2
C
R
–GA
VLP–
SPI SELECTABLE GAINS
LTC6912-1: 1, 2, 5, 10, 20, 50, 100
LTC6912-2: 1, 2, 4, 8, 16, 32, 64
–
1/4 LTC6242
+
INB
–GB
OUT B
LOWPASS =


R4 2 2
4π f0


VLP −
R1
= −

VIN
 s 2 + 2πf0 s + 4π 2 f0 2 


Q
BANDPASS =


R3 2πf0
•
s


VBP −
R1 Q
= −

VIN
 s 2 + 2πf0 s + 4π 2 f0 2 


Q
HIGHPASS =


R2 2
s


VHP −
R1
= −

VIN
 s 2 + 2πf0 s + 4π 2 f0 2 


Q
VBP–
3-WIRE CONTROL
VHP–
IF R4 = R2 AND G A = GB = GAIN, THEN f0 =
OPTIONAL INVERTER
FOR A NON-INVERTING
OR DIFFERENTIAL OUTPUT
GAIN
R3
800kHz
AND Q =
AND MAXIMUM f0 =
2πRC
R2
Q • GAIN
Figure1. An SPI tunable second order active RC ﬁlter
42
Linear Technology Magazine • March 2006
DESIGN IDEAS L
GAIN = 1
R = 1.58M
C = 1000pF
R4 = R2 = R1 = 10k
R3 = 6.98k
10
100
1k
10k
FREQUENCY (Hz)
100k
6
0
−6
−12
−18
−24
−30
−36
−42
−48
−54
−60
−66
−72
6
0
GAIN = 1
−6
AMPLITUDE (dB)
GAIN = 64
AMPLITUDE (dB)
AMPLITUDE (dB)
6
0
−6
−12
−18
−24
−30
−36
−42
−48
−54
−60
−66
−72
GAIN = 64
R = 1.58M
C = 1000pF
R4 = R2 = R1 = 10k
R3 = 6.98k
10
100
1k
10k
FREQUENCY (Hz)
Figure 3. Tunable second order Butterworth
highpass response using the LTC6912-2
for a lowpass, bandpass and highpass
ﬁlters respectively.
the f0 frequency is equal to 1.274 •
fCUTOFF and the ﬁlter’s Q value is equal
to 0.577. Figure 2 shows the tunable
range of a Butterworth lowpass ﬁlter
using an 100Hz integrator frequency
(R = 1.58MΩ, ±1% and C = 1000pF,
±5%) and an LTC6912-2 to tuned the
ﬁlter’s fCUTOFF from 100Hz to 6.4kHz.
Figure 3 shows the tunable range of
a Butterworth highpass ﬁlter that
is the mirror oposite of the lowpass
ﬁlter reponse of Figure 2. The output
response to a step change is approximately equal to 5/fCUTOFF, (if the step
A Tunable Lowpass
or Highpass Filter
The shape of the amplitude response
of the second order depends on the
f0 frequency relative to the cutoff frequency and the Q value. In a second
order Butterworth highpass or lowpass
response the f0 frequency is equal to
fCUTOFF (f–3dB) and the ﬁlter’s Q value
is equal to 0.707. In a second order
Bessel highpass or lowpass response
−18
−24
−30
−36
−42
−48
100
100k
Figure 2. Tunable second order Butterworth
lowpass response using the LTC6912-2
−12
10k
1k
FREQUENCY (Hz)
100k
Figure 4. Tunable second order bandpass
ﬁlter using an LTC6912-1 with gains 1–8
change is to a 1kHz fCUTOFF then the
ﬁlter settles ﬁve milli-seconds after a
step change). The maximum tunable
f0 frequency is a function of the gainbandwidth product of the op amps
and the circuit’s sensitivity to the
highest PGA gain that is used for tuning. For the ampliﬁers shown, based
on empirical data, a maximum f0 of
800kHz/[Q • Gain] limits gain error to
≤2dB). For example, if only the lowest
1, 2, 5 and 10 gains of an LTC6912-1
are used for tuning, a second order
Butterworth lowpass ﬁlter (f0 = fCUTOFF)
continued on page 45
R4
10k
6
0
R3
10k
−6
–
C
1000pF
INA
1/4 LTC6242
+
VIN
–
1/4 LTC6242
OUT A
−12
−18
−24
−30
GAIN = 8
GAIN = 1
−36
R2
10k
R1
10k
–GA
AMPLITUDE (dB)
R
316k
C
1000pF
R
316k
+
−42
−48
100
LTC6912-2
–
INB
1/4 LTC6242
+
–GB
10k
OUT B
10k
3-WIRE CONTROL
10k
IF G A = GB = GAIN, THEN fNOTCH =
1k
FREQUENCY (Hz)
GAIN
2πRC
10k
–
1/4 LTC6242
+
VOUT(NOTCH)
Figure 5. An SPI-tunable second order notch ﬁlter
Linear Technology Magazine • March 2006
43
L DESIGN IDEAS
Save Board Space with a High
Efﬁciency Dual Synchronous,
400mA/800mA, 2.25MHz
Step-Down DC/DC Regulator by Damon Lee
Introduction
The ever shrinking nature of cell
phones, pagers, PDAs and other portable devices drives a corresponding
demand for smaller components.
One way to shrink DC/DC regulator
circuitry is to increase the switching
frequency of the regulator, thus allowing the use of smaller and cheaper
capacitors and inductors to complete
the circuit. Another way is to combine the switcher and MOSFETs in
one small, monolithic package. The
LTC3548 DC/DC regulator does
both.
The LTC3548 is a 10-lead MSOP/
DFN, dual, synchronous, step-down,
current mode, DC/DC regulator, intended for low power applications. It
operates within a 2.5V to 5.5V input
voltage range and has a ﬁxed 2.25MHz
switching frequency, making it possible to use low-proﬁle capacitors and
inductors that are only 1mm high. The
LTC3548 is the latest in the LTC3407
and LTC3407-2 family of dual regulators and features an improved Burst
Mode ripple and two outputs of 400mA
and 800mA. It is available in small
MSOP and DFN packages, allowing
Figure 1. Two DC/DC regulators occupy
less than 0.2in2 of board space
two DC/DC Regulators to occupy less
than 0.2 square inches of board real
estate, as shown in Figure 1.
The outputs of the LTC3548 are
independently adjustable from 0.6V
to 5V. For battery-powered applications that have input voltages above
and below the output voltage, the
LTC3548 can be used in a single
inductor, positive buck-boost converter conﬁguration (see data sheet
for details). Two built in 0.35Ω switch
provides high efﬁciency at maximum
output current. Internal compensation
minimizes external components and
board space.
120
VOUT1
100mV/
DIV
100
LTC3407-2
95
100
IL1
500mA/
DIV
IL1
500mA/
DIV
80
EFFICIENCY (%)
VOUT RIPPLE (mV)
90
VOUT1
100mV/
DIV
60
LTC3548
40
Burst Mode OPERATION
85
80
PULSE SKIP MODE
75
70
VIN = 3.3V
VOUT1 = 1.8V
LOAD = 100mA
4µs/DIV
Figure 2. Comparison of ripple for Burst Mode
operation of the LTC3548 and LTC3407-2.
44
Efﬁciency is extremely important in
battery-powered applications, and the
LTC3548 keeps efﬁciency high with an
automatic, power saving Burst Mode
operation, which reduces gate charge
losses at low load currents. With no
load, both converters together draw
only 40µA, and in shutdown, the device draws less than 1µA, making it
ideal for low current applications. The
LTC3548 features an improved Burst
Mode ripple voltage, which is only
about one third of the ripple for the
LTC3407 and LTC3407-2, as shown
in Figure 2 and Figure 3.
The LTC3548 uses a current-mode,
constant frequency architecture that
beneﬁts noise sensitive applications.
Burst Mode is an efﬁcient solution for
low current applications, but sometimes noise suppression is a higher
priority. To reduce noise problems,
a pulse-skipping mode is available,
which decreases the ripple noise at
low currents. Although not as efﬁcient
as Burst Mode at low currents, pulseskipping mode still provides high
efﬁciency for moderate loads, as seen
in Figure 4. In dropout, the internal
20
VIN = 3.6V, VOUT = 1.8V
NO LOAD ON OTHER CHANNEL
CHANNEL 1; CIRCUIT OF FIGURE 3
65
VIN = 3.6V
0
0.1
1
10
100
LOAD CURRENT (mA)
1000
Figure 3. Burst Mode operation
output voltage ripple vs load current
for the LTC3548 and LTC3407-2.
60
1
10
100
LOAD CURRENT (mA)
1000
Figure 4. Efﬁciency of Burst Mode
operation and pulse skip mode
Linear Technology Magazine • March 2006
DESIGN IDEAS L
P-channel MOSFET switch is turned
on continuously, thereby maximizing
the usable battery life.
A Power-On Reset output is available for microprocessor systems
to insure proper startups. Internal
overvoltage and undervoltage comparators on both outputs will pull
the POR output low if the output voltages are not within ±8.5%. The POR
output is delayed by 262,144 clock
cycles (about 175ms) after achieving
regulation, but will be pulled low immediately when either output is out
of regulation.
A High Efﬁciency 2.5V and
1.8V Step-Down DC/DC
Regulator with all Ceramic
Capacitors
The low cost and low ESR of ceramic
capacitors make them a very attractive
choice for use in switching regulators.
In addition, ceramic capacitors have
a benign failure mechanism unlike
tantalum capacitors. Unfortunately,
the ESR is so low that it can cause
loop stability issues. A solid tantalum capacitor’s ESR generates a
loop zero at 5kHz–50kHz that can be
instrumental in giving acceptable loop
phase margin. Ceramic capacitors, on
the other hand, remain capacitive to
beyond 300kHz and usually resonate
Digi-Tune Filters, continued from page 43
can be tuned to 110kHz (maximum f0
= 800kHz/[0.707 • 10]).
A Tunable Bandpass Filter
The –3dB bandwidth of a second order
ﬁlter is equal to the center frequency
(fCENTER) divided by the Q value (bandwidth = fCENTER/Q). The sensitivity of
the second order bandpass ﬁlter to
the tolerance of the integrator’s RC
values is proportional to the ﬁlter’s
Q. Typically with a Q ≤ 4, using a
±1% R and a ±5% C for the ﬁlter’s two
integrators is practical for a second
bandpass ﬁlter. The sensentivity of the
second order bandpass ﬁlter with Q >
4 increases rapidly for each unit of Q
increase and the ﬁlter’s two integrators should use ±1% RC components.
Linear Technology Magazine • March 2006
VIN = 2.5V*
TO 5.5V
C1
10µF
RUN2 VIN
MODE/SYNC
VOUT2 = 2.5V*
AT 400mA
C3
4.7µF
L2
4.7µH
C5, 68pF
R4
887k
RUN1
POR
LTC3548
SW2
SW1
VFB1
VFB2
R3
280k
C1, C2, C3: TAIYO YUDEN JMK212BJ106MG
C3: TAIYO YUDEN JMK212BJ475MG
GND
R5
100k
POWER-ON
RESET
L1
2.2µH
C4, 33pF
R2
R1 604k
301k
VOUT1 = 1.8V
AT 800mA
C2
10µF
L1: MURATA LQH32CN2R2M11
L2: MURATA LQH32CN4R7M23
*VOUT CONNECTED TO VIN FOR VIN ≤ 2.8V (DROPOUT)
Figure 5. Dual output step-down application yields 1.8V at 800mA and 2.5V at 400mA.
with their ESL before the ESR becomes
effective. Also, inexpensive ceramic
capacitors are prone to temperature
and voltage effects, requiring the
designer to check loop stability over
the operating temperature range. For
these reasons, great care is usually
needed when using only ceramic input
and output capacitors. The LTC3548
was designed with ceramic capacitors
in mind and is internally compensated
to handle these difﬁcult design considerations. High quality X5R or X7R
ceramic capacitors should be used to
minimize the temperature and voltage
coefﬁcients.
Figure 5 shows a typical application
for the LTC3548 using only ceramic
capacitors. This circuit provides a
regulated 2.5V output and a regulated
1.8V output, at up to 400mA and
800mA, from a 2.5V to 5.5V input.
Figure 4 shows the bandpass ﬁlter of
Figure 1 tuned from 2kHz to 16kHz
using a 2kHz integrator frequency (R
= 205k, ±1% and C = 390pF, ±5%) and
an LTC6912-2 with gain settings 1, 2,
4, and 8. The tuned center frequencies responses of Figure 4 are 2.73%
lower than the design values of 2kHz,
4kHz, 8kHz and 16kHz and equal to
the error of the circuit’s RC values of
the two integrators (measured values
of aproximatelly 206k for each R and
403pF for each C). The gain error at
16kHz is due to the ﬁlter’s f0 frequency
approaching the maximum f0 for a Q
= 4 and a PGA gain equal to 8 (maximum f0 = 25kHz = 800kHz/{4 • 8]). The
maximum f0 frequency is a function
of the gain-bandwidth product of the
LTC6912-X op amps.
Conclusion
The LTC3548 is a dual monolithic,
step-down regulator that switches at
2.25MHz, minimizing component costs
and board real estate requirements
for DC/DC regulators. The small size,
efﬁciency, low external component
count, and design ﬂexibility of the
LTC3548 make it ideal for portable
applications. L
Other Filter Options
Figure 5 shows an example of a
second order notch ﬁlter. The notch
ﬁlter’s integrator frequency is 500Hz
(1/[2π • 316kΩ • 1000pF]) and with
PGA gains 1, 2, 4 and 8 the notch
frequency is tuned to 500Hz, 1kHz,
2kHz and 4kHz respectively. Any of
the ﬁlters discussed above can be
made into SPI-tunable fourth order
ﬁlters by cascading two second order
circuits. L
Notes
1 SPI is a synchronous communication protocol using
a 3-wire interface between a microprocessor and
a peripheral device
45
L NEW DEVICE CAMEOS
New Device Cameos
Wide Dynamic Range
RF/IF Log Detector
The LT5537 is a wide dynamic range
RF/IF detector, which operates from
below 10MHz to 1000MHz. The lower
limit of the operating frequency range
can be extended to near DC by the use
of an external capacitor. The input
dynamic range at 200MHz with ±3dB
nonlinearity is 90dB (from –76dBm
to 14dBm, single-ended 50Ω input).
The detector output voltage slope is
nominally 20mV/dB, and the typical
temperature coefﬁcient is 0.01dB/°C
at 200MHz.
The LT5537 is available in a tiny
8-Lead (3mm × 2mm) DFN package.
Dual Output Synchronous
DC/DC Controller Draws Only
80µA Quiescent Current in
an Automotive System
The LTC3827 is a low quiescent
current, 2-phase dual output synchronous step-down DC/DC controller.
The LTC3827 draws only 80µA when
one output is active and only 115µA
LTC2970, continued from page 5
registers allow the user to deﬁne
instantaneous and/or latched faults
in the event one of the input voltages
deviates outside an acceptable window. The GPIO_0 and FAULT pins
can be conﬁgured to assert if a fault
occurs.
Tracking Two or More
Supplies with the LTC2970-1
The LTC2970-1 enables power supply tracking with the addition of a
few external components. A special
global address and synchronization
command allow multiple LTC2970-1s
to track and sequence multiple pairs
of power supplies.
A typical LTC2970-1 tracking application circuit is shown in Figure 7.
The GPIO_0 and GPIO_1 pins are
tied directly to their respective DC/
DC converter RUN/SS pins. When
GPIO_CFG is pulled-up to VDD, the
LTC2970-1 automatically holds off
46
when both outputs are active, making
it ideally suited for automotive applications, such as navigation systems,
where one or more supplies remains
active while the engine is off. The
LTC3827’s input supply range of 4V
to 36V is wide enough both to protect
against high input voltage transients
and to continue to operate during
automotive cold crank. The LTC3827
features a ±1% internal reference
and can provide output voltages from
0.8V up to 10V, making it perfect for
the higher voltage supplies typically
required for audio systems, analog
tuners, and CD/DVD players in many
automobiles. Each output can deliver
up to 20A of current at efﬁciencies as
high as 95%. The LTC3827 is rated
for operation from –40°C to 85°C, and
has a maximum operating junction
temperature of 125°C.
The LTC3827’s constant frequency,
current mode architecture provides
excellent line and load regulation, and
its 2-phase operation reduces input capacitance requirements. The LTC3827
smoothly ramps each output voltage
during startup using separate adjustable soft-start and tracking input pins.
It operates at a selectable frequency
between 250kHz and 550kHz, and
can be synchronized to an external
clock from 140kHz to 650kHz using
its phase-locked loop (PLL). Output
overvoltage and overcurrent (short
circuit) protection are provided internally. With both outputs shut down,
the LTC3827 draws a mere 8µA.
The LTC3827 is offered in two packages: a 28-lead SSOP (LTC3827-1)
and a 32-pin 5mm × 5mm QFN
(LTC3827).
the DC/DC converters after power-up.
N-channel FETs Q10 and Q11 and
diodes D10 and D11 form unidirectional range switches around R30A
and R31A while GPIO_CFG is high,
which allow the VOUT0 and VOUT1 pins
to drive the converter outputs all the
way to/from ground through resistors
R30B and R31B. When GPIO_CFG
pulls low, FETs Q10 and Q11 turn
off. R30A and R31A then combine in
series with R30B and R31B for normal
margin operation. The 100kΩ/0.1µF
lowpass ﬁlter in series with the gates
of Q10 and Q11 minimizes charge injection into the feedback nodes of the
DC/DC converters when GPIO_CFG
pulls low.
power applications into one easy-touse device. A multiplexed, differential
input 14-bit delta-sigma and a low drift
on-chip reference deliver less than
±0.5% total unadjusted error. Two
continuous-time, 8-bit, voltage-buffered IDACs can also be programmed
through the I2C and SMBus compatible
interface to servo power-supplies to
the desired voltages. Extensive, user
conﬁgurable fault monitoring and a
built-in servo algorithm reduce the
burden on system computing resources and shorten software development
time. The LTC2970 and LTC2970-1 are
available in a 24-lead QFN package.
Conclusion
The LTC2970 dual power supply
monitor and controller combines
the necessary features essential for
digitally managed, high availability
For further information on any
of the devices mentioned in this
issue of Linear Technology, use
the reader service card or call the
LTC literature service number:
1-800-4-LINEAR
Ask for the pertinent data sheets
and Application Notes.
L
for
the latest information
on LTC products,
visit
www.linear.com
Linear Technology Magazine • March 2006
DESIGN TOOLS L
DESIGN TOOLS
CD-ROM
Product Information
The March 2006 CD-ROM contains product data sheets,
application notes and Design Notes. Use your browser
to view product categories and select products from
parametric tables or simply choose products and documents from part number, application note or design
note indexes.
Linear Technology offers high-performance analog
products across a broad product range. Current
product information and design tools are available at
www.linear.com. Our CD-ROM product selector tool,
which is updated quarterly, and our most recent databook
series can be obtained from your local Linear Sales
ofﬁce (see the back of this magazine) or requested from
www.linear.com.
www.linear.com
Product information and application solutions are available at www.linear.com through powerful search tools,
which yield weighted results from our data sheets,
application notes, design notes, Linear Technology
magazine issues and other LTC publications. The LTC
website simpliﬁes the product selection process by
providing convenient search methods, complete application solutions and design simulation programs for
power, ﬁlter, op amp and data converter applications.
Search methods include a text search for a particular part
number, keyword or phrase, or a powerful parametric
search engine. After selecting a desired product category,
engineers can specify and sort by key parameters and
speciﬁcations that satisfy their design requirements.
Purchase Products Online
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Create a personalized account to check order history,
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Credit terms and low minimum orders make it easy to get
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today at www.linear.com or call (866) 546-3271.
Applications Handbooks
Linear Applications Handbook, Volume I — Almost a
thousand pages of application ideas covered in depth by
40 Application Notes and 33 Design Notes. This catalog
covers a broad range of real world linear circuitry. In
addition to detailed, systems-oriented circuits, this
handbook contains broad tutorial content together with
liberal use of schematics and scope photography. A
special feature in this edition includes a 22-page section
on SPICE macromodels.
Linear Applications Handbook, Volume II — Continues
the stream of real world linear circuitry initiated by Volume
I. Similar in scope to Volume I, this book covers Application Notes 40 through 54 and Design Notes 33 through
69. References and articles from non-LTC publications
that we have found useful are also included.
Linear Applications Handbook, Volume III —
This 976-page handbook includes Application Notes 55
through 69 and Design Notes 70 through 144. Subjects
include switching regulators, measurement and control
circuits, ﬁlters, video designs, interface, data converters,
power products, battery chargers and CCFL inverters.
An extensive subject index references circuits in Linear
data sheets, design notes, application notes and Linear
Technology magazines.
Linear Technology Magazine • March 2006
Brochures
Power Management & Wireless Solutions for Handheld
Products — The solutions in this product selection guide
solve real-life problems for cell phones, digital cameras,
PDAs and other portable devices, maximizing battery
run time and saving space. Circuits are shown for LiIon battery chargers, battery managers, USB support,
system power regulation, display drivers, white LED
drivers, photoﬂash chargers, DC/DC converters and
RF PA power supply and control.
Automotive Electronic Solutions — This selection guide
features high performance, high reliability solutions for
a wide range of functions commonly used in today’s
automobiles, including telematics, infotainment systems,
body electronics, engine management, safety systems
and GPS navigation systems.
Industrial Signal Chain — This product selection guide
highlights analog-to-digital converters, digital-to-analog
converters, ampliﬁers, comparators, ﬁlters, voltage
references, RMS-to-DC converters and silicon oscillators designed for demanding industrial applications.
These precise, ﬂexible and rugged devices feature
parameters fully guaranteed over the –40°C to 85°C
temperature range.
Battery Charger Solutions — This guide identiﬁes
optimum charging solutions for single-cell batteries,
multi-cell batteries and battery packs, regardless of
chemistry. Linear offers a broad range of charger solutions, including linear chargers, linear chargers with
regulators, pulse chargers, switchmode monolithic
chargers, switchmode controller chargers, and switchmode smart battery chargers.
Wireless & RF Solutions — This brochure presents high
performance RF solutions for use in various transceiver
architectures employed in 2G, 2.5G and 3G cellular
basestations, wireless point-to-point radios, WiMAX,
broadband wireless access, satellite receivers, GPS
receivers, cable and VOD infrastructure equipment, RFID
readers, wireless handheld transceivers and software
deﬁned radios.
Software
SwitcherCAD™ III/LTC SPICE — LTC SwitcherCAD III is
a fully functional SPICE simulator with enhancements
and models to ease the simulation of switching regulators. This SPICE is a high performance circuit simulator
and integrated waveform viewer, and also includes
schematic capture. Our enhancements to SPICE result
in much faster simulation of switching regulators than is
possible with normal SPICE simulators. SwitcherCAD III
includes SPICE, macromodels for 80% of LTC’s switching
regulators and over 200 op amp models. It also includes
models of resistors, transistors and MOSFETs. With this
SPICE simulator, most switching regulator waveforms
can be viewed in a few minutes on a high performance
PC. Circuits using op amps and transistors can also be
easily simulated. Download at www.linear.com
FilterCAD™ 3.0 — FilterCAD 3.0 is a computer aided design program for creating ﬁlters with Linear Technology’s
ﬁlter ICs. FilterCAD is designed to help users without
special expertise in ﬁlter design to design good ﬁlters
with a minimum of effort. It can also help experienced
ﬁlter designers achieve better results by playing “what if”
with the conﬁguration and values of various components
and observing the results. With FCAD, you can design
lowpass, highpass, bandpass or notch ﬁlters with a
variety of responses, including Butterworth, Bessel,
Chebychev, elliptic and minimum Q elliptic, plus custom
responses. Download at www.linear.com
SPICE Macromodel Library — This library includes LTC
op amp SPICE macromodels. The models can be used
with any version of SPICE for analog circuit simulations.
These models run on SwitcherCAD III/LTC SPICE.
Noise Program — This PC program allows the user to
calculate circuit noise using LTC op amps, determine the
best LTC op amp for a low noise application, display the
noise data for LTC op amps, calculate resistor noise and
calculate noise using specs for any op amp.
Databooks
Ampliﬁers (2 Books) —
• Operational Ampliﬁers
• Instrumentation Ampliﬁers
• Application Speciﬁc Ampliﬁers
References, Filters, Comparators, Special
Functions, RF & Wireless —
• Voltage References • Special Functions
• Monolithic Filters
• RF & Wireless
• Comparators
• Optical Communications
• Oscillators
Monolithic Switching Regulators —
• Micropower Switching Regulators
• Continuous Switching Regulators
Switching Regulator Controllers (2 Books) —
• DC/DC Controllers
• Digital Voltage Programmers
• Off-Line AC/DC Controllers
Linear Regulators, Charge Pumps,
Battery Chargers —
• Linear Regulators
• Charge Pump DC/DC Converters
• Battery Charging & Management
Hot Swap Controllers, MOSFET Drivers, Special
Power Functions —
• Hot Swap Controllers
• Power Switching & MOSFET Drivers
• PCMCIA Power Controllers
• CCFL Backlight Converters
• Special Power Functions
Data Converters (2 Books) —
• Analog-to-Digital Converters
• Digital-to-Analog Converters
• Switches & Multiplexers
Interface, System Monitoring & Control —
• Interface — RS232/562, RS485,
Mixed Protocol, SMBus/I2C
• System Monitoring & Control — Supervisors,
Margining, Sequencing & Tracking Controllers
47
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Linear Technology Magazine • March 2006

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